JPS634673B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an analog/digital mixed electronic timepiece, and more particularly to correction of the second digit of the mixed timepiece.

An object of the present invention is to provide a second digit correction method that does not disturb the second digit even if one of the second digits is corrected in an analog/digital mixed electronic timepiece.

Even in the case of analog/digital mixed clocks, the oscillation circuit and frequency divider circuit are usually used in common, since there is no need to configure them independently down to the digits below the second. FIG. 1 shows an example of the circuit.

Reference numeral 1 designates an oscillation circuit, which receives the time standard signal as an input, and divides the frequency of the signal into a frequency dividing circuit 2 to a 1 Hz signal.
The 1Hz signal is input to the motor drive circuit 3 and the digital clock second counter 4, and the analog
Display digital time. The output of the digital watch second counter is connected to a digital watch hour/minute counter group 9. Digital clock second correction (0
When a correction signal (seconds correction) is to be performed, a correction signal is output to signal 8, and a correction signal is output to the digital watch second counter 4.
Then, the frequency divider circuit 2 is reset through the OR gate 5. In the example shown in FIG. 1, the motor drive circuit 3 operates in synchronization with the falling edge of the 1Hz signal that is the output of the frequency divider circuit 2.
is input, the frequency divider circuit 2 is reset, so when the signal is 1Hz and the logic level is "1",
When the signal becomes heavy, the 1Hz signal is reset to logic level "1" and cannot be distinguished from a normal 1Hz fall, so the motor drive circuit 3
However, it will work. This means that by adjusting the seconds on the digital clock, the analog clock will advance and disappear. If the seconds of the digital clock are adjusted continuously in synchronization with the 1Hz signal output from the frequency dividing circuit 2, the hands of the analog clock will move one after another. Next, the same applies when adjusting the second of an analog clock.
To keep the second hand stopped, signal 6 is input,
Motor drive circuit is stopped. As a structure for stopping the motor drive circuit in this way, a simple mechanical regulation as disclosed in Japanese Utility Model Application Publication No. 165290/1983 can be considered. Then, when starting the analog clock, input signal 7,
The frequency divider circuit is reset, signal 6 is released, and the motor drive circuit is operated. At this time, similar to the problem explained above, in which state of the 1Hz signal,
Depending on whether the frequency dividing circuit 2 is reset, the digital clock will advance.

As explained above, if one clock is corrected, there is a risk that the other clock will go out of order.
Therefore, in conventional analog/digital mixed electronic watches, when correcting the seconds, either the analog or digital watch can only be operated using either a method that can be operated, or the frequency divider circuit is used to divide the seconds into a 1Hz signal. 16Hz, not commonly used until
Alternatively, two circuits, analog and digital, were used starting with the high frequency output stage. In the former correction method, the operations are quite limited and are very difficult for the user to use, and in the latter case, the circuitry is extremely burdensome. It was hot.

The present invention has been improved in view of these points, and will be described in detail below with reference to the drawings.

FIG. 2 shows a configuration example according to the present invention.

1 to 9 are the same as those explained in FIG. 1, so their explanation will be omitted.

Reference numeral 10 denotes a D-type flip-flop, which differentiates the 1 Hz signal output from the frequency divider circuit 2 with the gate of 11. To explain the case of correcting the seconds of a digital watch, a second correction signal is outputted to the signal 8, and the second counter 4 for the digital watch and the frequency dividing circuit 2 are reset in the same manner as described above. At the same time, the output of OR gate 5 is applied to D-type flip-flop 10 and gate 11, and the D-type flip-flop
Flop 10 is reset and the output is
becomes "1", and the output of the gate 11 is prohibited.
The output from the differentiating circuit will not be output. As a result, even if the second digit of the digital clock is corrected, the motor drive circuit 3 will not operate.

The above operation will now be explained using the signal waveform diagram of FIG. In FIG. 3, from the frequency divider circuit 2 of FIG. 2 to the D type flip-flop 10,
The signal output to the CL terminal is A, the signal output to the D terminal is B, the terminal output signal of the D-type flip-flop 10 is C, and the gate 1
Let the output signal from OR gate 5 be D, and the output signal from OR gate 5 be E. The signals corresponding to the C and D signals after the E signal is output are defined as C' and D' signals.

In this way, when the correction signal 8 of the digital clock or the correction signal 7 of the analog clock is input,
The second digit of each clock can be corrected without affecting each other's clocks, and both clocks can be used in sync.

The same is true when correcting the seconds of an analog clock; the correction signal 7 for the analog clock inhibits the output of the differentiating circuit, so the seconds digit of the digital clock does not advance.

As explained above, if the present invention is adopted,
In an analog/digital mixed electronic clock, the second digit can be adjusted from either clock, and both clocks will operate in synchronization with the second digit that has been adjusted later. This allows the user to use his or her own watch that is easy to set, to adjust seconds or less, and to use both watches in synchronization. Furthermore, since the oscillation circuit and frequency dividing circuit are commonly used in both watches, the circuit load can be reduced.

[Brief explanation of the drawing]

Fig. 1: A diagram showing an example of a circuit of an analog/digital mixed electronic timepiece, Fig. 2: A diagram showing an example of a circuit configuration of an analog/digital mixed electronic timepiece according to the present invention, Fig. 3: A diagram showing an example of a circuit of an analog/digital mixed electronic timepiece according to the present invention. FIG. 3 is a diagram showing signal waveforms at each point in FIG. 2 showing an example of a circuit configuration of an analog/digital mixed electronic timepiece. 1... Oscillator circuit, 2... Frequency dividing circuit, 3... Motor drive circuit, 4... Second counter for digital clock, 5... OR gate, 6, 7, 8... Signal name,
9...Hour/minute counter group for digital clock, 10
...D type - flip-flop, 11...gate circuit.

Claims (1)

[Claims] 1. An oscillation circuit that outputs a time standard signal, a frequency divider circuit that frequency divides the time standard signal to a reference signal, and differentiates the reference signal from the frequency divider circuit to use as a drive signal for an analog display section and a digital display section. a differentiating circuit, a motor drive circuit that inputs the drive signal from the differentiator circuit and drives the analog display section, a digital clock that inputs the drive signal from the differentiator circuit and counts seconds on the digital display section; It has a second counter, and both a second correction signal for an analog watch and a second correction signal for a digital watch are applied to a reset terminal for resetting the frequency dividing circuit and a reset terminal for inhibiting the output of the differentiating circuit, An analog/digital mixed electronic timepiece, characterized in that the second correction signal for the digital timepiece is applied to a reset terminal for resetting the second counter for the digital timepiece.