JPS6347168B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a receiver switching circuit that switches between a plurality of receivers and one signal demodulator.

For some types of satellite command receivers, the reception status changes depending on the satellite's attitude.
Requires multiple antennas and receivers connected to them. On the other hand, it is not possible to mount multiple command demodulators due to limitations on the weight and power consumption that can be mounted on an artificial satellite. Therefore, means is required to switch the outputs of a plurality of receivers and connect them to one command demodulator.

As a means of this connection, if each receiver has a squelch circuit that turns off the receiver output when there is no reception input, it is possible to add the outputs of multiple receivers and connect them to one command demodulator. Conceivable.

However, if the squelch circuit of one receiver malfunctions and there is no signal received by this receiver,
Since this receiver only transmits noise, it has the disadvantage of deteriorating the signal-to-noise ratio (SN ratio) of the output signal of other normal receivers.

The present invention solves the above-mentioned drawbacks, and automatically disconnects a receiver that does not transmit a received signal or a malfunctioning receiver from a demodulator among a plurality of receivers, and replaces the output signal of other normal receivers. The purpose of the present invention is to provide a receiver switching circuit that does not degrade the signal-to-noise ratio of the receiver.

The present invention is directed to a receiver switching circuit that is provided for each receiver and includes a switch that connects or disconnects the received signal of the receiver, and an adder that adds the outputs of the respective switches and provides the added output to the demodulator. , a detection means for detecting a change in the squelch signal from each of the receivers to control each of the switches; and means for stopping the output of the detection means other than the receiver to which the switch is connected based on the output of the detection means. and means for supplying only one output to the switch when the outputs of the detection means are simultaneously output from a plurality of receivers.

This will be explained below with reference to the drawings.

The figure is a configuration diagram of a circuit according to an embodiment of the present invention. In the figure, 1 and 2 are receivers, and 3 is a demodulator.
The output of the receiver 1 is connected to an analog switch 6 via a received signal input terminal 5. Further, the output of the receiver 2 is connected to an analog switch 8 via a received signal input terminal 7. Both analog switches 6
and 8 are each connected to the input of analog adder 10. The output of this analog adder 10 is
It is connected to the input of the demodulator 3 via the signal output terminal 11.

Further, the squelch signal of the receiver 1 is transmitted to the flip-flop circuit 13 via the squelch signal input terminal 12.
clock input CL. Also receiver 2
The squelch signal is input to the clock input of the flip-flop circuit 15 via the squelch signal input terminal 14.
Given to CL. A power supply is connected to each input D of both flip-flop circuits 13 and 15 via a terminal 17. Flip-flop circuit 13
The output Q of is connected to the control input of analog switch 6 and the input of one-shot circuit 18. The output of this one-shot circuit 18 is connected to the reset terminal R of the flip-flop circuit 15.

The output Q of the flip-flop circuit 15 is also connected to the control input of the analog switch 8 and the input of the one-shot circuit 19. The output of this one-shot circuit 19 is connected to the reset terminal R of the flip-flop circuit 13. Further, each inverted output of both flip-flop circuits 13 and 15 is connected to an input of an AND circuit 21. The output of this AND circuit 21 is connected to the set terminal S of the flip-flop circuit 13.

With this configuration, when the receiver receives radio waves, the received signal is output from the signal output terminal of the receiver, and the squelch signal changes from low level to high level. That is, when the receiver 1 receives a radio wave, the terminal 12 changes from low level to high level. At this time, the output Q of the flip-flop circuit 13 becomes high level, the analog switch 6 is closed, and the signal at the terminal 5 is outputted to the terminal 11 through the adder 10. On the other hand, the output Q of the flip-flop circuit 13
When goes from a low level to a high level,
A pulse is supplied by the one-shot circuit 18 to the reset terminal R of the flip-flop circuit 15;
The output Q of the flip-flop circuit 15 is reset to a low level, and the analog switch 8 is opened. As a result, the output of receiver 2 becomes terminal 11.
It is never output to .

Conversely, when the receiver 2 receives a radio wave, the terminal 14 goes from low level to high level, and the output Q of the flip-flop circuit 15 goes from low level to high level, so the analog switch 8 closes and the signal at the terminal 7 is turned off. Output to terminal 11. When the output Q of the flip-flop circuit 15 changes from low level to high level, the one shot circuit 19
A pulse is supplied to the reset terminal R of the flip-flop circuit 13, and the output Q of the flip-flop circuit 13 is reset to a low level. Analog switch 6 is therefore opened and terminal 5
The signal is never output to terminal 11.

Furthermore, when the two receivers 1 and 2 receive radio waves at the same time, the outputs Q of the flip-flop circuits 13 and 15 become high level at the same time, and the one-shot circuits 18 and 19 both send out pulses. Each of the 15 outputs Q becomes a low level. At this time, the inverted outputs of both flip-flop circuits 13 and 15 go high, and the output of the AND circuit 21 goes high, supplying the set terminal S of the flip-flop circuit 13 with a high level. As a result, the output Q of the flip-flop circuit 13 becomes high level again, so that only the signal at the terminal 5 is outputted to the terminal 11.

Next, considering the case where a receiver fails, assume that one of the receivers has failed and the squelch signal of the failed receiver is continuously sending out a low level or high level squelch signal. If receiver 1 fails and its squelch signal continues to be at a low level, there will be no signal at terminal 12, then a signal will be received by receiver 2, and the signal at terminal 14 will change from low level to high level. When the level changes, flip-flop 15 is set, flip-flop 13 is reset, and switch 8 becomes conductive. As a result, the normal output of the receiver 2 is supplied to the terminal 11. Even if the receiver 2 fails and its squelch signal remains at a low level, the output of the receiver 1 is similarly sent to the terminal 11 via the switch 6.

If receiver 1 fails while receiver 1 is selected, but the squelch signal at its terminal 12 remains at a high level, the output of receiver 1 will temporarily continue to be used. is selected, but then a signal is received by receiver 2 and terminal 1
When the signal at the receiver 2 changes from low level to high level, the flip-flop 15 is set, the flip-flop 13 is reset, and the receiver 2
The output is outputted to the terminal 11 via the switch 8. In this state, the signal at the terminal 12 continues to remain at a high level. Since terminal 12 is connected to the clock terminal CL of flip-flop 13,
Flip-flop 13 never flips again. In this state, the squelch signal terminal 14 of the receiver 2
Even if the signal at the terminal 14 becomes a high level, the receiver 2 will be selected again and the flip-flop 13 will not be inverted. In other words, the receiver 1 is equivalent to being disconnected.

This also applies when receiver 2 is selected and the squelch signal at terminal 14 remains at a high level and enters a failure state. is inverted to select the signal of receiver 1.
Since the signal at terminal 14 is connected to the clock terminal of flip-flop 15, flip-flop 15 will not be inverted even if a high level signal continues at terminal 14. In other words, the receiver 2 becomes equivalent to a disconnected state.

When receiver 1 is not selected and receiver 2 is selected, if a failure happens to occur in receiver 1 and its squelch signal terminal 12 changes from low level to high level as an abnormal phenomenon, flip-flop 13 The output signal of the receiver 1 is immediately inverted and the output signal of the receiver 1 is selected. This is an abnormal state, but for some reason, when the reception signal of the receiver 2 is interrupted and then received again, the signal level of the terminal 14 changes from low level to high level, and the flip-flop 15 Inversely, receiver 2 is selected. Even if the signal at terminal 12 continues to fail and remains at a high level, since the signal at terminal 12 is connected to the clock terminal of flip-flop 13, flip-flop 13 will not be inverted and receiver 1 will be disconnected. It becomes equivalent to the state. This also applies when receiver 2 fails from being unselected and the squelch signal continues to be sent to terminal 14. In this case, when the squelch signal terminal 12 of receiver 1 is If the signal is transmitted again after it is interrupted, the receiver 2 becomes equivalent to being disconnected.

Note that the action of the AND circuit 21 occurs when the terminals 12 and 14 simultaneously change from low level to high level, as described above, and when one of the terminals 12 and 14 is continuously at high level, However, even if the other flip-flop becomes high level later, the one-shot circuit 18 or 19 will reset the flip-flop on the side that is continuously at high level, and the output will not be sent from the AND circuit 21. do not have.

In the above embodiment, an example is shown in which there are two receivers, but the number of receivers is not limited to two, but may be three or more.

As explained above, if multiple receivers and demodulators are connected using the means of the present invention, even if one of the multiple receivers fails, the failed receiver The output will not be fed to the demodulator and will no longer degrade the normal received signal being output from other receivers.

Since this receiver switching operation is performed automatically, there is an advantage that a malfunctioning receiver can be automatically disconnected when used in an unmanned receiving device, especially a receiving device for a space rocket or an artificial satellite.

[Brief explanation of drawings]

The figure is a configuration diagram of a circuit according to an embodiment of the present invention. 1, 2... Receiver, 3... Demodulator, 5... Received signal input terminal, 6... Analog switch, 7...
Received signal input terminal, 8...Analog switch, 1
0...Analog adder, 11...Signal output terminal,
12... Squelch signal input terminal, 13... Flip-flop circuit, 14... Squelch signal input terminal, 15... Flip-flop circuit, 17... Terminal, 18, 19... One-shot circuit, 21...
AND circuit.

Claims (1)

[Scope of Claims] 1. Switches 6 and 8 provided for each receiver to disconnect or disconnect the received signal of this receiver, and an adder 10 that adds the outputs of the respective switches and provides the added output to the demodulator. Detection means 13, 1 for detecting changes in squelch signals from each of the receivers and controlling each of the switches.
5, means 18, 19 for stopping the output of the detection means other than the receiver to which the switch is connected by the output of the detection means; and means 18, 19 for stopping the output of the detection means other than the receiver to which the switch is connected; and means 21 for providing only one output to the switch.