JPS6349803B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an output register control method, and more particularly to an output register control method in which runaway of a microcomputer system does not affect the output register.

Electronic computers are used in various fields, and their spread is remarkable, and the use of microcomputers in particular is increasing because of their price and ease of use. However, in general, microcomputer systems are microcomputers (hereinafter referred to as MPUs).
When the MPU malfunctions and goes out of control, no countermeasures are taken and the MPU outputs meaningless signals. Therefore, the output register to which a meaningless signal is input also outputs a meaningless signal, which poses a problem of interfering with the operation of the MPU system.

The present invention has been made in view of the above problems, and an object of the present invention is to provide an output register control method that does not affect external output when the MPU goes out of control and outputs meaningless signals. It is. To briefly explain the present invention, a counting circuit is attached to one system of control input signals of an output register that is selectively driven by a plurality of input signals, and the output register is controlled so that the input signal is input to the output register only in a required counting period. It is characterized by this.

Preferred specific examples for carrying out the present invention will be described in detail below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the output register control method of the present invention, in which 1 is an MPU, 2 is a decoder, 3 is a counting circuit,
4 is an output register control circuit, and 5 is an output register. The control input signal output from the MPU 1 and input to the output register control circuit 4 is the lower address bit of the address bus from the MPU 1 and selects one of the multiple registers in the output register.
and a signal C, which is the address bits of the address bus other than the above-mentioned lower bits and is decoded to select the output register 5 as a chip. By the output register control circuit output by these two control input signals
Data D of the MPU 1 is connected to an external device via an output register 5. A counting circuit 3 is provided which is activated by the A signal to start counting and outputs a chip selection signal for the output register 5 within the required counting range. This counting circuit 3 is activated in advance in synchronization with the data write timing to the output register 5 by the A signal, and outputs a signal to the output register control circuit to permit input of data D to the output register 5 until the required count is reached. Enter 4. Therefore, input of data D to the output register 5 is prohibited while the counting circuit 3 is inactive. When MPU1 goes out of control,
Since the A signal is generated at a timing different from the above-mentioned data write timing or is not generated normally in synchronization with the data write timing, the data D output due to runaway is output to the output register control circuit 4.
Therefore, the input to the output register 5 is blocked. A time chart for the above explanation is shown in FIG. A indicates a normal state, and b indicates a runaway state.
The counting circuit 3 is activated in advance in synchronization with the data writing timing to the output register 5. The activated counting circuit 3 starts counting and stops at the required count. During the operation of this counting circuit 3, the output register 4
The input to is permitted and the output register 4 outputs.
However, it is preferable that the required count value of the counting circuit 3 be a value sufficient for writing the input signal and be as small as possible.

As is clear from the above explanation, according to the present invention, an output register control method is achieved in which the output register does not output meaningless signals even if the computer goes out of control by simply adding a counting circuit, and the present invention can be applied to a computer system. If applied, it will have many advantages.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the output register control method of the present invention, and FIG. 2 is a time chart of the present invention. In the figure, 1 is an MPU, 3 is a counting circuit, and 4 is an output register control circuit.

Claims (1)

[Claims] 1. In an electronic computer system equipped with an output register that is selected by a control input signal and outputs input data to an external device, a counting circuit is attached to one system of the control input signal of the output register,
When inputting data to the output register, the counting circuit is activated, and the control input signal of the one system is controlled so that the data is inputted to the output register during the period in which the counting circuit counts the required count value. An output register control method characterized by preventing an erroneous input signal from being output to an output register when a computer system goes out of control.