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JPS6350917B2 - - Google Patents
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JPS6350917B2 - - Google Patents

Info

Publication number
JPS6350917B2
JPS6350917B2 JP14082782A JP14082782A JPS6350917B2 JP S6350917 B2 JPS6350917 B2 JP S6350917B2 JP 14082782 A JP14082782 A JP 14082782A JP 14082782 A JP14082782 A JP 14082782A JP S6350917 B2 JPS6350917 B2 JP S6350917B2
Authority
JP
Japan
Prior art keywords
time
division
channel
information
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14082782A
Other languages
Japanese (ja)
Other versions
JPS5930391A (en
Inventor
Yoshinori Yoshida
Susumu Iwasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP14082782A priority Critical patent/JPS5930391A/en
Publication of JPS5930391A publication Critical patent/JPS5930391A/en
Publication of JPS6350917B2 publication Critical patent/JPS6350917B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Description

【発明の詳細な説明】 本発明は、時分割通話路に関し、特にインチヤ
ネル制御に適用し得る時分割空間スイツチから成
る時分割通話路方式に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a time-division channel, and more particularly to a time-division channel system comprising a time-division space switch that can be applied to channel control.

従来、この種の時分割空間スイツチは、第1図
に示すように、論理ゲートGATEと、該論理ゲ
ートGATEを制御する通話路制御装置SWCと、
該制御装置SWCよりの制御データを保持するメ
モリCTLMとを有し、その制御データによつて
論理ゲートGATEの開閉を行なうことにより、
入力時分割多重回線IN1〜oを出力多重回線
OUT1〜nへ各チヤネル毎にスイツチングする構成
となつている。そのため、これらの交換動作の制
御は、この時分割空間スイツチに接続された通話
路制御装置で集中管理され、又、通話路接続の呼
損制御(チヤネル整合処理)もこの制御装置の制
御下となり、交換制御機能の分散化が困難となる
欠点があつた。
Conventionally, this type of time-division space switch, as shown in FIG. 1, includes a logic gate GATE, a channel control device SWC that controls the logic gate GATE,
It has a memory CTLM that holds control data from the control device SWC, and opens and closes the logic gate GATE according to the control data.
Input time division multiplexed line IN 1~o Output multiplexed line
The configuration is such that switching is performed for each channel from OUT 1 to n. Therefore, the control of these switching operations is centrally managed by the communication path control device connected to this time-division space switch, and call loss control (channel matching processing) for communication path connections is also under the control of this control device. However, there was a drawback that it was difficult to decentralize the exchange control function.

本発明は、斯かる欠点に鑑みてなされたもの
で、時分割空間スイツチの入力時分割多重回線の
各チヤネルのチヤネル情報内として出方路を示す
アドレス情報を付加し、この情報をもとに自律的
に出方路へ情報を送出し、又、呼損が生じた時
は、この旨を入力チヤネルに対し表示する機能を
有することにより、上記欠点を解決し、交換制御
機能の分散化を可能とする時分割通話路方式を提
供することを目的とする。
The present invention has been made in view of such drawbacks, and it adds address information indicating the output route to the channel information of each channel of the input time division multiplex circuit of the time division space switch, and based on this information, By having the function to autonomously send information to the outgoing route and to display a message to that effect on the input channel when a call loss occurs, the above drawbacks can be solved and the switching control function can be decentralized. The purpose of this invention is to provide a time-division communication path system that makes it possible.

即ち、本発明は、各チヤネルのチヤネル情報を
通話路制御情報と通信情報とから成る構成とし、
多重度k(kは1以上の整数)の時分割多重回線
を入力すると共に、該回線からの入力チヤネル情
報を保持し、該入力チヤネル情報の通話路制御情
報により所定の出力時分割多重回線へチヤネル情
報を出力する時分割スイツチ機能ユニツトをn個
配備し、該n個の時分割スイツチ機能ユニツトの
各々は前記多重度kの時分割多重回線が対応して
入力され、m本の出力時分割多重回線を出力せし
めて、n×mの時分割空間スイツチを構成し、自
律選択スイツチ機能を持たせて成るものである。
That is, the present invention configures the channel information of each channel to consist of call path control information and communication information,
Inputs a time division multiplex line with multiplicity k (k is an integer greater than or equal to 1), holds input channel information from the line, and routes it to a predetermined output time division multiplex line based on call path control information of the input channel information. n time-division switch function units that output channel information are provided, and each of the n time-division switch function units receives a corresponding input of the time-division multiplexed circuit with the multiplicity k, and outputs m pieces of time-division multiplexed circuits. It outputs multiple lines to form an n×m time-division space switch and has an autonomous selection switch function.

以下、本発明を図面に示す実施例に基づいて説
明する。
Hereinafter, the present invention will be explained based on embodiments shown in the drawings.

第2図は本発明の一実施例を示すブロツク図で
ある。図において本発明時分割通話路方式は、n
個の時分割スイツチ機能ユニツトSU1〜SUnを備
えて成り、各時分割スイツチ機能ユニツトSU1
SUnには、シリアルパラレル変換回路S/Pと、
制御回路CTLと、出力ゲート回路G1〜Gmと、パ
ラレルシリアル変換回路P/S1〜P/Smとを備
えて構成される。
FIG. 2 is a block diagram showing one embodiment of the present invention. In the figure, the time-division channel system of the present invention has n
The time division switch function unit SU 1 to SUn is equipped with a time division switch function unit SU1 to
SUn includes a serial-parallel conversion circuit S/P,
It is configured to include a control circuit CTL, output gate circuits G 1 to Gm, and parallel-to-serial conversion circuits P/S 1 to P/Sm.

各時分割スイツチ機能ユニツトSU1〜SUnは、
多重度k(kは1以上の整数)の入力時分割多重
回線IN1〜INnが対応して接続され、各ユニツト
SU1〜SUnはチヤネル毎に動作する。
Each time division switch function unit SU 1 to SUn is
Input time division multiplex lines IN 1 to INn with multiplicity k (k is an integer of 1 or more) are connected correspondingly, and each unit
SU 1 to SUn operate on a channel-by-channel basis.

上記シリアルパラレル変換回路S/Pは、対応
する上記多重回線IN1〜INnからの入力チヤネル
情報を各々保持する。このチヤネル情報は、出方
路を示す制御情報と通信情報とから成る。前者は
制御回路CTLへ、後者は出方路となる出力ゲー
ト回路G1〜Gmへ分配される。
The serial-to-parallel conversion circuit S/P each holds input channel information from the corresponding multiplex lines IN 1 to INn. This channel information consists of control information indicating the outgoing route and communication information. The former is distributed to the control circuit CTL, and the latter is distributed to output gate circuits G 1 to Gm serving as output routes.

上記制御回路CTLは、制御情報を調べ、どの
出方路かを検出すると共に、制御バスBUSを介
して、同一の出方路に対し他スイツチユニツトの
使用要求があるかないかを調べる。この結果、2
以上のスイツチユニツトで同一出方路の使用要求
があれば、所定の優先ルールによつて、どれか一
つを選択して、そのスイツチユニツトがその出方
路を使用し、接続可情報を付加し、一方、他のス
イツチユニツトは、呼損の表示情報を付加し、該
当する出力用パラレルシリアル変換回路P/S1
P/Smへ出力チヤネル情報をセツトする。
The control circuit CTL examines the control information, detects which output route, and also checks via the control bus BUS whether there is a request to use the same output route from another switch unit. As a result, 2
If the above switch units request the use of the same output route, one of them will be selected according to a predetermined priority rule, and that switch unit will use that output route and add connection availability information. On the other hand, the other switch units add the call loss display information and convert the corresponding output parallel-serial converter circuit P/S 1 to
Set output channel information to P/Sm.

上記パラレルシリアル変換回路P/S1〜P/
Smは、各時分割スイツチ機能ユニツトSU1
SUn毎に対応する出力時分割多重回線OUT1
OUTmにマルチ接続されており、上記出力チヤ
ネル情報がセツトされる。
The above parallel-serial conversion circuit P/S 1 ~P/
Sm is each time division switch function unit SU 1 ~
Output time division multiplex line OUT 1 corresponding to each SUn
Multi-connected to OUTm, and the above output channel information is set.

この本発明時分割通話路方式は、一般的に、第
3図に示すように、n=mとして使用され、又、
入力時分割多重回線IN1〜INnと出力時分割多重
回線OUT1〜OUTnは、各々<IN1、OUT1>〜
<INn、OUTn>のペアとして使用され、これら
が複数の交換装置SWEQ1〜SWEQnに接続され
る。これらの交換装置SWEQ1〜SWEQnは、独
立に時分割空間スイツチSSWに接続アクセスを
行なうことができる。
The time-division channel system of the present invention is generally used with n=m as shown in FIG.
The input time division multiplex lines IN 1 ~ INn and the output time division multiplex lines OUT 1 ~ OUTn are <IN 1 , OUT 1 > ~, respectively.
They are used as a pair of <INn, OUTn> and are connected to a plurality of switching devices SWEQ 1 to SWEQn. These switching devices SWEQ 1 to SWEQn can independently connect and access the time division space switch SSW.

第4図に上述したチヤネル情報の一構成例を示
す。同図に示すものは、フレーム内にk個のチヤ
ネル情報が多重化されている。チヤネル情報は、
制御データフイールドCTLFと通信情報フイール
ドDATAとからなる。制御データフイールド
CTLFは、動作モード指定MOD及び出方路指定
アドレスOUTDTから構成される。動作モード指
定MODとしては、入力チヤネルの場合、バス接
続の要求、プライオリテイデータ等の情報から成
り、一方、出力チヤネルの場合、パス接続可情
報、呼損情報等から成る。一例を示すと、入力チ
ヤネルのプライオリテイとして一旦パス接続可と
なつた後は、プライオリテイの一番高いデータを
付加して送出すれば、そのチヤネルを通話中継続
して使用することができる。
FIG. 4 shows an example of the structure of the channel information described above. In what is shown in the figure, k pieces of channel information are multiplexed within a frame. Channel information is
It consists of a control data field CTLF and a communication information field DATA. control data field
CTLF consists of an operation mode designation MOD and an output route designation address OUTDT. In the case of an input channel, the operation mode designation MOD consists of information such as a bus connection request and priority data, while in the case of an output channel, it consists of path connectability information, call loss information, and the like. For example, once the priority of an input channel allows path connection, if data with the highest priority is added and transmitted, that channel can be used continuously during a call.

本発明は、以上説明したように、チヤネル情報
を通話路制御情報と通信情報とから成る構成と
し、該通話路制御情報を用いて自律的に出方路を
選択する機能を有する時分割スイツチ機能ユニツ
トを備えたことにより、交換制御機能の分散化に
適した時分割通話路を構成できる効果がある。
As explained above, the present invention has a time division switch function in which channel information is composed of call route control information and communication information, and has a function of autonomously selecting an outgoing route using the call route control information. The provision of the unit has the effect of configuring a time-division communication path suitable for decentralizing switching control functions.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の時分割空間スイツチを示すブロ
ツク図、第2図は本発明時分割通話路方式の一実
施例を示すブロツク図、第3図は本発明時分割通
話路方式の交換装置との一般的な接続例を示すブ
ロツク図、第4図はチヤネル情報の構成の一例を
示す説明図である。 SU1〜SUn……時分割スイツチ機能ユニツト、
S/P1〜S/Pn……シリアルパラレル変換回路、
CTL……制御回路、G1〜Gm……出力ゲート回
路、P/S1〜P/Sm……パラレルシリアル変換
回路。
FIG. 1 is a block diagram showing a conventional time-division space switch, FIG. 2 is a block diagram showing an embodiment of the time-division channel system of the present invention, and FIG. 3 is a block diagram showing a switching device of the time-division channel system of the present invention. FIG. 4 is an explanatory diagram showing an example of the structure of channel information. SU 1 ~SUn……Time division switch function unit,
S/P 1 ~ S/Pn...Serial parallel conversion circuit,
CTL...Control circuit, G1 ~Gm...Output gate circuit, P/ S1 ~P/Sm...Parallel-serial conversion circuit.

Claims (1)

【特許請求の範囲】 1 各チヤネルのチヤネル情報を通話路制御情報
と通信情報とからなる構成とし、 多重度k(kは1以上の整数)の入力時分割多
重回路を入力すると共に、該回線からの入力チヤ
ネル情報を保持し、該入力チヤネル情報の通話路
制御情報により所定の出力時分割多重回線へチヤ
ネル情報を出力する時分割スイツチ機能ユニツト
をn個配備し、 該n個の時分割スイツチ機能ユニツトの各々に
は上記多重度kの入力時分割多重回線を一対一に
対応して接続し、かつm本の上記出力時分割多重
回線を上記n個の時分割スイツチ機能ユニツトに
わたつてマルチ接続することによりn×mの時分
割空間スイツチを構成し、自律選択スイツチ機能
を持たせてなることを特徴とする時分割通話路方
式。
[Scope of Claims] 1 Channel information of each channel is composed of communication path control information and communication information, and an input time division multiplexing circuit with multiplicity k (k is an integer of 1 or more) is input, and the channel information of each channel is n time-division switch functional units are provided that hold input channel information from the input channel information and output the channel information to a predetermined output time-division multiplex line based on call path control information of the input channel information, and the n time-division switches The input time division multiplex lines of the above multiplicity k are connected to each of the functional units in a one-to-one correspondence, and the m output time division multiplex lines are connected to each of the above n time division switch function units. A time-division communication channel system characterized in that an n×m time-division space switch is constructed by connecting the switches, and an autonomous selection switch function is provided.
JP14082782A 1982-08-13 1982-08-13 Time division channel system Granted JPS5930391A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14082782A JPS5930391A (en) 1982-08-13 1982-08-13 Time division channel system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14082782A JPS5930391A (en) 1982-08-13 1982-08-13 Time division channel system

Publications (2)

Publication Number Publication Date
JPS5930391A JPS5930391A (en) 1984-02-17
JPS6350917B2 true JPS6350917B2 (en) 1988-10-12

Family

ID=15277637

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14082782A Granted JPS5930391A (en) 1982-08-13 1982-08-13 Time division channel system

Country Status (1)

Country Link
JP (1) JPS5930391A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63222672A (en) * 1987-03-10 1988-09-16 Nippon Suisan Kaisha Ltd Method for producing meat-like structured food

Also Published As

Publication number Publication date
JPS5930391A (en) 1984-02-17

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