JPS6351426B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital relay transmission line in which digital repeaters having a 3R function are arranged at predetermined intervals, and more specifically, to detection of faulty sections of the transmission line. be. here
The 3R function is (a) waveform equalization (reshaping), which amplifies and shapes the attenuated and distorted received waveform to create an equalized waveform with a good S/N ratio, and (b) converts the equalized waveform into binary data. Regenerating, which identifies information “1” and “0” and regenerates the amplitude to the same pulse as the transmitted pulse
It is well known that the term refers to the following three things: (c) timing regeneration (retiming) of reproducing the phase of the transmitted pulse at correct time intervals.

When a failure occurs in the digital relay transmission line, such as a drop in the transmission signal level, the equalization amplifier gain of the repeater after the failure point is set to AGC function or Peak-AGC.
function, and the equalization amplifier output has increased thermal noise. This thermal noise is sent as a transmission signal to subsequent repeaters. Random signals due to thermal noise can be received at the end of a transmission line, but it has been impossible to determine in which repeater the signal was generated. In order to eliminate this drawback, a method for identifying repeaters by having each repeater send out a unique signal pattern ("faulty repeater search method", published patent publication, 1982-
60363, 1984-60364) have already been announced.
However, this method has the disadvantage that a large number of circuits are added to the repeater.

The present invention was made to overcome the drawbacks of the prior art, and an object of the present invention is to provide a digital system that can identify a faulty repeater without adding many circuits to the repeater. The purpose is to provide a relay transmission path.

The main point of the configuration of the present invention is that in a digital relay transmission line in which digital repeaters each having at least a phase-locked oscillator for timing reproduction are arranged at predetermined intervals, the free-running frequency of the phase-locked oscillator of each repeater is is set to a unique value within the capture range of the phase-locked oscillator of every repeater,
When a fault occurs in a transmission line, a repeater located in the faulty section outputs a signal with a unique free-running frequency, and by measuring the frequency, the faulty section can be detected.

Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 3 is a configuration diagram of a relay transmission line to which the present invention is applied. In the figure, 10 is a repeater with 3R function, 11 is a terminal station installed at the end of the transmission line, and 12 is a repeater with 3R function.
13 is a timing extraction circuit for extracting a timing clock from a signal transmitted from the repeater 10 when a transmission path abnormality occurs; 13 is a timing extraction circuit 1;
This is a frequency identification circuit for identifying the frequency of the timing clock extracted in step 2.

This will help you understand the general configuration of the relay transmission line that is the object of the present invention.

FIG. 1 is a block diagram showing an example of the configuration of a digital repeater 10 with a 3R function used in the present invention. In the figure, 1 is the input terminal of the repeater, 2 is the output terminal of the repeater, 3 is the equalization amplifier, and 4 is the output terminal of the repeater.
41 is a timing regeneration circuit, 41 is a timing extraction circuit, 42 is a phase synchronized oscillator, and 5 is an identification regeneration circuit, which has the same configuration as a conventional 3R function digital repeater. When the relay transmission line in which such repeaters are arranged at predetermined intervals is normal, the transmission signal input to the input terminal 1 of the digital repeater is amplified by the equalization amplifier 3 and passed through the identification reproducing circuit 5. added to. On the other hand, the output of the equalizing amplifier 3 passes through a timing extracting circuit 41 of a timing reproducing circuit 4, undergoes timing regeneration in a phase synchronized oscillator 42, and is used as a timing signal for an identification reproducing circuit 5. The transmission signal identified and reproduced by the identification and reproduction circuit 5 is sent to the output terminal 2 of the digital repeater.
is sent out to the transmission path.

When an abnormality occurs in the relay transmission path and the input signal at the input terminal 1 of the digital repeater is abnormally reduced or disconnected, the gain of the equalizing amplifier 3 increases and the output thereof increases noise components. In this case, since the output of the timing extracting circuit 41 of the timing reproducing circuit 4 is mostly composed of noise components, it becomes impossible for the phase synchronized oscillator 42 to synchronize with the input signal. That is, the oscillation frequency of the phase synchronized oscillator 42 is a free running frequency.
Frequency) f _i , and the oscillation signal includes a jitter component. When the output with many noise components of the equalizing amplifier 3 is identified and reproduced at this free-running frequency _fi , a random signal is obtained, which can be transmitted by a subsequent digital repeater. By setting the free running frequency f _i of this phase synchronized oscillator 42 to a different value for each repeater,
At the end of the transmission path (see FIG. 3) when the transmission path is abnormal, the clock timing extraction circuit 12 extracts the transmitted signal, and the frequency f _i of the timing clock is identified by the frequency identification circuit 13. By this, it is possible to determine which repeater the signal is being sent from, and the faulty section can be determined. However, since the extracted clock signal contains many jitter components, it is necessary to reduce the variance of the measured values by lengthening the measurement time of the clock frequency f _i in the frequency identification circuit 13. Furthermore, the free-running frequency f _i of the phase-locked oscillator 42 of each repeater needs to be set within the capture range of the phase-locked oscillator of all repeaters. Furthermore, the setting of the free-running frequency f _i is determined by the voltage controlled oscillator VCO (not shown) in the phase synchronized oscillator 42.
This can be done by changing the input voltage of the oscillator or the constants of the VCO (inductance, capacitance, and resistance that determine the free-running frequency).

FIG. 2 is a block diagram showing another example of the configuration of the digital repeater used in the present invention, and is an example of the configuration in which the jitter component of the output signal of the phase synchronized oscillator is reduced when the relay transmission path is abnormal. In the figure, 6 is an input signal abnormality detection circuit;
43 is a switch, and other symbols are the same as in FIG.

The operation of this repeater is almost the same as that of the repeater shown in FIG. The detection output opens the switch 43 to cut off the input signal to the phase synchronized oscillator 42. Therefore, since the input signal to the phase-locked oscillator 42 is eliminated, the phase-locked oscillator 42 oscillates at the free-running frequency _fi , and its jitter component is smaller than that in FIG. Since the other operations are the same as those shown in FIG. 1, their explanation will be omitted, but it goes without saying that the free-running frequency f _i is different for each repeater.

In this way, the free running frequency f _i of the phase synchronized oscillator 42
By reducing the jitter component of the phase-locked oscillator 42, even if the capture range of the phase-locked oscillator 42 is narrow, it becomes possible to allocate a unique free-running frequency _{f i} to a large number of repeaters.
The detection time required to detect (extraction timing frequency) can be reduced.

In the configuration example shown in FIG. 2, the input to the phase-locked oscillator 42 is cut off in order to reduce the jitter component of the free-running frequency _fi . It is also clear that similar effects can be obtained by doing so.

As explained above, in the example shown in Figure 1, the fault section of the digital relay transmission line can be measured from the end of the transmission line without requiring any special additional circuit to the repeater, and in Figure 2, with a small number of additional circuits. Therefore, according to the present invention, there is an advantage that transmission path monitoring can be carried out with high reliability and economically.

In the description of the embodiments of the present invention, optical transmission lines have not been mentioned, but it is clear that the present invention can also be applied to optical digital relay transmission lines.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a configuration example of a digital repeater with a 3R function used in the present invention, FIG. 2 is a block diagram showing another configuration example of a digital repeater used in the present invention, and FIG. 1 is a configuration diagram of a relay transmission line to which the present invention is applied. Description of symbols 1...Input terminal, 2...Output terminal,
3... Equalization amplifier, 4... Timing recovery circuit,
41... Timing extraction circuit, 42... Phase synchronized oscillator, 43... Switch, 5... Identification reproducing circuit, 6... Input signal abnormality detection circuit, 10... Repeater, 11... Terminal, 12... Timing extraction circuit, 13...frequency identification circuit.

Claims (1)

[Claims] 1. In a digital relay transmission line in which digital repeaters each having at least a phase-locked oscillator for timing reproduction are arranged at predetermined intervals, the free-running frequency is the phase-locked oscillator of all the repeaters. It has a phase-locked oscillator that is set to a unique value for each repeater within the capture range of 1. A digital relay transmission line, comprising: a determination circuit that detects a signal that has been detected and determines a fault section based on its frequency.