JPS6361789B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] This invention relates to a variable capacitance diode with improved characteristics and a method for manufacturing the same.
This reduces high frequency series resistance while maintaining voltage characteristics.

[Technical background of the invention]

Conventional variable capacitance diodes are often manufactured with a Si diffused planar structure. A conventional variable capacitance diode and its manufacturing method will be described below with reference to FIGS. 1 to 3.

For example, on a low resistance semiconductor substrate 1 of a first conductivity type (N type in this example), a semiconductor substrate 1 of a first conductivity type (N type in this example) having a higher specific resistance than that of the substrate 1, for example 1Ωcm
Epitaxial layers 2 having a specific resistance before and after are formed to have a thickness of, for example, 4 to 5 .mu.m (see FIG. 1a). On top of this, an insulating film (SiO ₂ film) 3 with a thickness of approximately 1 to 2 μm is placed to protect the surface.
After forming, an opening 6 is formed by photolithography (see FIG. 1b). Next, by ion implantation method,
An impurity of the first conductivity type (P ³¹ in this example) is implanted into the epitaxial layer 2 through the opening 6 under the conditions of an accelerating voltage of 130 keV and a dose of (2 to 3)×10 ¹³ cm ⁻² . In this case, ions may be implanted into the opening 6 through a thin oxide film, for example, an oxide film with a thickness of (1000 to 3000) Å. Next, a heat treatment is performed which serves as annealing for lattice defect recovery and carrier recovery to form an implant diffusion layer 4 having a higher impurity density than the epitaxial layer (see FIG. 1c). Next, a second conductivity type diffusion layer that includes the surface of this implantation diffusion layer 4, has a diffusion depth shallower than the diffusion depth of the implantation diffusion layer, and has a conductivity type opposite to the first conductivity type (in this example, P type). 5 (see Figure 1d). After this, an extraction electrode is formed using a well-known technique to complete a variable capacitance diode.

[Problems with background technology]

In the variable capacitance diode according to the conventional method, the impurity concentration of the second conductivity type diffusion layer 5 (P type in this example, hereinafter referred to as P type diffusion layer 5) is higher than the impurity concentration of the first conductivity type implant diffusion layer 4 (in this example, P type diffusion layer 5). If the impurity concentration is sufficiently higher than that of the N-type implant diffusion layer 4) and the epitaxial layer, applying a reverse bias voltage (hereinafter referred to as voltage) as shown in Figure 2a will cause P-type diffusion. The width of the depletion layer in layer 5 is very narrow and can be ignored compared to the extent of the depletion layer in the region of N-type implant diffusion layer 4 and epitaxial layer 2 . That is, the variable capacitance of the variable capacitance diode is considered to be the sum of the junction capacitance due to the depletion layer 10 in the N-type implant diffusion layer 4 and the junction capacitance due to the depletion layer 11 in the epitaxial layer 2. Furthermore, since the impurity concentration of the epitaxial layer is lower than that of the N-type implant diffusion layer, the spread of the depletion layer 11 in the epitaxial layer (excluding the epitaxial layer directly under the implant diffusion layer) is similar to that of the depletion layer in the implant diffusion layer. It will be larger than the spread of 10. By increasing or decreasing the voltage, the spread of the depletion layers 10 and 11 increases or decreases, resulting in variable capacitance. Curve 8 in FIG. 3 shows the junction capacitance (hereinafter referred to as capacitance)-voltage characteristic.

Market demands for variable capacitance capacitors include a large voltage change ratio of the capacitance, and a requirement to reduce the high frequency series resistance Rs to increase the figure of merit Q (1/ωRsCj). When the capacitance-voltage characteristic curve 8 in FIG. 3 exceeds about 15 V, the slope of the curve becomes gentle and a tendency towards saturation is shown. In other words, it is confirmed that the voltage change ratio of the capacitance tends to become smaller. The problem is to increase the figure of merit Q without decreasing the voltage change ratio of the capacitance.

[Purpose of the invention]

The present invention solves the above problems, corrects the saturation tendency of the conventional capacitance-voltage characteristics, and provides an improved variable capacitance diode with a small series resistance Rs, and a method for manufacturing the same.

[Summary of the invention]

The capacitance-voltage characteristic shows a tendency to saturate as the voltage increases, but this is because the voltage is at a constant value (in the conventional example, about
15V), the depletion layer 1 in the epitaxial layer
1 reaches the substrate 1 and thereafter, even if the voltage is increased, the impurity concentration of the substrate 1 is higher than the impurity concentration of the epitaxial layer, so the depletion layer 11 hardly changes.

In addition, the DC resistance Rs is mainly due to the implant diffusion layer 4.
It can be considered as the resistance of the epitaxial layer between the lower surface of the substrate 1 and the substrate 1, and it changes depending on its thickness _t1 (see FIG. 2b). If _t1 is decreased in order to lower the Rs value, the depletion layer 11 will more easily reach the substrate 1, and the capacitance-voltage characteristics will tend to saturate at low voltages.

In addition, if the thickness _t1 of the intermediate epitaxial layer is increased to improve the saturation tendency of the capacitance-voltage characteristics, Rs.
becomes large. As is well known, the spread (shape) of the depletion layer of the PN junction is mainly determined by the reverse bias voltage and the distribution of impurity atoms in the PN junction. Since the impurity concentration in the implantation diffusion layer 4 is higher than the impurity concentration in the epitaxial layer, the impurity in the implantation diffusion layer in the peripheral area of the implantation diffusion layer has a large effect on the shape of the depletion layer 11 in the epitaxial layer. Therefore, if the implantation diffusion layer 4 is formed at a deeper position than before, the electric flux edge due to the space charge of the depletion layer will be more likely to be connected to the impurity ions in the peripheral area of the implantation diffusion layer, and the shape of the depletion layer 11 will not change. , the voltage value at which the depletion layer 11 reaches the substrate 1 increases, and the saturation tendency of the capacitance-voltage characteristics is significantly improved. In the present invention, the depth of the implant diffusion layer is controlled by adjusting the depth of its ion implantation surface.

That is, the present invention is defined in Claims 1(a), (b), and (c).
In the conventional variable capacitance diode described in
A concave portion of a desired depth is formed on the surface facing the surface (equal to the ion implantation surface in the conventional technology), and the ion implantation is performed by lowering the ion implantation surface by the desired depth than the ion implantation surface in the conventional technology. A desired depth that allows a post-implant diffusion layer to be formed and that the depth of the spreading surface of the depletion layer directly below the implantable diffusion layer when voltage is applied is deeper than the depth of the spreading surface of the depletion layer 11 in the epitaxial layer. This is a variable capacitance diode characterized by a concave portion. This desired depth is determined by trial.

The invention described in claim 2 also includes an epitaxial step of forming an epitaxial layer of N type on the main surface of an N type substrate and having a higher specific resistance than the substrate, and an etching step in which a predetermined region (ion-implanted region) is etched to a desired depth from the surface; and after ion implantation of, for example, N-type impurity, from the etched surface, heat treatment is performed to form a layer higher than the epitaxial layer. an implant diffusion step of forming an impurity-concentrated N-type implant diffusion layer in the epitaxial layer; A method for manufacturing a variable capacitance diode, comprising: a P-type diffusion step of forming a P-type diffusion layer having a diffusion depth shallower than the P-type diffusion depth;
In other words, this is a manufacturing method in which the shape of the depletion layer in the epitaxial layer is controlled by adjusting the depth of the ion implantation surface, thereby improving the saturation tendency of the capacitance-voltage characteristics or reducing Rs.

[Embodiments of the invention]

The manufacturing method of the present invention will be explained based on FIG.

The steps up to the step shown in FIG. 4a are the same as the conventional method described above. Next, the surface of the epitaxial layer in the opening 6 is etched using, for example, plasma technology or an alkali or mixed acid. The etching depth _t2 is, for example, about 0.2 to 0.6 .mu.m (see FIG. 4b).
Next, an N-type implant diffusion layer 14 shown in FIG. 4c is formed by a conventional method. Next, using a conventional method, a P-type diffusion layer 15 that includes the main surface of the N-type implant diffusion layer 14, has a larger area than the main surface, and has an impurity concentration sufficiently higher than the impurity concentration of the implantation diffusion layer 14 is formed.
(see Figure 4d). Thereafter, an extraction electrode is formed using a well-known technique to complete a variable capacitance diode. FIG. 5c shows the expansion of the depletion layer when a voltage is applied to the variable capacitance diode manufactured according to the present invention. As shown in FIG. 5a, the extent of the depletion layer 21 in the epitaxial layer is smaller than the extent of the corresponding prior art depletion layer 11 shown in FIG. 2a. As the voltage increases, the depletion layer 21 expands to a state shown in FIG. 5b. The corresponding expansion of the depletion layer 11 shown in FIG. 2b of the prior art reaches the substrate 1. However, as in the present invention, if the etching depth _t2 is further increased and the ion-implanted surface is lowered, the depth of the spreading surface of the depletion layer 20 directly under the implant diffusion layer 14 becomes epitaxial as shown in FIG. 5c. The depth can be made deeper than the depth of the spreading surface of the depletion layer 21 of the layer, and t ₂ in this state is set to a desired depth.

〔Effect of the invention〕

The capacitance-voltage characteristic of the variable capacitance diode with shallow recesses shown in FIGS. 5a and 5b is the curve 18 in FIG.
According to this, curve 18 shows a tendency to saturate when the voltage exceeds about 20V. However, the characteristic of the variable capacitance diode according to the present invention shown in FIG. 5c is curve 19 in FIG. Improvement is confirmed. Note that in a region where the voltage does not show saturation below about 15 V, the capacitance-voltage characteristic curves almost overlap.

In the present invention, if the thickness of the epitaxial layer is increased by the etching depth _t2 , the implant diffusion layer 1
Since the distance t ₁ from the bottom surface of 4 to the substrate 1 does not change, the high frequency series resistance Rs remains unchanged and the capacitance-voltage characteristics are significantly improved.

On the other hand, if the conventional capacitance-voltage characteristics are maintained, the thickness of the epitaxial layer can be made thinner, and the high frequency series resistance Rs decreases accordingly, resulting in a higher figure of merit Q.

[Brief explanation of drawings]

Figure 1 is a cross-sectional view showing the conventional manufacturing process, and the figures a to d are cross-sectional views after the completion of the epitaxial process, opening forming process, implant diffusion process, and second conductivity type diffusion process, respectively. It is.
Figures 2a and 2b are cross-sectional views showing the expansion of the depletion layer of a variable capacitance diode produced by a conventional manufacturing method. FIG. 3 is a cross-sectional view when a voltage higher than a voltage that shows a saturation tendency is applied.
FIG. 3 is a graph showing the capacitance-voltage characteristics of the conventional manufacturing method and that of the present invention, and FIG. 4 is a cross-sectional view showing the manufacturing process of the present invention. FIG. 4 is a cross-sectional view after each of the etching process, the implantation diffusion process, and the second conductivity type diffusion process is completed. FIG. 5 is a diagram illustrating the expansion of the depletion layer of the variable capacitance diode according to the present invention, and FIG. 5 a and b are cross-sectional views when applying voltages corresponding to FIGS. 2 a and b, respectively.
FIG. 5c is a cross-sectional view of a recess formed with a desired depth according to the present invention. 1... Semiconductor substrate, 2... Epitaxial layer (N type), 3... Oxide film, 4, 14... First conductivity type implantation diffusion layer (N type), 5, 15... Second conductivity type diffusion Layer (P type), 10, 20... Depletion layer in the implant diffusion layer, 11, 21... Depletion layer in the epitaxial layer (excluding the epitaxial layer directly under the implant diffusion layer), 8... Based on conventional technology Capacitance-voltage characteristic curve of a variable capacitance diode, 18... Capacitance-voltage characteristic curve of a variable capacitance diode having a shallow recess, 19... Capacitance-voltage characteristic curve when a recess of a desired depth is formed according to the present invention.

Claims (1)

[Scope of Claims] 1 (a) an epitaxial layer of a first conductivity type formed on the main surface of a semiconductor substrate of a first conductivity type and having a higher resistivity than the substrate; (b) a first
(c) a second conductivity type diffusion layer having a high impurity concentration of a second conductivity type which is a conductivity type opposite to that of the second conductivity type diffusion layer; forming a bond with a portion of the lower surface of the layer;
A variable capacitance diode comprising a first conductivity type implantation diffusion layer having a first conductivity type impurity concentration higher than the impurity concentration of the epitaxial layer and having a depth that does not reach the main surface of the semiconductor substrate, The surface portion of the conductive type diffusion layer facing the implantation diffusion layer forms a recess with a desired depth, and the depth of the spreading surface of the depletion layer directly under the implantation diffusion layer when a reverse bias voltage is applied. A variable capacitance diode, wherein the recess has a desired depth that can be made deeper than the depth of the spreading surface of the depletion layer in the epitaxial layer. 2 (a) an epitaxial step of forming an epitaxial layer of a first conductivity type and having a higher specific resistance than the substrate on the main surface of a semiconductor substrate of a first conductivity type; (b) a surface of the epitaxial layer; to a desired depth such that the depth of the spreading surface of the depletion layer immediately below the implantation diffusion layer described later when a reverse bias voltage is applied is deeper than the depth of the spreading surface of the depletion layer in the epitaxial layer. (c) After ion-implanting a first conductivity type impurity from the etched surface, heat treatment is performed to form a first conductivity type impurity having a higher impurity concentration than the epitaxial layer.
an implant diffusion step of forming a conductive type implant diffusion layer in the epitaxial layer; A method for manufacturing a variable capacitance diode, comprising: a second conductivity type diffusion step of forming a second conductivity type diffusion layer of a conductivity type opposite to the first conductivity type and having a diffusion depth shallower than the first conductivity type.