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JPS6361815B2 - - Google Patents
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JPS6361815B2 - - Google Patents

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Publication number
JPS6361815B2
JPS6361815B2 JP55054984A JP5498480A JPS6361815B2 JP S6361815 B2 JPS6361815 B2 JP S6361815B2 JP 55054984 A JP55054984 A JP 55054984A JP 5498480 A JP5498480 A JP 5498480A JP S6361815 B2 JPS6361815 B2 JP S6361815B2
Authority
JP
Japan
Prior art keywords
circuit
transmission line
balanced transmission
balanced
lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55054984A
Other languages
Japanese (ja)
Other versions
JPS56152356A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5498480A priority Critical patent/JPS56152356A/en
Publication of JPS56152356A publication Critical patent/JPS56152356A/en
Publication of JPS6361815B2 publication Critical patent/JPS6361815B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/40Artificial lines; Networks simulating a line of certain length

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Logic Circuits (AREA)
  • Dc Digital Transmission (AREA)
  • Small-Scale Networks (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Description

【発明の詳細な説明】 本発明は直流結合平衡バス整合終端方法、特に
1個以上の送信回路と受信回路が同一平衡伝送路
に接続される直流結合平衡バス回路における直流
結合平衡バス整合終端方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a DC-coupled balanced bus matched termination method, particularly a DC-coupled balanced bus matched termination method in a DC-coupled balanced bus circuit in which one or more transmitting circuits and receiving circuits are connected to the same balanced transmission path. Regarding.

1個以上の送信回路と受信回路間で情報を転送
する場合に、前記直流結合平衡バス回路が情報処
理装置等で広く使用されている。
The DC-coupled balanced bus circuit is widely used in information processing devices and the like when transferring information between one or more transmitting circuits and receiving circuits.

第1図は従来ある直流結合平衡バス回路の一例
を示す図で、第1図において、複数個の送信回路
DVと受信回路RCが平衡伝送路Bに接続され、
該平衡伝送路Bを経由して情報の転送を行う。ま
た平衡伝送路Bは両端を終端抵抗R1により終端
され、該終端抵抗R1は前記平衡伝送路2線間の
特性インピーダンスZbに等しく整合されており、
送信回路DVから送出される信号に対し、平衡伝
送路Bの両端において反射波が発生するのを防止
している。然し平衡伝送路Bの2線対地間の特性
インピーダンスZuに対する整合は何等配慮され
ていない。ここで、平衡伝送路Bを用いて信号を
短距離伝送する場合、平衡伝送路Bの2線対地間
に生ずる反射波は一般には問題にならない。しか
し、長距離伝送する場合、特に外来雑音および装
置間の対地電圧が変動することにより大きな雑音
(これをコモンモード雑音と云う)が発生する。
このコモンモード雑音は2線間と対地間とを整合
終端していない平衡伝送路Bの抵抗R2,R3で反
射され、平衡伝送路B全体に定在波として残り、
伝送回路DVを通る。
Figure 1 is a diagram showing an example of a conventional DC-coupled balanced bus circuit.
DV and receiving circuit RC are connected to balanced transmission line B,
Information is transferred via the balanced transmission path B. Further, the balanced transmission line B is terminated at both ends by a terminating resistor R1, and the terminating resistor R1 is matched equally to the characteristic impedance Zb between the two balanced transmission lines,
This prevents reflected waves from being generated at both ends of the balanced transmission line B with respect to the signal sent out from the transmitting circuit DV. However, no consideration is given to matching with respect to the characteristic impedance Zu between the two lines of the balanced transmission line B. Here, when a signal is transmitted over a short distance using the balanced transmission line B, the reflected waves generated between the two wires of the balanced transmission line B and the ground generally do not pose a problem. However, in the case of long-distance transmission, large noise (called common mode noise) is generated, especially due to external noise and fluctuations in ground voltage between devices.
This common mode noise is reflected by the resistances R 2 and R 3 of the balanced transmission line B, which is not matched terminated between the two lines and the ground, and remains as a standing wave throughout the balanced transmission line B.
Passes through the transmission circuit DV.

第2図は送信回路DVの出力特性を示す。図に
おいて送信回路DVの2つの出力電圧“H”,
“L”(第1図参照)が共に+Vo領域、即ち正領
域にある時は高出力インピーダンスの為、ここを
定在波が通つても、この回路から反射波は発生し
ない。しかし、−Vo領域にある時はこの回路は低
出力インピーダンスの為、ここを定在波が通る
と、この回路から反射波が発生する。
FIG. 2 shows the output characteristics of the transmitting circuit DV. In the figure, two output voltages “H” of the transmitting circuit DV,
When both "L" (see FIG. 1) are in the +Vo region, that is, in the positive region, the output impedance is high, so even if a standing wave passes through this circuit, no reflected wave is generated from this circuit. However, when in the -Vo region, this circuit has a low output impedance, so when a standing wave passes through this circuit, a reflected wave is generated from this circuit.

ここで、上記の定在波により送信回路DVの出
力電圧“H”,“L”が矢印の様に上下に変動する
が、例えば、出力電圧“H”が+Vo領域、“L”
が−Vo領域に入つたとすると、出力電圧“L”
に対してのみ反射波が発生する。
Here, the output voltages "H" and "L" of the transmitting circuit DV fluctuate up and down as shown by the arrows due to the above standing wave.
If it enters the −Vo region, the output voltage “L”
Reflected waves are generated only for

即ち、定在波が送信回路DVを通るたびに不平
衡な反射波を発生するが、この不平衡な反射波は
2線間の差電圧を信号として取り出す際にはその
まま出力されるので、取り出した信号の信号対雑
音比が劣化し、情報の正確な転送を妨げる。
In other words, each time a standing wave passes through the transmitting circuit DV, an unbalanced reflected wave is generated, but this unbalanced reflected wave is output as is when the voltage difference between the two wires is extracted as a signal, so it cannot be extracted. The signal-to-noise ratio of the transmitted signal deteriorates, preventing accurate transfer of information.

また総べての送信回路DVの出力インピーダン
スが高くなると、受信回路RCに対する受信差動
入力電圧は0となるため、受信回路RCの出力は
不定となる。かゝる不定状態を防止するために、
従来ある直流結合平衡バス回路においては第3図
に示されるが如き手段が講じられている。第3図
において、平衡伝送路Bの両端にある抵抗R1
は、第1図におけると同様、平衡伝送路Bの2線
間特性インピーダンスZbに等しく選ばれている。
更に総べての送信回路DVの出力インピーダンス
が高い場合の、受信回路RCの出力確定用電位+
Eが抵抗N2およびR3を経由して平衡伝送路B
に印加されている。なお抵抗R2およびR3の値
は、抵抗R1の平衡伝送路Bに対する前記整合条
件を著しく変化させぬ様、充分大きく選ばれてい
る。従つて平衡伝送路Bの2線と対地間の特性イ
ンピーダンスZuに対する整合は何等配慮されて
いず、第1図同様、平衡伝送路Bの2線対地間に
は依然として反射波が生ずる恐れがある。
Furthermore, when the output impedance of all the transmitting circuits DV becomes high, the received differential input voltage to the receiving circuit RC becomes 0, so the output of the receiving circuit RC becomes undefined. In order to prevent such an indefinite state,
In a conventional DC-coupled balanced bus circuit, a measure as shown in FIG. 3 has been taken. In Figure 3, the resistor R1 at both ends of the balanced transmission line B
is selected to be equal to the two-wire characteristic impedance Zb of the balanced transmission line B, as in FIG.
Furthermore, when the output impedance of all transmitting circuits DV is high, the potential for determining the output of the receiving circuit RC +
E connects to balanced transmission line B via resistors N2 and R3.
is applied to. Note that the values of the resistors R2 and R3 are selected to be sufficiently large so as not to significantly change the matching condition for the balanced transmission line B of the resistor R1. Therefore, no consideration is given to matching the characteristic impedance Zu between the two wires of the balanced transmission line B and the ground, and as in FIG. 1, reflected waves may still occur between the two wires of the balanced transmission line B and the ground.

本発明の目的は、従来ある直流結合平衡バス回
路における前述の如き欠点を除去し、前記平衡伝
送路の2線対地間に反射波の発生を防ぎ、また総
べての送信回路出力が高インピーダンスとなつた
場合にも受信回路出力を確定させ、正確な情報転
送が可能な直流結合平衡バス整合終端方法の実現
にある。
It is an object of the present invention to eliminate the above-mentioned drawbacks of conventional DC-coupled balanced bus circuits, to prevent the generation of reflected waves between the two wires of the balanced transmission line and to the ground, and to ensure that all transmitting circuit outputs are high impedance. The object of the present invention is to realize a DC coupled balanced bus matching termination method that can determine the receiving circuit output and accurately transfer information even when the following occurs.

この目的は、1個以上の送信回路と受信回路が
同一平衡伝送路に接続される直流結合平衡バス回
路において、前記平衡伝送路の2線間および2線
対地間の特性インピーダンスをZbおよびZuとし
た時 抵抗R4=4Zb・Zu/4Zu−Zb 抵抗R5=R6=2Zu を満足する前記抵抗R5,R4およびR6を直列接続
して終端抵抗回路を構成し、前記抵抗R4で前記
平衡伝送路の2線間のうちの少なくとも一端を終
端すると共に、前記終端抵抗回路の両端間に電位
を印加し、前記抵抗R5,R4,R6による分圧で定
まる電位を前記平衡伝送路の2線間に接続される
前記受信回路の出力確定用電位として与えること
により達成される。
The purpose of this is to calculate the characteristic impedance between two wires and between two wires and ground of the balanced transmission path as Zb and Zu in a DC-coupled balanced bus circuit in which one or more transmitting circuits and receiving circuits are connected to the same balanced transmission path. When the resistance R 4 = 4Zb・Zu/4Zu−Zb, the resistance R 5 = R 6 = 2Zu is connected in series to form a termination resistance circuit, and the resistance R 4 terminating at least one end of the two wires of the balanced transmission line, and applying a potential between both ends of the terminating resistor circuit to set the potential determined by the voltage division by the resistors R 5 , R 4 , and R 6 as described above. This is achieved by applying it as the potential for determining the output of the receiving circuit connected between two lines of the balanced transmission line.

以下本発明の一実施例による直流結合平衡バス
回路を、第4図により説明する。第4図におい
て、送信回路DVおよび受信回路RC間で情報転
送を行う平衡伝送路Bの両端は抵抗R4,R5お
よびR6から構成される整合終端抵抗回路により
それぞれ終端されている。各抵抗R4,R5およ
びR6の値はそれぞれ(1)式および(2)式を満足する
様選ばれる。
A DC-coupled balanced bus circuit according to an embodiment of the present invention will be explained below with reference to FIG. In FIG. 4, both ends of a balanced transmission line B that transfers information between the transmitting circuit DV and the receiving circuit RC are terminated by matching termination resistor circuits composed of resistors R4, R5, and R6. The values of the resistors R4, R5, and R6 are selected to satisfy equations (1) and (2), respectively.

R4=4Zb・Zu/4Zu−Zb …(1) R5=R6=2Zu …(2) 但し、Zb:平衡伝送路Bの2線間の特性インピ
ーダンス。
R4=4Zb・Zu/4Zu−Zb...(1) R5=R6=2Zu...(2) However, Zb: Characteristic impedance between two lines of balanced transmission line B.

Zu:平衡伝送路Bの2線対地間の特性イ
ンピーダンス。
Zu: Characteristic impedance between two wires and ground of balanced transmission line B.

更に抵抗R5およびR6の一端には電位+Eが
印加されている。該整合終端抵抗回路の平衡伝送
路Bの2線間から見たインピーダンスおよび2線
対地間から見たインピーダンスはそれぞれZbお
よびZuに等しくなり、平衡伝送路Bの2線間お
よび2線対地間の特性インピーダンスZbおよび
Zuとは何れも整合状態にある。従つて平衡伝送
路Bの2線間に送信される信号に対する反射波の
みならず、2線対地間に生ずる信号あるいは外来
雑音に対する反射波の発生も防止される。更に抵
抗R5およびR6から供給される電位+Eによ
り、平衡伝送路Bの2線間には電位
R4・E/R4+R5+R6が生じ、各受信回路RCに入
力 されるため、該受信回路RCの出力は確定される。
Further, a potential +E is applied to one ends of the resistors R5 and R6. The impedance seen between the two wires of the balanced transmission line B and the impedance seen from the two wires to the ground of the matched termination resistor circuit are equal to Zb and Zu, respectively, and the impedance seen between the two wires of the balanced transmission line B and between the two wires and the ground Characteristic impedance Zb and
Both are in a consistent state with Zu. Therefore, not only reflected waves from signals transmitted between the two lines of balanced transmission line B, but also reflected waves from signals generated between the two lines and the ground or external noise are prevented from occurring. Furthermore, due to the potential +E supplied from the resistors R5 and R6, a potential R4・E/R4+R5+R6 is generated between the two lines of the balanced transmission line B, and is input to each receiving circuit RC, so the output of the receiving circuit RC is determined. be done.

以上の説明から明らかな如く、本実施例によれ
ば平衡伝送路Bの両端は、整合終端抵抗回路によ
り2線間特性インピーダンスZbのみならず、2
線対地間特性インピーダンスZuに対しても整合
されているため、平衡伝送路Bの2線対地間に生
ずる信号あるいは外来雑音に対し、負の反射波の
発生する恐れはなく、送信回路DVの出力インピ
ーダンスが低値になることも防止される。また整
合終端抵抗回路から平衡伝送路Bの2線間には受
信回路確定用の電位R4・E/R4+R5+R6が供給
さ れているため、平衡伝送路Bに接続されている総
べての送信回路DVの出力インピーダンスが高い
場合にも受信回路RCの出力は不定になることは
防止される。
As is clear from the above explanation, according to this embodiment, both ends of the balanced transmission line B have not only the characteristic impedance Zb between the two lines but also the two
Since it is also matched to the line-to-ground characteristic impedance Zu, there is no risk of negative reflected waves occurring for signals or external noise occurring between the two lines of balanced transmission line B, and the output of the transmitting circuit DV Impedance is also prevented from becoming low. Also, since the potential R4・E/R4+R5+R6 for determining the receiving circuit is supplied between the two wires of the balanced transmission line B from the matching termination resistor circuit, all the transmitting circuits DV connected to the balanced transmission line B Even when the output impedance of the receiving circuit RC is high, the output of the receiving circuit RC is prevented from becoming unstable.

なお第4図はあく迄本発明の一実施例に過ぎ
ず、例えば同一平衡伝送路Bに接続される送信回
路DVまたは受信回路RCは複数に限定されなく
とも本発明の効果は変らない。本発明の他の実施
例として、1個の送信回路DVおよび複数個の受
信回路RCが接続される直流結合平衡バス回路を
第5図に示す。第5図において平衡伝送路Bの一
端には抵抗R4,R5およびR6から構成される
整合終端抵抗回路が接続されている。各抵抗R
4,R5およびR6の値は、第4図におけると同
様、それぞれ(1)式および(2)式を満足する様選ばれ
ることにより、送信回路DVから送出される信号
あるいは外来雑音の反射波が平衡伝送路Bの2線
間および2線対地間に発生することは防止され
る。また送信回路DVの出力インピーダンスが高
い場合にも、整合終端抵抗回路から供給される電
位R4・E/R4+R5+R6により受信回路RCの出力は確定 される。
Note that FIG. 4 is merely one embodiment of the present invention, and the effects of the present invention do not change even if, for example, the number of transmitting circuits DV or receiving circuits RC connected to the same balanced transmission path B is not limited to a plurality. As another embodiment of the present invention, FIG. 5 shows a DC-coupled balanced bus circuit to which one transmitting circuit DV and a plurality of receiving circuits RC are connected. In FIG. 5, a matching termination resistor circuit composed of resistors R4, R5 and R6 is connected to one end of the balanced transmission line B. Each resistance R
4, R5 and R6 are selected so as to satisfy equations (1) and (2), respectively, as in FIG. This is prevented from occurring between the two lines of the balanced transmission line B and between the two lines and the ground. Further, even when the output impedance of the transmitting circuit DV is high, the output of the receiving circuit RC is determined by the potential R4·E/R4+R5+R6 supplied from the matching termination resistor circuit.

以上、本発明によれば、1個以上の送信回路お
よび受信回路を同一平衡伝送路に接続される直流
結合平衡バス回路において、平衡伝送路の2線対
地間に信号あるいは外来雑音の反射波が発生する
ことが防止でき、また総べての送信回路出力が高
インピーダンスとなつた場合にも受信回路出力を
確定することが出来、正確な情報転送が可能とな
る。
As described above, according to the present invention, in a DC-coupled balanced bus circuit in which one or more transmitting circuits and receiving circuits are connected to the same balanced transmission line, reflected waves of signals or external noise are generated between two wires of the balanced transmission line and the ground. This can be prevented, and even if all the transmitting circuit outputs become high impedance, the receiving circuit output can be determined, making it possible to accurately transfer information.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来ある直流結合平衡バス回路の一例
を示す図、第2図は送信回路の出力インピーダン
ス特性の一例を示す図、第3図は従来ある直流結
合平衡バス回路の他の一例を示す図、第4図は本
発明の一実施例による直流結合平衡バス回路を示
す図、第5図は本発明の他の実施例による直流結
合平衡バス回路を示す図である。 図において、B……平衡伝送路、DV……送信
回路、RC……受信回路、R1,R2,R3,R
4,R5,R6……抵抗。
Figure 1 shows an example of a conventional DC-coupled balanced bus circuit, Figure 2 shows an example of the output impedance characteristics of a transmitting circuit, and Figure 3 shows another example of a conventional DC-coupled balanced bus circuit. 4 is a diagram showing a DC-coupled balanced bus circuit according to one embodiment of the present invention, and FIG. 5 is a diagram showing a DC-coupled balanced bus circuit according to another embodiment of the present invention. In the figure, B...balanced transmission line, DV...transmission circuit, RC...reception circuit, R1, R2, R3, R
4, R5, R6...Resistance.

Claims (1)

【特許請求の範囲】 1 1個以上の送信回路と受信回路が同一平衡伝
送路に接続される直流結合平衡バス回路におい
て、前記平衡伝送路の2線間および2線対地間の
特性インピーダンスをZbおよびZuとした時 抵抗R4=4Zb・Zu/4Zu−Zb 抵抗R5=R6=2Zu を満足する前記抵抗R5,R4およびR6を直列接続
して終端抵抗回路を構成し、 前記抵抗R4で前記平衡伝送路の2線間のうち
の少なくとも一端を終端すると共に、 前記終端抵抗回路の両端間に電位を印加し、前
記抵抗R5,R4,R6による分圧で定まる電位を前
記平衡伝送路の2線間に接続される前記受信回路
の出力確定用電位として与えることを特徴とする
直流結合平衡バス整合終端方法。
[Claims] 1. In a DC-coupled balanced bus circuit in which one or more transmitting circuits and receiving circuits are connected to the same balanced transmission line, the characteristic impedance between two lines of the balanced transmission line and between two lines and the ground is defined as Zb. and Zu, resistor R 4 = 4Zb・Zu/4Zu−Zb resistor R 5 = R 6 = 2Zu The above resistors R 5 , R 4 and R 6 are connected in series to form a terminating resistor circuit, and At least one end of the two lines of the balanced transmission line is terminated with a resistor R4 , and a potential is applied between both ends of the terminating resistor circuit, and the voltage is determined by the voltage division by the resistors R5 , R4 , and R6 . A DC-coupled balanced bus matching termination method, characterized in that a potential is provided as a potential for determining the output of the receiving circuit connected between two lines of the balanced transmission line.
JP5498480A 1980-04-25 1980-04-25 Matched terminating method for direct current coupling balanced bus Granted JPS56152356A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5498480A JPS56152356A (en) 1980-04-25 1980-04-25 Matched terminating method for direct current coupling balanced bus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5498480A JPS56152356A (en) 1980-04-25 1980-04-25 Matched terminating method for direct current coupling balanced bus

Publications (2)

Publication Number Publication Date
JPS56152356A JPS56152356A (en) 1981-11-25
JPS6361815B2 true JPS6361815B2 (en) 1988-11-30

Family

ID=12985907

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5498480A Granted JPS56152356A (en) 1980-04-25 1980-04-25 Matched terminating method for direct current coupling balanced bus

Country Status (1)

Country Link
JP (1) JPS56152356A (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5426328B2 (en) * 1973-11-24 1979-09-03

Also Published As

Publication number Publication date
JPS56152356A (en) 1981-11-25

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