JPS6361816B2 - - Google Patents
Info
- Publication number
- JPS6361816B2 JPS6361816B2 JP55062592A JP6259280A JPS6361816B2 JP S6361816 B2 JPS6361816 B2 JP S6361816B2 JP 55062592 A JP55062592 A JP 55062592A JP 6259280 A JP6259280 A JP 6259280A JP S6361816 B2 JPS6361816 B2 JP S6361816B2
- Authority
- JP
- Japan
- Prior art keywords
- balanced transmission
- transmission line
- circuit
- ground
- characteristic impedance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/30—Reducing interference caused by unbalanced currents in a normally balanced line
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Logic Circuits (AREA)
Description
【発明の詳細な説明】
本発明は平衡伝送整合終端方法、特に直流結合
平衡伝送回路における平衡伝送整合終端方法に関
す。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a balanced transmission matched termination method, particularly to a balanced transmission matched termination method in a DC-coupled balanced transmission circuit.
１個以上の送信回路と受信回路間で情報を転送
する場合に、これ等の送信回路および受信回路を
同一平衡伝送路に接続し、該平衡伝送路を経由し
て相互に情報を転送する直流結合平衡伝送回路が
広く使用されている。 When transferring information between one or more transmitting circuits and receiving circuits, these transmitting circuits and receiving circuits are connected to the same balanced transmission path, and the information is transferred to each other via the balanced transmission path. Coupled balanced transmission circuits are widely used.
第１図は従来ある直流結合平衡伝送回路の一例
を示す図で、第１図において複数個の送信回路
DVと受信回路RCが平衡伝送路Ｂに接続され、
該平衡伝送路Ｂを経由して情報の転送を行う。ま
た平衡伝送路Ｂは両端を終端抵抗Ｒ１により終端
され、該終端抵抗Ｒ１は前記平衡伝送路Ｂの２線
間の特性インピーダンスZbに等しく整合されて
おり、送信回路DVから送出される信号に対し、
平衡伝送路Ｂの両端において反射波が発生するの
を防止している。しかし平衡伝送路Ｂの２線対地
間の特性インピーダンスZuに対する整合は何等
配慮されていない。従つて平衡伝送路Ｂの２線対
地間に生ずる信号あるいは外来雑音に対する反射
波が発生する。通常送信回路DVの出力インピー
ダンスが高い場合は第２図に示される如く、出力
電圧Voが正の場合は高インピーダンス状態にあ
るが、出力電圧Voが負の場合には低インピーダ
ンス状態となる。従つて送信回路DVにおいて前
記平衡伝送路Ｂの２線対地間に負電位の反射波が
生ずると、低インピーダンスとなる送信回路DV
により信号波形が歪み、情報の正確な転送を妨げ
兼ねない。 Figure 1 is a diagram showing an example of a conventional DC-coupled balanced transmission circuit.
DV and receiving circuit RC are connected to balanced transmission line B,
Information is transferred via the balanced transmission path B. Further, the balanced transmission line B is terminated at both ends by a terminating resistor R1, which is matched equally to the characteristic impedance Zb between the two wires of the balanced transmission line B, and the terminal resistor R1 is matched equally to the characteristic impedance Zb between the two wires of the balanced transmission line B. ,
This prevents reflected waves from occurring at both ends of the balanced transmission line B. However, no consideration is given to matching the characteristic impedance Zu between the two lines of the balanced transmission line B to the ground. Therefore, a reflected wave is generated in response to a signal generated between the two wires of the balanced transmission line B and the ground or external noise. Normally, when the output impedance of the transmitting circuit DV is high, as shown in FIG. 2, it is in a high impedance state when the output voltage Vo is positive, but it is in a low impedance state when the output voltage Vo is negative. Therefore, when a negative potential reflected wave occurs between the two wires of the balanced transmission line B and the ground in the transmitting circuit DV, the transmitting circuit DV becomes low impedance.
This can distort the signal waveform and prevent accurate transmission of information.
本発明の目的は、従来ある直流結合平衡伝送回
路における前述の如き欠点を除去し、前記平衡伝
送路の２線対地間における反射波の発生を防ぎ、
正確な情報転送が可能な直流結合平衡伝送回路の
実現にある。 The object of the present invention is to eliminate the above-mentioned drawbacks in conventional DC-coupled balanced transmission circuits, prevent the generation of reflected waves between two lines of the balanced transmission line and the ground,
The aim is to realize a DC-coupled balanced transmission circuit that can transfer accurate information.
この目的は、直流結合平衡伝送回路において、
平衡伝送路の少くとも一端に該平衡伝送路の２線
間特性インピーダンスと整合のために接続される
終端抵抗の中点と対地間に、前記平衡伝送路の２
線対地間特性インピーダンスと整合する様、抵抗
と蓄電器とを直列に接続することにより達成され
る。 This purpose is to
A terminating resistor connected to at least one end of the balanced transmission line for matching the characteristic impedance between the two lines of the balanced transmission line and the ground is connected to the ground.
This is achieved by connecting a resistor and a capacitor in series to match the line-to-ground characteristic impedance.
以下、本発明の一実施例を第３図により説明す
る。第３図において送信回路DVおよび受信回路
RC間で情報転送を行う平衡伝送路Ｂの両端は抵
抗Ｒ２，Ｒ３，Ｒ４および蓄電器Ｃから構成され
る整合終端回路によりそれぞれ終端されている。
各抵抗Ｒ２，Ｒ３，Ｒ４および蓄電器Ｃの値はそ
れぞれ(1)式および(2)式を満足する様選ばれる。 An embodiment of the present invention will be described below with reference to FIG. In Figure 3, the transmitting circuit DV and the receiving circuit
Both ends of the balanced transmission line B, which transfers information between RCs, are each terminated by a matching termination circuit composed of resistors R2, R3, R4 and a capacitor C.
The values of each resistor R2, R3, R4 and capacitor C are selected so as to satisfy equations (1) and (2), respectively.
Ｒ２＝Ｒ３＝Zb／２ …(1)
Ｒ４＋１／jωC＝Zn−１／４Zb …(2)
但し Zb：平衡伝送路Ｂの２線間の特性インピ
ーダンス
Zu：平衡伝送路Ｂの２線対地間の特性イ
ンピーダンス
この結果、平衡伝送路Ｂの２線間から見た該整
合終端回路の直流抵抗Zdcは、(1)式から
Zdc＝Ｒ２＋Ｒ３＝（Zb／２）×２＝Zb
と求められ、該平衡伝送路Ｂの２線間特性インピ
ーダンスZbに等しくなる。また平衡伝送路Ｂの
２線対地間から見た該整合終端回路の交流インピ
ーダンスZacは、(1)，(2)式から
Zac＝１／｛（１／Ｒ２）＋（１／Ｒ３）｝
＋Ｒ４＋１／（jwC）
＝（Ｒ２）／２＋Ｒ４＋１／（jwC）
＝Zb／４＋Zu−Zb／４
＝Zu
と求められ、該平衡伝送路Ｂの２線対地間特性イ
ンピーダンスZuに等しくなり、直流及び交流共
に整合状態となる。 R2=R3=Zb/2...(1) R4+1/jωC=Zn-1/4Zb...(2) However, Zb: Characteristic impedance between the two wires of balanced transmission line B Zu: Between the two wires of balanced transmission line B and ground Characteristic Impedance As a result, the DC resistance Zdc of the matching termination circuit seen from between the two wires of balanced transmission line B is determined from equation (1) as Zdc=R2+R3=(Zb/2)×2=Zb, and the balanced It becomes equal to the characteristic impedance Zb between two lines of the transmission line B. Also, the AC impedance Zac of the matching termination circuit seen from the two wires of balanced transmission line B to the ground is calculated from equations (1) and (2) as follows: Zac = 1/{(1/R2) + (1/R3)} +R4+1 /(jwC) = (R2)/2+R4+1/(jwC) =Zb/4+Zu-Zb/4 =Zu, which is equal to the two-wire to ground characteristic impedance Zu of the balanced transmission line B, and both DC and AC are matched. state.
従つて平衡伝送路Ｂの２線間に送信される信号
に対する反射波のみならず、２線対地間に生ずる
信号あるいは外来雑音に対する反射波の発生も防
がれる。 Therefore, not only reflected waves for signals transmitted between the two lines of balanced transmission line B, but also reflected waves for signals generated between the two lines and the ground or for external noise are prevented from occurring.
以上の説明から明らかな如く、本実施例によれ
ば平衡伝送路Ｂの両端は、整合終端回路により２
線間特性インピーダンスZbのみならず、２線対
地間特性インピーダンスZuに対しても整合され
ているため、平衡伝送路Ｂの２線対地間に生ずる
信号あるいは外来雑音に対し、負の反射波の発生
する恐れはなく、送信回路DVの出力インピーダ
ンスが低値になることも防止される。 As is clear from the above description, according to this embodiment, both ends of the balanced transmission line B are connected to two terminals by matching termination circuits.
Since it is matched not only to the line-to-line characteristic impedance Zb but also to the 2-line to ground characteristic impedance Zu, negative reflected waves are generated for signals or external noise occurring between the 2 lines and the ground on balanced transmission line B. There is no risk of this happening, and the output impedance of the transmitting circuit DV is also prevented from becoming a low value.
なお第３図はあくまで本発明の一実施例に過ぎ
ず、例えば同一平衡伝送路Ｂに接続される送信回
路DVまたは受信回路RCは複数に限定されるこ
とはなく、単数の場合においても本発明の効果は
変らない。本発明の他の実施例として、１個の送
信回路DVおよび複数個の受信回路RCが接続さ
れる直流結合平衡伝送回路を第４図に示す。第４
図において平衡伝送路Ｂの一端には抵抗Ｒ２，Ｒ
３，Ｒ４および蓄電器Ｃから構成される整合終端
回路が接続されている。各抵抗Ｒ２，Ｒ３，Ｒ４
および蓄電器Ｃの値は第３図におけると同様、そ
れぞれ(1)式および(2)式を満足する様選ばれること
により、送信回路DVから送信される信号あるい
は外来雑音の反射波が平衡伝送路Ｂの２線間およ
び２線対地間に発生することは防止される。 Note that FIG. 3 is only one embodiment of the present invention, and for example, the number of transmitting circuits DV or receiving circuits RC connected to the same balanced transmission line B is not limited to a plurality, and even if there is a single transmitting circuit DV or receiving circuit RC, the present invention is applicable. The effect of is unchanged. As another embodiment of the present invention, FIG. 4 shows a DC-coupled balanced transmission circuit to which one transmitting circuit DV and a plurality of receiving circuits RC are connected. Fourth
In the figure, one end of the balanced transmission line B has resistors R2 and R
A matching termination circuit consisting of 3, R4 and capacitor C is connected. Each resistor R2, R3, R4
As in Fig. 3, the values of capacitor C and capacitor C are selected to satisfy equations (1) and (2), respectively, so that the signal transmitted from transmitter circuit DV or the reflected wave of external noise is transmitted through the balanced transmission path. This is prevented from occurring between the two lines of B and between the two lines and the ground.
以上、本発明によれば直流結合平衡伝送回路に
おいて、平衡伝送路の２線対地間に信号あるいは
外来雑音の反射波が発生するのを防止することが
でき、正確な情報転送が可能となる。 As described above, according to the present invention, in a DC-coupled balanced transmission circuit, it is possible to prevent reflected waves of signals or external noise from occurring between two wires of a balanced transmission line and the ground, and accurate information transfer is possible.
第１図は従来ある直流結合平衡伝送回路の一例
を示す図、第２図は送信回路の出力インピーダン
ス特性の一例を示す図、第３図は本発明の一実施
例による直流結合平衡伝送回路を示す図、第４図
は本発明の他の実施例を示す図である。
図において、Ｂ……平衡伝送路、DV……送信
回路、RC……受信回路、Ｒ１，Ｒ２，Ｒ３，Ｒ
４……抵抗、Ｃ……蓄電器。
FIG. 1 is a diagram showing an example of a conventional DC-coupled balanced transmission circuit, FIG. 2 is a diagram showing an example of the output impedance characteristics of a transmitting circuit, and FIG. 3 is a diagram showing an example of a DC-coupled balanced transmission circuit according to an embodiment of the present invention. The figure shown in FIG. 4 is a diagram showing another embodiment of the present invention. In the figure, B...balanced transmission line, DV...transmission circuit, RC...reception circuit, R1, R2, R3, R
4...Resistance, C...Capacitor.
Claims (1)
の少くとも一端に該平衡伝送路の２線間特性イン
ピーダンスと整合のために接続される終端抵抗の
中点と対地間に、前記平衡伝送路の２線対地間特
性インピーダンスと整合する様、抵抗と蓄電器と
を直列に接続することを特徴とする平衡伝送整合
終端方法。1. In a DC-coupled balanced transmission circuit, a terminating resistor connected to at least one end of the balanced transmission line for matching the characteristic impedance between two lines of the balanced transmission line is connected between the midpoint and the ground. A balanced transmission matching termination method characterized by connecting a resistor and a capacitor in series to match the line-to-ground characteristic impedance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6259280A JPS56158554A (en) | 1980-05-12 | 1980-05-12 | Balancing transmission matching and terminating method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6259280A JPS56158554A (en) | 1980-05-12 | 1980-05-12 | Balancing transmission matching and terminating method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56158554A JPS56158554A (en) | 1981-12-07 |
| JPS6361816B2 true JPS6361816B2 (en) | 1988-11-30 |
Family
ID=13204741
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6259280A Granted JPS56158554A (en) | 1980-05-12 | 1980-05-12 | Balancing transmission matching and terminating method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56158554A (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5220211A (en) * | 1991-10-28 | 1993-06-15 | International Business Machines Corporation | High speed bus transceiver with fault tolerant design for hot pluggable applications |
| JPH0680651U (en) * | 1993-04-28 | 1994-11-15 | 株式会社サンパック | Handbag made of synthetic resin |
| DE19525350A1 (en) * | 1995-07-12 | 1997-01-16 | Bosch Gmbh Robert | Device for a line termination of a two-wire line |
| JP3958157B2 (en) * | 2002-08-30 | 2007-08-15 | キヤノン株式会社 | Termination circuit for differential signal transmission line |
| JP6147155B2 (en) * | 2013-02-21 | 2017-06-14 | 三菱電機株式会社 | Terminator |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5426328B2 (en) * | 1973-11-24 | 1979-09-03 | ||
| JPS546808U (en) * | 1977-06-17 | 1979-01-17 |
-
1980
- 1980-05-12 JP JP6259280A patent/JPS56158554A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS56158554A (en) | 1981-12-07 |
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