JPS6362124B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a push-pull amplifier circuit, which has extremely low heat loss, high power efficiency, prevents crossover distortion and switching distortion, and has a low distortion push-pull output. The object of the present invention is to provide a push-pull amplifier circuit that can output with a circuit configuration that is easy to integrate into an IC.

Traditionally, the final stages of audio equipment, such as power amplifiers, have the advantage of being directly connected to loads that would be destroyed if DC voltage is applied, such as speakers.
Push pull (SEPP) amplifier circuits are widely used. Class A, class AB, or class B amplifier circuits have conventionally been used as such push-pull amplifier circuits, depending on their operating points. Among them, A
In class push-pull amplifier circuits, the output stage transistor always operates in a region with good linearity, so the output signal waveform during operation is good, and there is almost no crossover distortion or switching distortion. Since it is necessary to flow an idle current of half the maximum rated output current, the disadvantage is that heat loss is large and efficiency is low.

On the other hand, in principle, the idle current of a class B push-pull amplifier circuit is zero, and the idle current value of a class AB push-pull amplifier circuit is smaller than that of a class A push-pull amplifier circuit, so these amplifier circuits have low heat loss. Although it has the advantage of being small and highly efficient, it is also possible to turn on a pair of output stage transistors alternately.
In order to operate in the off state, a region with strong nonlinearity is also used, which has the drawback of generating crossover distortion and switching distortion.

Therefore, by eliminating the above-mentioned drawbacks of conventional class A, class AB, and class B push-pull amplifier circuits, we have created a push-pull amplifier circuit with low heat loss, no crossover distortion, and no switching distortion, with an extremely low idle current value. In addition, various structures have been proposed in which the bias voltage value is varied according to the input AC signal level so that a forward bias voltage is always applied between the base and emitter of the output stage transistor. FIGS. 1 and 2 each show a circuit diagram of an example of a conventional push-pull amplifier circuit having such a variable bias circuit (or active bias circuit).

In the conventional push-pull amplifier circuit shown in FIG. 1, 1 and 2 are input terminals, 3 and 4 are constant current circuits, 5 is an output terminal, Tr ₁ and Tr ₃ are Darlington-connected NPN transistors, and Tr ₂ and Tr ₄ are Darlington-connected PNP transistors. NPN transistor when there is no signal
No current flows through Tr ₇ , diode D ₁ , PNP transistor Tr ₈ , and diode D ₂ and are in a cut-off state, and transistors Tr ₃ and
Each emitter of Tr ₄ has the base-emitter voltage of transistors Tr ₅ and Tr ₆ taken out from NPN transistor Tr ₅ and PNP transistor Tr ₆ ,
A predetermined idle current is caused to flow by a bias voltage determined by resistors Ra, Rb, Rc, Rd, and Re.

Now, suppose that a positive half-wave of the input AC signal enters input terminals 1 and 2, the voltage between input terminal 1 and output terminal 5 increases, and this causes resistance Ra to rise.
A current flows to the base of the transistor _Tr7 through Rb and Rb, and thus a current flows to the collector and emitter of the transistor _Tr7 . Therefore, the voltage drop across the resistor Ra increases, the base voltage of the transistor Tr ₅ decreases, and the transistor Tr ₅ is biased in the cut-off direction. The bias voltage will increase. This prevents output stage transistors Tr ₂ and Tr ₄ from being cut off. When a negative half wave of the input AC signal arrives, transistor Tr ₆ operates in the same way as above.
is biased in the cut-off direction, and the input terminals 1,
The bias voltage between the output stage transistors Tr 1 and Tr 3 is increased to prevent output stage transistors Tr ₁ and Tr ₃ from being cut off.

Next, the operation of the conventional push-pull amplifier circuit shown in FIG. 2 will be explained. However, the same components as in FIG. 1 are denoted by the same reference numerals, and the explanation thereof will be omitted. In Fig. 2, constant current circuits 6 and 7 are transistors together with diodes D ₃ and D ₄ and resistors Rg and Rh.
It constitutes a circuit that determines the operating points of Tr ₁₁ and Tr ₁₂ . When there is no signal, almost no current flows through the PNP transistor Tr ₁₁ , the diodes D ₃ , D ₄ , and the NPN transistor Tr ₁₂ , but the NPN transistor Tr ₉ ,
A current is caused to flow through the diode D ₅ , the variable resistor VR, and the PNP transistor Tr ₁₀ , respectively, so that a predetermined idle current is caused to flow by the bias voltage generated between the input terminals 1 and 2. This idle current is determined by resistors Rf, Ri, variable resistor VR, etc.

Here, if a positive half-wave of the input AC signal enters input terminals 1 and 2, the voltage between input terminal 1 and output terminal 5 increases, so input terminal 1, resistor Rf, transistor Tr ₁₁ , diode D ₃ ,
A current flows toward the output terminal 5 via the resistor Rg, and at the same time, the collector current of the transistor _Tr11 flows to the diode _D5 , the variable resistor VR, and the transistor _Tr10 . As a result, the voltage drop across the resistor Rf becomes large, and the base voltage of the transistor Tr ₉ decreases, so that the collector-emitter voltage of the transistor Tr ₉ increases. As a result, the bias voltage between input terminals 1 and 2 increases, and the output stage transistor
Tr ₂ and Tr ₄ are prevented from being cut off. When a negative half wave enters, the collector-emitter voltage of transistor Tr ₁₀ increases in the same way as above, so the bias voltage between input terminals 1 and 2 increases, and output stage transistors Tr ₁ and Tr ₃ is prevented from being cut off.

Therefore, the conventional amplifier circuit shown in FIG. 1 has PNPs in its bias circuit as shown by Tr ₆ and Tr ₈ .
Two transistors are used, while the second
The conventional amplifier circuit shown in the figure has a bias circuit of
Two PNP transistors are used as shown by Tr ₁₀ and Tr ₁₁ . When such a PNP transistor is made into a monolithic IC, the grounded emitter current amplification factor h _fe is small and the transition frequency is low.
Due to drawbacks such as low _T and poor current linearity, it is not suitable for IC implementation. For this reason,
The conventional push-pull amplifier circuits shown in FIGS. 1 and 2 that use two PNP transistors in the bias circuit have the disadvantage that it is difficult to integrate the bias circuit into an IC. In addition, in the conventional push-pull amplifier circuit shown in Fig. 2, a large current of about 10 mA to 20 mA flows through the PNP transistor Tr ₁₀ , but if such a PNP transistor Tr ₁₀ were to be integrated into an IC, the chip area would be extremely large, and a dedicated Since constant current circuits 6 and 7 are required, there is a disadvantage that it is expensive. On the other hand, the conventional push-pull amplifier circuit shown in FIG. 1 has a drawback in that the idle current cannot be made very small.

On the other hand, the present applicant previously proposed in Japanese Patent Application No. 53-133568 (Japanese Unexamined Patent Publication No. 55-60316) that the output stage transistor does not cut off when inputting both positive and negative half waves of the input AC signal. We have proposed a push-pull amplifier that maintains high-level operation and, compared to the conventional push-pull amplifier circuits mentioned above, can create a smoother connection between upper and lower waveforms so that there is no crossover distortion in the combined output signal waveform. However, this proposed push-pull amplifier has two sets of current mirror circuits in its bias circuit, and one set of current mirror circuits is connected to a pair of current mirror circuits.
Since it was composed of PNP transistors, it also had the disadvantage of not being suitable for monolithic IC implementation.

The present invention eliminates the above-mentioned drawbacks, and one embodiment thereof will be described with reference to the drawings from FIG. 3 onwards.

FIG. 3 shows a circuit diagram of an embodiment of the push-pull amplifier circuit according to the present invention. In the figure, 1 and 2 are input terminals, 3 and 4 are constant current circuits, and 5 is an output terminal, and these are terminals with the same numbers in the circuits shown in FIGS. are the same. Further, in FIG. 3, a circuit portion 8 surrounded by a broken line is a bias circuit portion to be made into a monolithic IC. Input terminal 1 is the emitter resistance R ₃ of three-stage Darlington-connected NPN transistors Q ₁ , Q ₃ , Q ₅ and Q ₅
It is connected to the output terminal 5 via. In addition, the input terminal 2 is connected to the output terminal 5 via the emitter resistor R ₄ of three-stage Darlington-connected PNP transistors Q ₂ , Q ₄ , Q ₆ , and Q ₆ . A resistor _R1 is connected between the emitters of transistors _Q1 and _Q2 , and a resistor _R2 is connected between the emitters of transistors _Q3 and _Q4 . That is, the NPN output stage transistors Q ₁ , Q ₃ , Q ₅ and the PNP output stage transistors Q ₂ , Q ₄ , Q ₆ are connected in SEPP, respectively.

The connection point between input terminal 1 and the base of transistor Q ₁ is constant current circuit 3 and NPN transistor Q ₇
while forming an emitter follower via a resistor R ₅ and diode-connected NPN transistors Q ₉ and Q ₁₁ in series.
Connected to the emitter of PNP transistor _Q13 . The emitter of transistor Q ₇ is a variable resistor VR ₁ , which is an example of an impedance element for a constant voltage source.
is connected to the collector of NPN transistor _Q8 through. A resistor _R7 is connected between the base and collector of the transistor _Q8 , and the base of the transistor _Q8 is connected to the collector of the transistor _Q14 , that is, the output terminal of a current mirror circuit described later.

Also, the emitter of transistor _Q8 and input terminal 2
The connection point between Q2 and the base of transistor _Q2 is an NPN transistor that forms a current mirror circuit.
While connected to each emitter of Q ₁₄ and Q ₁₅ respectively,
It is connected to the constant current circuit 4. The base of the transistor _Q14 and the base and collector of the transistor _Q15 are connected to emitter followers via a resistor _R6 (selected to have the same resistance value as the resistor _R7 ) and a diode-connected NPN transistor _Q10 in series. It is connected to the emitter of the constituent NPN transistor _Q12 . Further, the bases of the transistors Q ₁₂ and Q ₁₃ are connected to the connection point between the resistors R ₃ and R ₄ and the output terminal 5. Furthermore, a transistor
The collector of Q ₁₂ is connected to the above point and the transistor
The collector of Q ₁₃ is connected to the above point.

Next, the operation of the circuit of this embodiment having the above configuration will be explained. The input AC signal is applied to input terminal 1 or 2 or both, and the NPN output stage transistor
The signal is output from the output terminal 5 via Q ₁ , Q ₃ , Q ₅ and resistor R ₃ or via PNP output stage transistors Q ₂ , Q ₄ , Q ₆ and resistor R ₄ .

Now, if we assume that there is no input AC signal at either input terminal 1 or 2, then the current flowing from transistor Q ₉ → Q ₁₁ → Q ₁₃ and the current flowing from transistor Q ₁₂ →Q ₁₀ →Resistor R ₆ →Transistor Q The DC voltage across the variable resistor VR ₁ is set so that the current flowing through the transistor Q ₁₅ and the current flowing through the transistor Q ₁₄ are both approximately zero. Further, the currents in the constant current circuits 3 and 4 flow in the order of transistor Q ₇ → variable resistor VR ₁ → transistor Q ₈ (this also flows when an AC signal is input). Note that the common emitter DC current amplification factor h _FE of each transistor Q ₇ and Q ₈ is sufficiently large, and the resistance R ₅ and R ₇ due to its base current is
It is assumed that the voltage drop at From the above, when there is no signal, constant voltages with substantially equal absolute values are applied between the points and between the points, and the transistors Q ₅ and Q ₆
An idle current will be passed through each emitter. This idle current typically ranges from 50mA to 50mA, regardless of the maximum output rating of this push-pull amplifier circuit.
150mA is sufficient. Therefore, a typical A that requires 1/2 of the maximum output current as idle current
For example, a class B push-pull amplifier circuit with an output of 100W requires an idle current of about 3.5A, but compared to this, the heat loss of this embodiment is extremely small, and it is a class B push-pull amplifier circuit that is widely used as an audio amplifier. Strictly speaking, it is comparable to a class AB (class AB) push-pull amplifier circuit, since a small amount of idle current is flowing through it.

Here, the output stage transistor Q ₅ of this embodiment,
The emitter current of Q ₆ and the voltage between points,
The relationship between the voltage and the voltage between the points is shown in FIG. 6 by solid lines I _A and I _B. In Figure 6, the dashed line _A is the output stage transistor.
The relationship between the sum of the base-emitter voltage V _BE of Q ₁ , Q ₃ , and Q ₅ and the emitter current of Q ₅ is shown by the dashed-dotted line.
_B shows the relationship between the sum of the base-emitter voltages V _BE of output stage transistors Q ₂ , Q ₄ , and Q ₆ and the emitter current of Q ₆ . Further, broken lines _A and _B are straight lines showing the relationship between the voltage drop caused by the emitter resistors R ₃ and R ₄ and the emitter currents of Q ₅ and Q ₆ , respectively. The voltage between the points where the solid line _A is the sum of the base-emitter voltages of the output stage transistors Q ₁ , Q ₃ , and Q ₅ and the voltage across the emitter resistor R ₃ is
It shows the relationship between the emitter current of _Q5 , and similarly, the solid line _B shows the relationship between the voltage between points and the emitter current of _Q6 .

When there is no signal as described above, a bias voltage of a magnitude shown by X in FIG. 6 is applied, and idle currents shown by ₀ and _-0 flow.

Next, if a positive half wave of the AC signal comes in,
When a load is connected to the output terminal 5 shown in Figure 3, an output current flows and the emitter currents of the transistors Q ₁ , Q ₃ , Q ₅ increase compared to when there is no signal, and the resistor R ₃
The voltage across the points increases, and the voltage between the points increases according to the input signal level (this can be expressed as △V _AC
). Then, resistor R ₅ → transistor Q ₉ →
A current flows from Q ₁₁ to Q ₁₃ , and if the changes in the base-emitter voltages of transistors Q ₉ , Q ₁₁ , and Q ₁₃ at this time are respectively △V _BE , then there are points at both ends of resistor R ₅ . Since a voltage is generated by subtracting 3△V _BE from the positive change in voltage between _△ V _AC , this (△V _AC -3△
A voltage of V _BE ) is generated. On the other hand, transistor
Since no current flows through each of Q ₁₀ , Q ₁₂ , Q ₁₄ , and Q ₁₅ , the collector-emitter voltage of transistor Q ₈ remains the same as when there is no signal and does not change. Therefore, the bias voltage value between points is, for example, as shown by Y in FIG. 6 as a whole (△V _AC -3
△V _BE ) increases in the positive direction, and the voltage between the points is 3△V _BE
becomes smaller. In other words, conventional AB class or B class
According to the class push-pull amplifier circuit, since it is a fixed bias, in the above case the voltage between the points was reduced by △V _AC , biasing transistors Q ₂ , Q ₄ and Q ₆ in the opposite direction. However, in this embodiment, transistors Q ₂ , Q ₄ and Q ₆ are always biased in the cut-off direction by 3△V _BE , and the forward bias is always maintained, and the emitter current value of transistor Q ₆ is equal to the idle current. The absolute value is smaller than ₀ .

Next, when the negative half wave of the AC signal comes in, the voltage between the points becomes larger than when there is no signal (this voltage change is △V _BC ), and the transistor Q ₁₂
A current flows through →Q ₁₀ →resistor R ₆ →Q ₁₅ , and therefore, a current of the same value as transistor Q ₁₅ also flows through transistor Q ₁₄ , which forms a current mirror circuit together with transistor Q ₁₅ . As a result, there is a voltage change across the resistor _R7 , which has the same resistance value as the resistor _R6 , equal to the voltage change across the resistor _R6 , that is, the base-emitter voltage of each of the transistors _Q10 , _Q12 , _Q15 at this time. If the amount of change in voltage between points is △V _BE ', then a voltage change will occur that is obtained by subtracting 3△V _BE ' from the amount of voltage change △V _BC between points. On the other hand, at this time, since almost no current flows through the resistor R ₅ and the transistors Q ₉ , Q ₁₁ and Q ₁₃ , the collector-emitter voltage value of the transistor Q ₇ is the same as when there is no signal. Therefore, for example, as shown by Z in FIG.
The bias voltage value between points is negative (△
V _BC -3△V _BE '), and the bias voltage between the points decreases by 3△V _BE ' in the cutoff direction.

From the above, when a medium level sine wave is input, the voltage between the points will be as shown by the solid line V AC in Figure 4, and the voltage between the points will be as shown by the solid line V _AC in Figure 4. In the figure, the emitter current waveforms of transistors Q ₅ and Q 6 are as shown by the solid line V _BC , and the waveforms of the emitter currents of transistors Q 5 and Q ₆ are
As shown by solid lines i _A and i _B in the figure, the push-pull output signal waveform obtained by combining these becomes a good sine wave with very little switching distortion and crossover distortion.

Note that when a small level sine wave is input, the voltage between the points and the voltage between the points are as shown by the dashed-dotted lines V _AC ′ and V _BC ′ in FIG _. , Q ₆ are as shown by the dashed-dotted lines i _A ′ and i _B ′ in FIG. In addition, the voltage between points and the voltage between points when a large-level sine wave is input are shown by the two-dot chain lines V _AC ″, V _BC ″ in Figure 4.
At this time, the transistor Q ₅ ,
The emitter current of Q ₆ is as shown by two-dot chain lines i _A ″ and i _B ″ in FIG.

Next, the monolithic IC of circuit section 8 of this embodiment
I will explain about this.

In this embodiment, only one PNP transistor _Q13 is used in the bias circuit. Moreover, current flows through this PNP transistor _Q13 only when a positive direction input signal is received, and the current is approximately 1.5 mA at maximum, which is an extremely small value. As mentioned above, it is generally difficult to make a PNP transistor into a monolithic IC;
The chip area is several times larger than the chip area when an NPN transistor with the same performance is made into a monolithic IC, but it is very difficult to make a PNP transistor _Q13 into a monolithic IC through which such an extremely small value of current flows. isn't it. Therefore, compared to the conventional circuit, the bias circuit of this embodiment has
It can be said that the circuit configuration is easy to integrate into an IC.

Note that when implemented as an IC, the threshold level of the transistors Q ₉ to _{Q 15} can be made high, so that the current flowing through the transistors Q ₉ to Q ₁₅ when there is no signal can be reliably reduced to approximately zero. In addition, in this embodiment, three stages of output stage transistors are connected in Darlington, so three transistors (i.e., Q ₉ , Q ₁₁ and Q ₁₃ , or Q ₁₂ , Q ₁₅ ), but for a circuit with two-stage Darlington connection, the collector and emitter terminals of transistor Q ₉ and the collector and emitter terminals of transistor Q ₁₀ exposed on the IC board should be connected respectively. This allows the bias voltage change characteristics to match the characteristics required by the power output stage.

As described above, in the push-pull amplifier circuit according to the present invention, the base of the first output stage transistor among the plurality of NPN output stage transistors forms an emitter follower via at least the first resistor.
Connect to the emitter of the PNP transistor and
A first resistor is connected to the collector of the first NPN transistor connected between its collector and base, and to the collector of the NPN transistor constituting the emitter follower, and the base of the first stage transistor of the plurality of PNP output stage transistors is connected to the collector of the first NPN transistor connected between the collector and base of the first resistor. connected to the emitters of each of the plurality of NPN transistors constituting the current mirror circuit, the emitter of the second NPN transistor, and the collector of the PNP transistor constituting the emitter follower, respectively;
The bases of the plurality of NPN transistors forming the current mirror circuit are connected via at least a second resistor to the emitters of the NPN transistors forming the emitter follower, and the bases of the NPN transistors and PNP transistors forming the emitter follower are respectively output as NPN outputs. Stage transistor and PNP
A third resistor is connected to the emitter output terminal of the output stage transistor, the collector output terminal of the NPN transistor constituting the current mirror circuit is connected to the base of the second NPN transistor, and the third resistor has approximately the same resistance value as the second resistor. The collector of the second NPN transistor connected between the collector and base is connected to the first transistor through an impedance element for a constant voltage source.
Since it is connected to the emitter of the NPN transistor, it is possible to create a circuit configuration that is extremely easy to integrate into an IC.Furthermore, the output stage transistor can always be biased in the forward direction throughout the entire cycle of the input signal, so switching distortion can be reduced. It is possible to obtain a good push-pull output voltage waveform with no crossover distortion and very little crossover distortion.
In addition, since the idle current can be smaller than that of conventional class A or class AB push-pull amplifier circuits, regardless of the maximum output rating, heat loss is extremely small and the efficiency is comparable to that of class B push-pull amplifier circuits. Furthermore, the bias circuit does not require a dedicated constant current circuit, and together with the use of an IC, it has many advantages such as being extremely compact and inexpensive.

[Brief explanation of drawings]

1 and 2 are circuit diagrams showing respective examples of conventional circuits, FIG. 3 is a circuit diagram showing an embodiment of the circuit of the present invention, and FIG. 4 is a circuit diagram showing an example of the circuit of the present invention. 5 is a diagram showing an example of the output current waveform of the circuit of the present invention, and FIG. 6 is a diagram showing an example of the voltage between the input terminal and the output terminal and the emitter output current of FIG. FIG. 1, 2... Input terminal, 3, 4, 6, 7... Constant current circuit, 5... Output terminal, 8... IC circuit part,
Q ₁ , Q ₃ , Q ₅ ...NPN output stage transistor, Q ₂ ,
Q ₄ , Q ₆ ... PNP output stage transistor, Q ₇ , Q ₈ ...
…NPN transistor for bias voltage generation, Q ₁₂ …
...NPN transistor that constitutes the Emitsuta follower,
Q ₁₃ ... PNP transistor forming emitter follower, Q ₁₄ , Q ₁₅ ... NPN for current mirror circuit
transistor.

Claims (1)

[Claims] 1. In a push-pull amplifier circuit that obtains a push-pull amplified output signal from a plurality of NPN output stage transistors and a plurality of PNP output stage transistors, the base of the first output stage transistor of the plurality of NPN output stage transistors is connected to at least the first output stage transistor. Configure an emitsuta follower through the resistance of
Connect to the emitter of the PNP transistor and
The first resistor is connected to the collector of the first NPN transistor connected between its collector and base, and to the collector of the NPN transistor constituting the emitter follower, and the output of the first stage of the plurality of PNP output stage transistors is connected to the collector of the first NPN transistor connected between the collector and the base thereof. The base of the stage transistor is connected to the emitter of each of the plurality of NPN transistors constituting the current mirror circuit.
The emitter of the NPN transistor forming the emitter follower is connected to the collector of the PNP transistor forming the emitter follower, and the bases of the plurality of NPN transistors forming the current mirror circuit are connected via at least a second resistor to the NPN forming the emitter follower. an NPN transistor connected to the emitter of the transistor and forming the emitter follower;
Each base of the PNP transistor is connected to the emitter output terminal of the NPN output stage transistor and the PNP output stage transistor, respectively, and the collector output terminal of the NPN transistor constituting the current mirror circuit is connected to the base of the second NPN transistor. , a third resistor having substantially the same resistance value as the second resistor is connected between the collector and the base.
The collector of the NPN transistor is connected to the emitter of the first NPN transistor through an impedance element for a constant voltage source, and when there is no signal, the first and second resistors, the NPN transistor constituting the emitter follower, and PNP transistors and multiple components constituting the current mirror circuit
The collector of the first NPN transistor and the second
An idle current is caused to flow between the collector of the first NPN transistor and the collector of the second NPN transistor by a bias voltage generated between the emitter of the NPN transistor and the emitter of the NPN transistor.
A push-pull amplifier circuit characterized in that it is configured to amplify an input signal applied to one or both emitters of an NPN transistor.