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JPS6367778B2 - - Google Patents
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JPS6367778B2 - - Google Patents

Info

Publication number
JPS6367778B2
JPS6367778B2 JP57096420A JP9642082A JPS6367778B2 JP S6367778 B2 JPS6367778 B2 JP S6367778B2 JP 57096420 A JP57096420 A JP 57096420A JP 9642082 A JP9642082 A JP 9642082A JP S6367778 B2 JPS6367778 B2 JP S6367778B2
Authority
JP
Japan
Prior art keywords
squelch
circuits
circuit
switch
receiving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57096420A
Other languages
Japanese (ja)
Other versions
JPS58213539A (en
Inventor
Masaharu Ikeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57096420A priority Critical patent/JPS58213539A/en
Publication of JPS58213539A publication Critical patent/JPS58213539A/en
Publication of JPS6367778B2 publication Critical patent/JPS6367778B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/02Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/08Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
    • H04B7/0802Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using antenna selection
    • H04B7/0817Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using antenna selection with multiple receivers and antenna path selection
    • H04B7/082Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using antenna selection with multiple receivers and antenna path selection selecting best antenna path

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Noise Elimination (AREA)
  • Radio Transmission System (AREA)

Description

【発明の詳細な説明】 本発明はダイバシテイ方式のFM受信機に関す
るもので、スケルチ回路などの制御回路を受信回
路のそれぞれに有することなく1回路のスケルチ
回路によつて複数の受信回路の制御を行うことで
良好な受信状態を簡単に得ることができるもので
ある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a diversity type FM receiver, in which a plurality of receiving circuits can be controlled by one squelch circuit without having a control circuit such as a squelch circuit in each of the receiving circuits. By doing this, you can easily obtain good reception conditions.

第1図は従来のダイバシテイ方式のFM受信機
の構成を示している。
FIG. 1 shows the configuration of a conventional diversity-type FM receiver.

第1図において、1a,1bはそれぞれフロン
トエンド、2a,2bはそれぞれ中間周波増幅回
路、3a,3bはそれぞれ復調回路、4a,4b
はそれぞれの受信回路A,Bの出力レベルを同一
に調整するレベル調整回路、5a,5bはそれぞ
れスケルチ感度調整回路、6はダイバシテイ制御
回路、7はダイバシテイ選択スイツチ、8a,8
bはスケルチ回路11a,11bの発生したスケ
ルチ信号によりON,OFF制御されるスケルチス
イツチである。9は出力回路、10は出力端子で
ある。
In FIG. 1, 1a and 1b are front ends, 2a and 2b are intermediate frequency amplifier circuits, 3a and 3b are demodulation circuits, and 4a and 4b are respectively demodulation circuits.
are level adjustment circuits that adjust the output levels of the receiving circuits A and B to the same level, 5a and 5b are squelch sensitivity adjustment circuits, 6 is a diversity control circuit, 7 is a diversity selection switch, 8a and 8
b is a squelch switch that is controlled ON and OFF by squelch signals generated by squelch circuits 11a and 11b. 9 is an output circuit, and 10 is an output terminal.

上述した従来のダイバシテイ方式のFM受信機
では、スケルチ感度調整回路5a,5bおよびス
ケルチ回路11a,11bで受信回路Aあるいは
Bからの復調信号に含まれるホワイト雑音のレベ
ルにより、受信電波が弱くなつたことを検出した
場合、スケルチスイツチ8aあるいは8bを
OFFにして、その受信回路の復調信号を出力し
ないようにしている。一方、ダイバシテイ制御回
路6は、中間周波増幅回路2a及び2bから出力
される受信強度に関係した電圧の大小を比較し、
ダイバシテイ選択スイツチ7を受信状態の良い受
信回路AあるいはBの何れかを選択させる。この
場合、前記スケルチ感度調整回路5a,5bによ
りスケルチ回路11a,11bに供給される復調
信号は、前記スケルチ感度調整回路ごと、即ち受
信回路ごとにスケルチレベルの調整を行うことに
なる。したがつてこのFM受信機においてはスケ
ルチ回路11a,11bがそれぞれの受信回路
A,Bに対応して必要となり、スケルチ回路によ
るスケルチレベルの調整が複雑であつた。また、
スケルチ回路11a,11bの構成部品数が他の
回路のそれと比較してかなり多いことから、受信
機の小型化、低コスト化の上で欠点を有してい
た。
In the conventional diversity type FM receiver described above, the squelch sensitivity adjustment circuits 5a and 5b and the squelch circuits 11a and 11b weaken the received radio waves due to the level of white noise contained in the demodulated signal from the receiving circuit A or B. If this is detected, turn on squelch switch 8a or 8b.
It is set to OFF so that the demodulated signal of that receiving circuit is not output. On the other hand, the diversity control circuit 6 compares the magnitude of the voltage related to the reception strength output from the intermediate frequency amplification circuits 2a and 2b,
The diversity selection switch 7 is caused to select either receiving circuit A or B having a good receiving condition. In this case, the squelch level of the demodulated signals supplied by the squelch sensitivity adjustment circuits 5a, 5b to the squelch circuits 11a, 11b is adjusted for each squelch sensitivity adjustment circuit, that is, for each receiving circuit. Therefore, in this FM receiver, squelch circuits 11a and 11b are required for each of the receiving circuits A and B, and adjustment of the squelch level by the squelch circuits is complicated. Also,
Since the number of components of the squelch circuits 11a and 11b is considerably larger than that of other circuits, this has disadvantages in terms of miniaturization and cost reduction of the receiver.

本発明はこのような欠点を除去するもので、以
下に本発明について第2図に示す実施例ともに説
明する。同図において受信回路A,Bを構成する
各回路1a〜3a,1b〜3bとレベル調整回路
4a,4b、ダイバシテイ制御回路6、スケルチ
感度調整回路5a,5b、出力回路9および出力
端子10は第1図に示す従来のものと同一であ
る。
The present invention eliminates these drawbacks and will be described below with reference to an embodiment shown in FIG. In the figure, each circuit 1a to 3a, 1b to 3b constituting the receiving circuits A and B, level adjustment circuits 4a and 4b, diversity control circuit 6, squelch sensitivity adjustment circuits 5a and 5b, output circuit 9, and output terminal 10 are shown in FIG. This is the same as the conventional one shown in FIG.

第2図において、12aは出力回路用のダイバ
シテイスイツチ、12bは前記出力回路用のダイ
バシテイスイツチ12aと連動するダイバシテイ
スイツチでスケルチ回路14に復調信号を供給す
る。13はスケルチ回路14の出力によつて
ON,OFF制御されるスケルチゲートである。
In FIG. 2, 12a is a diversity switch for the output circuit, and 12b is a diversity switch that operates in conjunction with the diversity switch 12a for the output circuit, and supplies a demodulated signal to the squelch circuit 14. 13 is determined by the output of the squelch circuit 14.
This is a squelch gate that is controlled ON and OFF.

このように構成された実施例において、受信回
路A,Bでそれぞれ受信復調された信号はレベル
調整回路4a,4bに加えられ、同じレベルに調
整される。また同時にその復調信号はスケルチ感
度調整回路5a,5bに加えられ、感度調整が行
なわれる。
In the embodiment configured in this manner, the signals received and demodulated by the receiving circuits A and B are applied to the level adjusting circuits 4a and 4b and adjusted to the same level. At the same time, the demodulated signal is applied to squelch sensitivity adjustment circuits 5a and 5b, and sensitivity adjustment is performed.

各中間周波増幅回路2a,2bの出力はダイバ
シテイ制御回路6に加えられて比較され、その結
果にもとずきスイツチ12a,12bが制御さ
れ、受信状態の良好な受信回路系の出力がそれぞ
れスケルチゲート13、スケルチ回路14に加え
られる。スケルチゲート13を通過した信号は出
力回路9を介して出力される。
The outputs of the intermediate frequency amplification circuits 2a and 2b are applied to the diversity control circuit 6 and compared, and based on the results, the switches 12a and 12b are controlled, and the outputs of the receiving circuits with good reception conditions are squelched. It is applied to the gate 13 and the squelch circuit 14. The signal passing through the squelch gate 13 is outputted via the output circuit 9.

上記実施例より明らかなように本発明によれば
受信回路が2回路あるいはそれ以上のダイバシテ
イ方式のFM受信機であつても1個のスケルチ回
路を共用することができ、受信機の回路構成が簡
単になる。またこの結果、部品数を少なくするこ
とができ、したがつて受信機の小型化を図ること
ができる。さらにそれぞれの受信回路別にスケル
チ感度調整が行えるので受信機の最良状態を得易
い。
As is clear from the above embodiments, according to the present invention, one squelch circuit can be shared even if the receiving circuit is a diversity type FM receiver with two or more circuits, and the circuit configuration of the receiver is It gets easier. Furthermore, as a result, the number of parts can be reduced, and the receiver can therefore be made smaller. Furthermore, since the squelch sensitivity can be adjusted for each receiving circuit, it is easy to obtain the best condition for the receiver.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のFM受信機のブロツク図、第2
図は本発明の一実施例におけるFM受信のブロツ
ク図である。 A,B……受信回路、4a,4b……レベル調
整回路、12a,12b……ダイバシテイスイツ
チ、13……スケルチゲート、14……スケルチ
回路。
Figure 1 is a block diagram of a conventional FM receiver, Figure 2 is a block diagram of a conventional FM receiver.
The figure is a block diagram of FM reception in one embodiment of the present invention. A, B...reception circuit, 4a, 4b...level adjustment circuit, 12a, 12b...diversity switch, 13...squelch gate, 14...squelch circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 FM信号を受信し、復調する複数個の受信回
路と、前記各受信回路の復調出力が印加される複
数個のレベル調整回路及び複数個のスケルチ感度
調整回路と、前記複数個のレベル調整回路の中か
ら一つを選択する第1のスイツチと、前記第1の
スイツチと連動し、前記複数個のスケルチ感度調
整回路の中から一つを選択してスケルチ回路に印
加する第2のスイツチと、最良な受信状態にある
前記受信回路を選択するように前記第1のスイツ
チ及び第2のスイツチを制御するダイバシテイ制
御回路を備え、前記スケルチ回路から得られるス
ケルチ信号により前記第1のスイツチを通過した
信号をゲート制御するスケルチゲートからなる
FM受信機。
1. A plurality of receiving circuits that receive and demodulate FM signals, a plurality of level adjustment circuits and a plurality of squelch sensitivity adjustment circuits to which demodulated outputs of the respective reception circuits are applied, and the plurality of level adjustment circuits. a first switch that selects one from among the squelch sensitivity adjustment circuits, and a second switch that operates in conjunction with the first switch to select one of the squelch sensitivity adjustment circuits and apply it to the squelch circuit. , a diversity control circuit that controls the first switch and the second switch so as to select the receiving circuit in the best reception state, and a squelch signal obtained from the squelch circuit passes through the first switch. consists of a squelch gate that gate-controls the signal
FM receiver.
JP57096420A 1982-06-04 1982-06-04 Fm receiver Granted JPS58213539A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57096420A JPS58213539A (en) 1982-06-04 1982-06-04 Fm receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57096420A JPS58213539A (en) 1982-06-04 1982-06-04 Fm receiver

Publications (2)

Publication Number Publication Date
JPS58213539A JPS58213539A (en) 1983-12-12
JPS6367778B2 true JPS6367778B2 (en) 1988-12-27

Family

ID=14164481

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57096420A Granted JPS58213539A (en) 1982-06-04 1982-06-04 Fm receiver

Country Status (1)

Country Link
JP (1) JPS58213539A (en)

Also Published As

Publication number Publication date
JPS58213539A (en) 1983-12-12

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