JPS642249B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an analog-to-digital converter evaluation device, and more particularly to an analog-to-digital converter evaluation device for evaluating an analog input level at a change point at which at least the least significant bit of the analog-to-digital converter switches. The present invention relates to an analog-to-digital converter evaluation device that performs evaluation by finding an average value over a long period of time.

Generally, it is relatively easy to evaluate a digital-to-analog converter; for example, it is sufficient to input a predetermined digital value, measure the analog output level, and average it. However, analog
When evaluating a digital converter, measure the analog input level corresponding to the change point where the digital output from the analog-to-digital converter changes from a certain value i to the next higher value (i+1). Averaging is necessary and difficult. That is, since the amplification degree of the analog-to-digital converter itself, for example, the amplifier, changes stochastically over time, it is extremely difficult to determine the above-mentioned average value.

The purpose of the present invention is to solve the above points, and the probability that the digital output from the analog-to-digital converter to be evaluated changes from a certain value i to (i+1) and from the value (i+1) to i is for example
In addition to efficiently measuring the analog input level of 50:50, even if there is hysteresis including the measurement system, it is possible to measure the change point from value i to (i + 1) and value (i
Even if there is a difference between the point of change from +1) to The purpose is to be able to indicate the value. To that end, the analog-to-digital converter evaluation device of the present invention has the following features:
An analog-to-digital converter that generates a digital output corresponding to a given analog input is an analog-to-digital converter to be evaluated, and a change point at which at least the least significant bit of the digital output from the analog-to-digital converter to be evaluated changes. In an analog-to-digital converter evaluation device that measures analog input levels corresponding to A comparator that counts up or down based on the judgment result output of the comparator, and the count value is determined by a signal indicating that the count value exceeds the upper limit value and a signal indicating that the count value exceeds the lower limit value. An up-down counter is reset to the midpoint between the upper limit value and the lower limit value, and a signal from the up-down counter indicating that the upper limit value has been exceeded and a signal indicating that the lower limit value has been exceeded are integrated. A negative feedback circuit having an integrating circuit that increases or decreases the analog input to the analog-to-digital converter to be evaluated is provided, and the analog input level stabilized by the negative feedback circuit is measured and based on the measured value. The present invention is characterized in that the quality of the analog-to-digital converter to be evaluated is evaluated. This will be explained below with reference to the drawings.

FIG. 1 shows one embodiment of the overall configuration of an analog-to-digital converter evaluation device according to the present invention, FIG. 2 is an explanatory diagram explaining its operation, and FIG. 3 shows a digital version of the negative feedback circuit shown in FIG. An example configured as follows is shown below.

In Fig. 1, 1 is an analog-to-digital converter to be evaluated, 2 is a code setting section, 3 is a comparator, and 4
is a negative feedback circuit, 5 is an averaging circuit, 6 is an integrating circuit,
7 represents an analog level measuring device (integrating voltmeter).

Now, consider measuring the level of the analog input y at the point of change where the digital output a of the analog-to-digital converter 1 to be evaluated changes from the value "001" to "010". In this case, for example, the value "010" is set in the code setting section 2, and the output b (=010) from the code setting section 2 and the output a from the analog-to-digital converter 1 to be evaluated are connected to the comparator 3. Compare by.

For example, the comparator 3 is set to generate the value "1" as the output x when a<b, and to generate the value "-1" when ab, and the output x from the comparator 3 is sent to the averaging circuit 5. to generate a time average value x(t) of the output x. The output of the averaging circuit 5 is supplied to an integrating circuit 6, and the integrating circuit 6 generates an analog value y. The analog value y is negatively fed back as an input to the analog-to-digital converter 1 to be evaluated.

As a result, when the clock is applied, if the output a of the analog-to-digital converter 1 to be evaluated is smaller than the above value "010", the comparator 3 emits x=1, which is equal to or greater than the above value "010". In this case, comparator 3 will issue x=-1. Above output x
is time-averaged by the averaging circuit 5 and becomes an output (t), which is supplied to the integrating circuit 6. That is, the level of the analog input y of the analog-to-digital converter 1 to be evaluated gradually increases when the output a is smaller than the value b on average;
is on average equal to or larger than the above value b, it is gradually decreased.

Furthermore, as conceptually shown in Figure 2, analog
If the boundary in the code conversion of the digital converter is uncertain and the above analog input is less than the indicated value y ₁ , the output a will clearly be "001", and the indicated value
If y is ₃ or more, the output a will clearly be "010",
When the output a is between the indicated values y ₁ and y ₃ , even if the output a becomes ``001'' or ``010'' depending on the probability, the evaluation is The analog input y approaches the value y ₂ at which the probability that the output a of the target analog-to-digital converter 1 is a<b is equal to the probability that ab is 50:50. This value y is measured by the integrating type voltmeter 7
By measuring with , it becomes possible to measure the value y ₂ of the change point where the evaluation target analog-to-digital converter 1 shows the output "001" and the output "010".

On the other hand, even if there is an uncertain factor such as so-called hysteresis in the analog-to-digital converter to be evaluated, the illustrated comparator 3, or the negative feedback circuit 4, the average value can be measured by the integrating voltmeter 7. As a result, the influence of hysteresis is also smoothed out.

FIG. 3 shows an embodiment in which the negative feedback circuit 4 shown in FIG. 1 is configured as a digital type. Code 5 in the figure,
6 corresponds to FIG. 1, 8 is an M-bit up-down counter, 9 is an N-bit up-down counter, 10 is a digital-to-analog converter whose accuracy is known in advance, and 11 is an OR circuit. It represents.

If the M-bit up/down counter 8 is, for example, 3 bits, a preset value of "100" is preset corresponding to the preset input PRSET, and the output x from the comparator 3 shown in FIG. 1 is synchronized with the clock. +1 or -1 depending on the value. Then, when it is "111", x=+1
When input, the carry signal C becomes logic "1". Furthermore, if x=-1 is input in a state where it is "000", the carry down signal B becomes logic "1". Furthermore, when the signals C and B are generated or the measurement start signal EXTPR is applied, the M-ary up/down counter 8 is returned to the preset state.

The N-bit up-down counter 9 is incremented by 1 when the above carry signal C is applied, and -1 when the above carry down signal B is applied, and the content of the result (DATA) is sent to the digital-to-analog converter. 10. Needless to say, the counter 9 is selected to have a sufficiently large number of bits so that carry-overs and carry-downs do not normally occur.

The digital-to-analog converter 10 supplied with the content DATA generates an analog value y corresponding to the content, and this value y is input to the analog-to-digital converter 1 to be evaluated as shown in FIG.

As described above, according to the present invention, it is possible to easily and highly accurately determine the point of change depending on which input level the output of the analog-to-digital converter to be evaluated changes. By providing a negative feedback circuit having an up-down counter and an integrating circuit, the analog input level, which is the value to be measured, exhibits a stable value. By introducing a weighting coefficient into the illustrated averaging circuit as necessary, it is also possible to know the state of change from y ₁ to y ₃ illustrated in FIG. 2.

[Brief explanation of drawings]

FIG. 1 shows one embodiment of the overall configuration of an analog-to-digital converter evaluation device according to the present invention, FIG. 2 is an explanatory diagram explaining its operation, and FIG. 3 shows a digital version of the negative feedback circuit shown in FIG. An example configured as follows is shown below. In the figure, 1 represents the analog-to-digital converter to be evaluated, 2 represents the code setting section, 3 represents the comparator, 4 represents the negative feedback circuit, 5 represents the averaging circuit, 6 represents the integrating circuit, and 7 represents the analog level measuring device. .

Claims (1)

[Claims] 1. An analog-to-digital converter that generates a digital output corresponding to a given analog input is an analog-to-digital converter to be evaluated, and at least the maximum of the digital output from the analog-to-digital converter to be evaluated is In an analog-to-digital converter evaluation device that measures the analog input level corresponding to a change point where the lower bit changes, a code setting section that externally sets a desired digital value, and a code setting section that sets the externally set digital value and the above evaluation target. A comparator that compares the output of the analog-to-digital converter, and a signal that counts up or counts down based on the judgment result output of the comparator, and a signal that indicates that the count value exceeds the upper limit value and a signal that indicates that the count value exceeds the lower limit value. an up-down counter whose count value is reset to the midpoint between the upper limit value and the lower limit value by a signal; a signal from the up-down counter indicating that the upper limit value has been exceeded; and a signal indicating that the lower limit value has been exceeded. and an integration circuit that increases or decreases the analog input to the analog-to-digital converter to be evaluated, and measures the analog input level stabilized by the negative feedback circuit. An analog-to-digital converter evaluation device characterized in that the quality of the analog-to-digital converter to be evaluated is evaluated based on the measured value.