JPS648389B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a boundary tracking circuit that sequentially tracks boundaries of drawing data.

In an image processing device, for example, a character recognition device, it is necessary to determine the boundaries of characters to be recognized. In conventional devices, the boundary is determined by scanning the entire screen one-dimensionally. This one-dimensional scanning process takes a long time because it involves processing areas that are not directly related to the recognition process. Also, a method is used that does not scan the entire screen and tracks only the boundary part, but in this tracking method, there are eight neighbors of the mask to be determined, so it is difficult to judge all the neighbors. Similar to ten-dimensional scanning processing, this took a lot of time.

SUMMARY OF THE INVENTION In view of the above-mentioned drawbacks of the conventional art, it is an object of the present invention to provide a boundary tracking circuit that can quickly and reliably determine the boundaries of, for example, characters.

The present invention is characterized by a means for storing boundary data of a figure, a means for storing numbers of a plurality of tracking masks whose data determination positions are internally determined in advance, and a means for storing the numbers of the tracking masks. means for determining the position of the tracking mask based on the number of the tracking mask stored in the means and the storage contents of the means for storing the boundary data for the data determination position in the tracking mask; a boundary tracking circuit comprising means for determining a number of a tracking mask to be used next from the stored contents of the means for storing boundary data for a data determination position, and automatically tracing the boundary of the figure. It is to provide.

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, in which an initial value output 2 and a control output 3 of a control circuit 1 are connected to a cumulative sum circuit 4 and a mask number difference vector conversion table 5 consisting of a ROM, respectively. Further, the clock outputs 6, 7 of the control circuit 1 are connected to the clock inputs of latch circuits 8, 9 consisting of registers. The outputs of the latch circuits 8 and 9 are applied to two gates of an AND circuit 10 as mask inputs a and b, and are also added to a scan direction vector generation table 13 consisting of a ROM. AND circuit 10
The output of is the clock input of the mask counter 11.
Added to CE. Output 1 of mask counter 11
2 are connected to the mask number input terminals 14 and 15 of the scan direction vector generation table 13 and the mask number/difference vector conversion table 5, respectively. The output of the scan direction vector generation table 13 is input to one input 1 of the adder 16 of the cumulative sum circuit 24.
Added to 7. The output of the adder 16 is added to the input of the register 18 of the cumulative sum circuit 4. The output 29 of the register 18 is connected to the other input 19 of the adder 16, the address input 21 of the character information storage memory 20, and one input 23 of the adder 22. The output 24 of the mask number/difference vector conversion table 5 is added to the other input 25 of the adder 22. Adder 2
The output of the character frame information storage memory 26 is connected to the address input of the character frame information storage memory 26, and the output of the character frame information storage memory 26 is connected to the inputs of the latch circuits 8 and 9. The output 27 of the character information storage memory 20 is output as an output 28 as a feature sequence.

The control circuit 1 supplies an initial value (in this embodiment, the center of gravity of the figure is used) to the cumulative sum circuit, a mode signal to the mask number/difference vector conversion table 5, and a timing clock to the latch circuits 8 and 9. . The cumulative sum circuit 4 calculates the center address of the tracking mask consisting of a 3×3 mask from the initial value given by the control circuit 1 and the scan direction vector in four directions given from the scan direction vector generation table 13, that is, the center address of the mask. is located on the screen, and the address of the character information stored in the character information storage memory 20 is designated and output.

The tracking mask and boundary tracking logic are shown in FIG. Here, the scan direction is the direction in which the center c of the determination mask moves. In FIG. 1, the output 29 of the cumulative sum circuit 4 indicates the address of the center C of the mask shown in FIG. 2 in the character information storage memory 20. The mask numbers in FIG. 2 range from 0 to 3, and each has a different scan direction. The scan direction is determined by mask inputs a and b,
This determination is based on scan direction vector generation table 1.
3. Also, mask inputs a, b
When both are 1, '1' is output from the AND gate 10, the mask counter 11 is incremented, the mask number is increased by 1, and the mask changes to the next value.
This operation is shown in FIG. 2 as a mask switch, and is performed by the mask counter 11 in FIG. 1, which indicates the type of mask currently in use. Note that the boundary tracking theory in FIG. 2 shows counterclockwise tracking.

The output of the mask number/difference vector conversion table 5 and the output of the cumulative sum circuit 4, that is, the output 29 of the register 18, are added by an adder 22 to designate the address of the character frame information storage memory. In the mask number/difference vector conversion table 5, in order to obtain the mode designation of the control circuit 3, that is, the masks a and b, the designation of the difference address and the mask number from the mask counter 11 are received, and the a, a, in the mask from the center C of the mask are Find the position of b.

FIG. 3 shows the contents of the mask number/difference vector conversion table. The table may be, for example
Consists of ROM (read only memory)
ROM input includes mask number and mode. Mode 0 specifies a, and mode 1 specifies b. Said
The output of the ROM is a differential vector, which determines two of the eight neighbors necessary for logical judgment. That is, −
1 indicates the left direction, 47 indicates the lower left direction, 48 indicates the lower direction, 49 indicates the lower right direction, 1 indicates the right direction, -47 indicates the upper right direction, -48 indicates the upper direction, and -49 indicates the upper left direction. The above direction is for an image consisting of 48.times.48 pixels, and each memory 20, 26 in the embodiment of FIG. 1 also consists of 48.times.48 pixels. The output of the adder 22 specifies addresses a and b on the character frame information storage memory 26. The addresses a and b are specified in order, and the contents of the specified addresses are output from the character frame storage memory, and the output data is sent to the latches 8 and 9.
are stored in order. Clock outputs 6 and 7 of the control circuit 1 provide the data acquisition timing to the latches 8 and 9. Mask input a, b
In other words, the outputs of the latches 8 and 9 are sent to the AND circuit 10.
When the mask inputs a and b are both 1, the mask counter 11 is incremented. That is,
In mask numbers 0 to 3 shown in FIG. 2, a=
1, the mask switch operates when b=1. Furthermore, the mask inputs a and b enter the scan direction vector generation table 13, the scan direction shown in FIG. 2 is determined, and is input to the adder 16 of the cumulative sum circuit 4.

FIG. 4 shows the contents of the scan direction vector generation table. The table is composed of, for example, a ROM, and inputs to the ROM include a mask number and a mask input, and from these, the output of the ROM, that is, the scan direction vector that is the next address to proceed to is determined. Mask inputs, that is, a and b both take a value of either 0 or 1. For example, with mask number 0, when a and b are both 0 or when a is 0 and b is 1, the direction is -48, that is, upward, and when a is 1 and b is 0, or when a and b are both 1, it is -1, that is, the direction to the left. becomes. In mask number 1, when a and b are both 0 or a is 0 and b is 1, the direction is leftward, and when a is 1 and b is 0, or both a and b are 1, the direction is 48, ie, downward.
For mask number 2, the value is downward, that is, 1 with respect to the mask input. For mask number 3, the direction is to the right and upward relative to the mask input.

The adder 16 adds the address of the center c of the previous mask, that is, the contents of the register 18, and stores the result in the register 18 again. The above operation is performed until the center c of the mask goes around the boundary.

Next, a case will be described in which, for example, the character frame of the 30 characters for "Kan" shown in FIG. 5 is tracked in this embodiment. The shaded area 31 in FIG. 5 indicates a character frame. FIG. 6 shows the character frame 31 of FIG. 5, and G indicates the center of gravity of the character "Kan". In the embodiment of the present invention, the initial value is the center of gravity of the character data, so the center c of the mask is first designated as the center of gravity. If the mask counter is -0 at the initial value, both a and b are 0, so the center c of the mask moves upward.
At the upper point 32, a changes to the character frame, that is, a becomes 1 and b becomes 0, and movement to the left begins. Next point 3
3, a becomes 1 and b becomes 1. Therefore, the value of the mask counter is incremented by 1. That is, the mask number changes from 0 to 1. When the mask number changes, a,
Both b become 0, and when moving one step to the left, a becomes 1,
Move downward. Moving further downward, a, b
Both become 0 and move to the left again. Similarly, when moving downward, leftward, and downward, both a and b become 1 at point 35, and the value of the mask counter is incremented by 1. In the same procedure, the center c of the mask moves on the locus 36 around the character frame, and once it has gone around once, the operation is completed.

FIG. 7 is a diagram showing changes in trajectory due to differences in initial values of mask numbers. When the mask number is 1, the movement starts from the left, when it is 2, it starts from the bottom, and when it is 3, it starts from the right.

In the embodiment of the present invention shown in FIG. 1, character information and character frame information are stored in different memories, but in FIG. Show the configuration. The memory of one address consists of n+1 bits, bits 1 to n indicate character information, and bit 0 indicates character frame information. When the bit is 0, it indicates a character area, and when it is 1, it indicates a character frame area.

FIG. 9 shows a case where clockwise rotation is used as the boundary tracking logic. In FIG. 9, the mask numbers start from 4, for example, and then rotate in the order of 4, 5, 6, 7, and then 4.

As described above, according to the present invention, it is possible to quickly and reliably determine the boundaries of characters, etc., which has not been possible in the past.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a diagram showing counterclockwise boundary tracking logic, and FIG. 3 is a diagram showing a mask number/difference vector conversion table.
FIG. 4 is a diagram showing a scan direction vector generation table, FIG. 5 is a diagram showing character information, FIG. 6 is a diagram explaining boundary tracking, FIG. 7 is a diagram showing trajectory changes,
FIG. 8 is a diagram showing the memory configuration, and FIG. 9 is a diagram showing clockwise boundary tracking. 1...Control circuit, 4...Cumulative sum circuit, 5...Mask number/difference vector conversion table, 8, 9...
...Latch, 11...Mask counter, 20, 26
...Memory, 22...Adder.

Claims (1)

[Claims] 1. A means for storing boundary data of a figure, a means for storing numbers of a plurality of tracking masks whose data determination positions are internally determined in advance, and a tracking mask stored in the means for storing the numbers of the tracking masks. means for determining the position of the tracking mask based on the number of the tracking mask and the storage contents of the means for storing the boundary data for the data judgment position in the tracking mask; A boundary tracking circuit comprising means for determining the number of a tracking mask to be used next from the stored contents of the storage means, and automatically tracing the boundaries of the figure.