JPH0113242B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a filter integrated circuit suitable for integrating a filter in a monolithic IC formed on a silicon wafer or the like.

[Background of the invention]

As the integration of electrical circuits (monolithic ICs, hereinafter simply referred to as ICs) progresses, converting external block filters to ICs is becoming an important issue in achieving smaller circuits and lower costs. . Conventional filters are mostly composed of an inductance L, a capacitance C, and a resistance R, but the inductance L is difficult to integrate into an IC, so an active filter that can be configured only with a capacitance C and a resistance R is suitable for integration into an IC. In particular _, as a trap filter, _the Twin-T _circuit shown in Figure _{1 is} well known. If we choose ₃ /2=C, the trap frequency r is expressed as r=1/2πCR. v _i is the input signal and v ₀ is the output signal.

When converting a trap filter with such a configuration into an IC,
The problem of variation arises. That is, the capacitance value and resistance value within the IC are affected by variations due to impurity concentration within the semiconductor, mask misalignment, etc., and have large fluctuations such as, for example, the absolute value of C ±20% and the absolute value of R ±15%. Therefore, the trap frequency of the trap filter in Fig. 1 also varies in the range from a to b as shown in Fig. 2, and in the above example, the worst case is r.
will fluctuate by ±35%, making it extremely difficult to put it into practical use. As a countermeasure to this problem, attempts have been made to change the resistance value on the IC chip by laser trimming to absorb variations, but
Many problems still remain in terms of yield and other issues.

Furthermore, if the capacitors C ₁ , C ₂ , and C ₃ are configured as PN junction capacitors, each capacitor is laid out as shown in FIG. 3, for example. FIG. 3 is a cross-sectional view of the IC showing the structure of the capacitor, in which 4 is a substrate made of a P-type semiconductor, 3 is a collector layer made of an N-type semiconductor, 2 is a base layer made of a P-type semiconductor,
1 is an emitter layer made of an N-type semiconductor. At this time, the equivalent circuit of the capacitance shown in FIG. 3 is expressed as shown in FIG. 4, and a parasitic capacitance C _s ' is generated between the substrate 4 connected to ground and the collector layer 3.
Therefore, the Twin-T circuit as shown in Fig. 1 has parasitic capacitances C _S1 , C S2 , and C _S2 as shown in Fig. 5, respectively.
C _S3 is generated, of which parasitic capacitances C _S1 and C _S2 become capacitances C ₁ ′,
It is connected to the connection point between C ₂ ' and resistor R ₃ , which has the disadvantage of deteriorating the trap characteristics of the Twin-T circuit.

[Purpose of the invention]

The purpose of the present invention is to eliminate the above-mentioned conventional drawbacks, absorb variations in IC capacitance and IC resistance, and
It is an object of the present invention to provide a filter integrated circuit that can also ensure performance.

[Summary of the invention]

In order to achieve the above object, the present invention includes:
In addition to using a varicap as an IC capacitor,
When configuring a Twin-T circuit, the structure of at least three varicaps should be designed so that parasitic capacitance due to the varicaps does not occur at the connection points between the two resistors and the varicap capacitors, and at the connection points between the two varicaps and the resistors. One is characterized by being different.

[Embodiments of the invention]

The present invention will be explained in detail below using a specific example. FIG. 6 shows a Twin-
This is a T circuit diagram, with resistors R ₁ , R ₂ , R ₃ and varicap capacitance (capacitance whose value changes depending on the applied voltage V _R ).
C ₁ , C ₂ , and C ₃ realize the trap characteristics shown in FIG. 7. Transistors Q ₃ , Q ₄ , Q ₅ ,
Constant current source I ₁ and resistors R ₄ and R ₅ constitute a differential amplifier, in which the signal input to the base of transistor Q ₃ passes through transistor Q ₅ to the resistor that realizes the trap characteristic. R ₃ , varicap capacity
Returned to _C3 .

By feeding back in this manner, the characteristic indicated by the dotted line 13 in FIG. 7 is changed to the characteristic indicated by the solid line 14, thereby improving the sharpness of the trap characteristic.

Furthermore, the voltage applied to each varicap capacitance C ₁ , C ₂ , C ₃ by the voltage source V ₁ applied to IC pin 11
V _P can be changed from outside the IC, and the capacitance can be finely adjusted to match the desired trap frequency. Note that the capacitance value of the varicap capacitance can be changed by changing the applied voltage _VR , as shown in FIG.

For example, when using the base emitter capacitance as a varicap, Cj=Cj(0)/(1+Vr/φ)α=Cj(0)φ〓・1/
(φ+Vj)α logCj=K−αlog(φ+Vj) where Cj: Base-emitter junction capacitance Cj (0): Base-emitter junction capacitance at zero bias Vj: Emitter-base voltage (diode reverse bias voltage) φ: Built-in voltage α: voltage dependence coefficient K=log [Cj(0)φ] An example of the characteristic is shown in FIG.

Furthermore, the collector layer 3 of the varicap capacitors C ₁ and C ₂ as shown in FIG. 9 is connected to Vcc, and the junction between the base layer 2 and the emitter layer 1 is used as the capacitor. The equivalent circuit of the capacitance in this case is expressed as shown in FIG.

Further, the structure shown in FIG. 3 is used as the varicap capacitor _C3 .

Then, the equivalent circuit in consideration of the parasitic capacitance of the Twin-T circuit shown in Fig. 6 is expressed as shown in Fig. 11, and the points where three of each resistor and each varicap that determine the trap characteristics are connected are shown in Fig. 11. A filter integrated circuit without deterioration of trap characteristics can be obtained without generating parasitic capacitance in 15 and 16.

Note that the above example uses a varicap capacitor when the emitter potential of transistor _Q5 is higher than the emitter potential of transistor _Q1 .
Conversely, in the case of the circuit shown in FIG. 12, if the varicap capacitors C ₁ and C ₂ have the structure shown in FIG. 4, and the varicap capacitor C ₃ has the structure shown in FIG. 9, the equivalent circuit is as shown in FIG. 13. The intersection point 15,
It is clear that no parasitic capacitance occurs in the capacitor 16 and good trapping characteristics are obtained.

Furthermore, in the above example, a filter circuit having trap characteristics was explained. However, the structure of the varicap capacitor is designed so that the parasitic capacitance of the varicap capacitor, which causes deterioration of filter characteristics, can be ignored because the parasitic capacitance is driven by an emitter or the like. By configuring this, good filter characteristics can be obtained.

In this embodiment, a trap filter using a Twin-T circuit has been described, but it goes without saying that the present invention can be applied to any type of filter consisting of a resistor and a varicap capacitor.

〔Effect of the invention〕

As described above, according to the present invention, variations in elements within an IC can be absorbed from outside the IC, and good trap filter characteristics can be achieved.

As a result, large block filters, which were traditionally external components, can be integrated, resulting in lower circuit costs, smaller size, and
The effect of reducing the number of parts is extremely large.

[Brief explanation of drawings]

Figure 1 is a circuit diagram of a Twin-T type trap filter, Figure 2 is a characteristic diagram of the filter in Figure 1, and Figure 3 is a diagram of the characteristics of the filter in Figure 1.
9 are explanatory diagrams of the structure of a varicap capacitor, FIGS. 4 and 10 are equivalent circuit diagrams of capacitances with the structures shown in FIGS. 3 and 9, respectively, and FIG. 5 is an equivalent circuit diagram of a conventional trap filter structure. , FIG. 6 is a circuit diagram explaining one embodiment of the present invention, FIG. 7 is a diagram explaining the characteristics of FIG. 6, FIG. 8 is a diagram explaining the characteristics of the variable cap capacitance, and FIG. The equivalent circuit diagrams in the figure, FIGS. 12 and 13 are diagrams for explaining other embodiments. 1: Emitter layer made of an n-type semiconductor, 2: Base layer made of a P-type semiconductor, 3: Collector layer made of an n-type semiconductor, 4: Substrate, C ₁ to _{C 3} : Varicap capacitance.

Claims (1)

[Claims] 1. An integrated PN whose capacitance value changes depending on the voltage applied to both ends.
Junction capacitance C ₁ , C ₂ , C ₃ and integrated resistor R ₁ ,
In a Twin-T type filter integrated circuit consisting of R ₂ and R ₃ , the structure of the capacitors C ₁ and C ₂ directly connected in series is different from the structure of the capacitor C ₃ , and one structure is an n-type semiconductor. The collector layer is connected to the power supply voltage, and a PN junction capacitance is formed between the base layer made of a P-type semiconductor and the emitter layer made of an n-type semiconductor, and the other structure is made of an n-type semiconductor. 1. A filter integrated circuit characterized by having a structure in which a collector layer and an emitter layer are short-circuited, and a PN junction capacitance is formed between the short-circuit point and a base layer made of a P-type semiconductor. 2. The filter integrated circuit according to claim 1, wherein the PN junction capacitance is changed at the same rate from a control pin external to the IC.