Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JPH0462492B2 - - Google Patents
[go: Go Back, main page]

JPH0462492B2 - - Google Patents

Info

Publication number
JPH0462492B2
JPH0462492B2 JP8402184A JP8402184A JPH0462492B2 JP H0462492 B2 JPH0462492 B2 JP H0462492B2 JP 8402184 A JP8402184 A JP 8402184A JP 8402184 A JP8402184 A JP 8402184A JP H0462492 B2 JPH0462492 B2 JP H0462492B2
Authority
JP
Japan
Prior art keywords
layer
emitter
capacitance
type semiconductor
collector layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP8402184A
Other languages
Japanese (ja)
Other versions
JPS60229417A (en
Inventor
Masahiro Sasaki
Yoshinori Okada
Kuniaki Miura
Isao Fukushima
Shigeaki Kanari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Industry and Control Solutions Co Ltd
Original Assignee
Hitachi Ltd
Hitachi Video Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Video Engineering Co Ltd filed Critical Hitachi Ltd
Priority to JP8402184A priority Critical patent/JPS60229417A/en
Publication of JPS60229417A publication Critical patent/JPS60229417A/en
Publication of JPH0462492B2 publication Critical patent/JPH0462492B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/04Frequency selective two-port networks
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/04Frequency selective two-port networks
    • H03H11/12Frequency selective two-port networks using amplifiers with feedback
    • H03H11/1213Frequency selective two-port networks using amplifiers with feedback using transistor amplifiers

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Networks Using Active Elements (AREA)

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、シリコンウエハ上などに形成するモ
ノリシツクIC内にフイルタを集積化する場合に
適したフイルタ集積回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a filter integrated circuit suitable for integrating a filter in a monolithic IC formed on a silicon wafer or the like.

〔発明の背景〕[Background of the invention]

電気回路の集積化(モノリシツクIC化、以下
単にIC化と略す)が進むにつれ、外付けのブロ
ツクフイルタのIC化が、回路の小型化、低コス
ト化を実現する上で重要な課題となりつつある。
従来のフイルタは、大部分がインダクタンスL、
容量C、抵抗Rで構成されているが、インダクタ
ンスLはIC化がむずかしく、C,Rのみで構成
可能なアクテイブフイルタがIC化には適してい
る。特にLPFとしては、第1図に示した正帰還
型2次LPF回路がよく知られており、カツトオ
フ周波数fcは、 と表わされる。入力はvi、出力はvoである。第1
図に示した正帰還型2次LPFをIC化する場合、
IC内素子のばらつきの問題がある。すなわちIC
内の容量値、抵抗値は半導体内の不純物濃度、マ
スクずれなどによるばらつきの影響を受け、一例
として Cの絶対値精度 ±30% Rの 〃 ±15% など大きな変動を有する。したがつて第1図の正
帰還型2次LPFのカツトオフ周波数も第2図の
ようにaからbの範囲で変動し、上記例では最悪
時fcは±35%変動することとなり、実用化は極め
て困難である。この対策として、ICチツプ上で
レーザートリミングなどにより抵抗値を変化さ
せ、ばらつきを吸収することも実施されているが
精度、歩留りなどの点でまだ多くの問題を残して
いる。
As the integration of electrical circuits (monolithic ICs, hereinafter simply referred to as ICs) progresses, converting external block filters to ICs is becoming an important issue in achieving smaller circuits and lower costs. .
Most conventional filters have inductance L,
Although it is composed of a capacitor C and a resistor R, the inductance L is difficult to implement as an IC, so an active filter that can be constructed only with C and R is suitable for IC implementation. In particular, the positive feedback type secondary LPF circuit shown in Fig. 1 is well known as an LPF, and the cutoff frequency fc is It is expressed as Input is vi, output is vo. 1st
When converting the positive feedback type 2nd order LPF shown in the figure into an IC,
There is a problem with variations in elements within the IC. i.e. IC
The capacitance and resistance values in the semiconductor are affected by variations due to impurity concentration in the semiconductor, mask misalignment, etc., and have large fluctuations, such as the absolute value accuracy of C ±30% and the accuracy of R ±15%, for example. Therefore, the cutoff frequency of the positive feedback type 2nd order LPF shown in Fig. 1 also varies in the range from a to b as shown in Fig. 2, and in the above example, the worst case fc varies by ±35%, making it difficult to put it into practical use. It is extremely difficult. As a countermeasure to this problem, attempts have been made to change the resistance value on the IC chip by laser trimming, etc., to absorb variations, but many problems still remain in terms of accuracy, yield, etc.

また、上記容量C1,C2をPnジヤンクシヨン容
量で構成すると、例えば各々の容量は第3図に示
すようにレイアウトされる。第3図は上記容量の
構造を示すIC断面図であり、1はN型半導体か
らなるエミツタ層、2はP型半導体からなるベー
ス層、3はN型半導体からなるベース層、4はP
型半導体からなるサブストレートである。この
時、第3図の容量の等価回路は第4図に示すよう
に表わされ、Vccに接続されたコレクタ層3とベ
ース層2との間に寄生容量Csを生じる。したが
つて、第1図に示した正帰還型2次LPF回路は、
第5図に示すように各々寄生容量CS1,CS2が生
じ、その内CS1が抵抗R1,R2間の接続点に接続さ
れ、フイルタ特性が劣化するという欠点があつ
た。
Furthermore, if the capacitors C 1 and C 2 are configured as Pn junction capacitors, each capacitor is laid out as shown in FIG. 3, for example. FIG. 3 is a cross-sectional view of the IC showing the structure of the capacitor, in which 1 is an emitter layer made of an N-type semiconductor, 2 is a base layer made of a P-type semiconductor, 3 is a base layer made of an N-type semiconductor, and 4 is a P-type semiconductor.
It is a substrate made of type semiconductor. At this time, the equivalent circuit of the capacitance shown in FIG. 3 is expressed as shown in FIG. 4, and a parasitic capacitance Cs is generated between the collector layer 3 and the base layer 2 connected to Vcc. Therefore, the positive feedback type secondary LPF circuit shown in Figure 1 is
As shown in FIG. 5, parasitic capacitances C S1 and C S2 are generated, of which C S1 is connected to the connection point between resistors R 1 and R 2 , resulting in deterioration of filter characteristics.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上記した欠点をなくし、IC
化容量、IC化抵抗のばらつきを吸収し、かつ性
能も確保できるフイルタ集積回路を提供するにあ
る。
The object of the present invention is to eliminate the above-mentioned drawbacks and to
An object of the present invention is to provide a filter integrated circuit that can absorb variations in IC capacitance and IC resistance and ensure performance.

〔発明の概要〕[Summary of the invention]

上記した目的を達成するために本発明では、
IC化容量としてバリキヤツプを用いるとともに、
正帰還型2次LPF回路を構成する上で、2個の
抵抗とバリキヤツプの接続点にバリキヤツプによ
る寄生容量が生じないように、バリキヤツプの構
造を異ならせることを特徴としている。
In order to achieve the above object, the present invention includes:
In addition to using a varicap as an IC capacitor,
When configuring a positive feedback type secondary LPF circuit, the structure of the varicap is different so that parasitic capacitance due to the varicap does not occur at the connection point between the two resistors and the varicap.

〔発明の実施例〕[Embodiments of the invention]

以下本発明を具体的一実施例により詳しく説明
する。第6図は本発明の一実施例を示す正帰還型
2次LPFの回路図であり、抵抗R1,R2、バリキ
ヤツプ容量(印加電圧VRにより値の変化する容
量)C1,C2、トランジスタQ2,Q3,Q4、定電流
源I1、抵抗R3,R4により2次LPF特性を実現し
ている。
The present invention will be explained in detail below using a specific example. FIG. 6 is a circuit diagram of a positive feedback secondary LPF showing an embodiment of the present invention, in which resistors R 1 , R 2 , varicap capacitances (capacitances whose values change depending on the applied voltage VR ) C 1 , C 2 , transistors Q 2 , Q 3 , Q 4 , constant current source I 1 , and resistors R 3 , R 4 realize second-order LPF characteristics.

しかもICピン6に印加する電圧源V1により各
バリキヤツプ容量C1,C2に印加する電圧VRをIC
外部から共に変化でき、上記容量を微調させて所
望のカツトオフ周波数に合わせることができる。
なお、バリキヤツプ容量は第7図に示すように印
加電圧VRにより容量値を変化できるものである。
例えば、バリキヤツプとしてベース.エミツタ容
量を用いた場合 Cj=Cj(0)/(1+Vj/φ)〓=Cj(0)φ〓・1
/(φ+Vj)〓 logCj=K−αlog(φ+Vj) ここで Cj:ベース.エミツタ間接合容量 Cj(0):バイアス0時のベース.エミツタ間接合
容量 Vj:エミツタ.ベース電圧 ダイオード逆バイアス電圧) φ:ビルトイン電圧 α:電圧依存係数 K:log〔Cj(0)φ〓〕 と表わされ、特性の一例が第7図のようになる。
Moreover, the voltage V R applied to each varicap capacitance C 1 and C 2 by the voltage source V 1 applied to IC pin 6 is
Both can be changed externally and the capacitance can be finely adjusted to the desired cutoff frequency.
Incidentally, the capacitance value of the varicap capacitance can be changed by changing the applied voltage V R as shown in FIG.
For example, use the base as a variable cap. When using emitter capacitance Cj=Cj(0)/(1+Vj/φ)=Cj(0)φ=・1
/(φ+Vj) 〓 logCj=K−αlog(φ+Vj) where Cj: Base. Emitter-to-emitter junction capacitance Cj(0): Base when bias is 0. Emitter junction capacitance Vj: Emitter. Base voltage diode reverse bias voltage) φ: Built-in voltage α: Voltage dependence coefficient K: log [Cj(0)φ〓] An example of the characteristic is shown in FIG.

バリキヤツプ容量C1,C2を第8図に示したよ
うなコレクタ層とエミツタ層を接続し、容量とし
てベース層とエミツタ層、ベース層とコレクタ層
との接合を用いる。この場合の等価回路は第9図
のように表わされる。
Varicap capacitors C 1 and C 2 are connected between the collector layer and the emitter layer as shown in FIG. 8, and the junctions between the base layer and the emitter layer, and between the base layer and the collector layer are used as capacitors. The equivalent circuit in this case is expressed as shown in FIG.

而すると、第6図に示した正帰還型2次LPF
回路の寄生容量を考慮した等価回路は、第10図
のように表わされ、フイルタ特性を決定する各抵
抗、各バリキヤツプの内3個が接続する点8に寄
生容量が生じることなく、LPF特性の劣化のな
いフイルタ集積回路が得られる。
Then, the positive feedback type 2nd order LPF shown in Figure 6
The equivalent circuit that takes into account the parasitic capacitance of the circuit is shown in Figure 10, and the LPF characteristics are maintained without any parasitic capacitance occurring at point 8, where three of the resistors and varicaps that determine the filter characteristics are connected. A filter integrated circuit without any deterioration can be obtained.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明によれば、IC内素子
ばらつきをIC外部から吸収でき、良好なフイル
タ特性を実現できる。なお本実施例では、正帰還
型2次LPFについて述べたが、抵抗とバリキヤ
ツプ容量からなるあらゆるタイプのフイルタに適
用できるのは言うまでもない。
As described above, according to the present invention, variations in elements within an IC can be absorbed from outside the IC, and good filter characteristics can be achieved. In this embodiment, a positive feedback type secondary LPF has been described, but it goes without saying that the present invention can be applied to any type of filter consisting of a resistor and a varicap capacitor.

而して従来大型外付部品であつたブロツクフイ
ルタ類をIC内に集積化でき、回路の低コスト、
小型化、部品点数の削減に対する効果は極めて大
きい。
Block filters, which were traditionally large external components, can be integrated into the IC, reducing circuit costs and
The effects of miniaturization and reduction of the number of parts are extremely large.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、正帰還型2次LPFの回路図、第2
図は、第1図のフイルタの特性図、第3図、第8
図はバリキヤツプ容量の構造説明図、第4図、第
9図は各々第3図、第8図の構造の容量の説明
図、第5図はトラツプフイルタの従来構造による
等価回路図、第6図は本発明の一実施例を説明す
る回路図、第7図はバリキヤツプ容量の特性を説
明する特性図、第10図は、第6図の等価回路図
である。 1…n型半導体によるエミツタ層、2…P型半
導体によるベース層、3…n型半導体によるコレ
クタ層、4…サブストレート、C1,C2…バリキ
ヤツプ容量。
Figure 1 is a circuit diagram of a positive feedback type 2nd order LPF.
The diagrams are the characteristic diagram of the filter in Figure 1, Figure 3, and Figure 8.
The figure is an explanatory diagram of the structure of the varicap capacitance, Figures 4 and 9 are explanatory diagrams of the capacitance of the structures of Figures 3 and 8, respectively, Figure 5 is an equivalent circuit diagram of the conventional trap filter structure, and Figure 6 is FIG. 7 is a characteristic diagram illustrating the characteristics of the varicap capacitance, and FIG. 10 is an equivalent circuit diagram of FIG. 6. DESCRIPTION OF SYMBOLS 1...Emitter layer made of an n-type semiconductor, 2...Base layer made of a P-type semiconductor, 3...Collector layer made of an n-type semiconductor, 4...Substrate, C1 , C2 ...Varicap capacitance.

Claims (1)

【特許請求の範囲】 1 両端に印加された電圧で容量値が変化する可
変容量と、直列接続された第1および第2の抵抗
とが集積回路内に設けられ、 この集積回路は、 P型半導体層からなるサブストレートと、 このサブストレートに接し、N型半導体からな
るコレクタ層と、 このコレクタ層に接し、P型半導体からなるベ
ース層と、 このベース層に接し、N型半導体からなるエミ
ツタ層とを有し、 上記コレクタ層とエミツタ層とが半導体外部で
短絡接続され、上記ベース層と上記コレクタ層お
よびエミツタ層の各層との間でそれぞれ形成され
るPNジヤンクシヨン容量の並列接続によつて上
記可変容量が形成され、 上記コレクタ層とエミツタ層との短絡接続点と
上記直列接続された第1および第2の抵抗の接続
中点とが接続される ことを特徴とするフイルタ集積回路。
[Claims] 1. A variable capacitor whose capacitance value changes depending on the voltage applied to both ends, and first and second resistors connected in series are provided in an integrated circuit, and this integrated circuit is of P type. A substrate made of a semiconductor layer, a collector layer made of an N-type semiconductor in contact with this substrate, a base layer made of a P-type semiconductor in contact with this collector layer, and an emitter made of an N-type semiconductor in contact with this base layer. the collector layer and the emitter layer are short-circuited outside the semiconductor, and the PN junction capacitances formed between the base layer and each of the collector layer and the emitter layer are connected in parallel. A filter integrated circuit, wherein the variable capacitor is formed, and a short-circuit connection point between the collector layer and the emitter layer is connected to a connection midpoint of the first and second resistors connected in series.
JP8402184A 1984-04-27 1984-04-27 Filter integrated circuit Granted JPS60229417A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8402184A JPS60229417A (en) 1984-04-27 1984-04-27 Filter integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8402184A JPS60229417A (en) 1984-04-27 1984-04-27 Filter integrated circuit

Publications (2)

Publication Number Publication Date
JPS60229417A JPS60229417A (en) 1985-11-14
JPH0462492B2 true JPH0462492B2 (en) 1992-10-06

Family

ID=13818908

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8402184A Granted JPS60229417A (en) 1984-04-27 1984-04-27 Filter integrated circuit

Country Status (1)

Country Link
JP (1) JPS60229417A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4990872A (en) * 1987-06-17 1991-02-05 Sanyo Electric Co., Ltd. Variable reactance circuit producing negative to positive varying reactance
JPH01279616A (en) * 1988-05-06 1989-11-09 Hitachi Ltd Semiconductor integrated circuit

Also Published As

Publication number Publication date
JPS60229417A (en) 1985-11-14

Similar Documents

Publication Publication Date Title
US4724407A (en) Integrated filter circuit having switchable selected parallel filter paths
JPH0516696B2 (en)
KR100315267B1 (en) LC device, semiconductor device and manufacturing method of LC device
US3953875A (en) Capacitor structure and circuit facilitating increased frequency stability of integrated circuits
JP4509390B2 (en) Improved integrated oscillator and adjustable circuit
JPH0462492B2 (en)
KR0179381B1 (en) Active filter circuit of a capacity ground type
JPH0113242B2 (en)
JPS60229415A (en) filter integrated circuit
JP3521064B2 (en) Light receiving amplifier circuit
JP3373267B2 (en) LC element and semiconductor device
US5760642A (en) Filter circuit using a junction capacitor of a semiconductor
JP2002118443A (en) Filter circuit
JP3067286B2 (en) Monolithic filter circuit
JPS60214620A (en) Integrated circuit
JP3461886B2 (en) LC element, semiconductor device, and method of manufacturing LC element
JPS6112056A (en) Semiconductor device
JPS586181A (en) variable capacity device
JPS60239114A (en) Filter circuit
JPH0516194B2 (en)
JPH0257730B2 (en)
JPS626703Y2 (en)
JPS643089B2 (en)
JPH0783090B2 (en) Semiconductor device
JPH03129763A (en) Integrated circuit

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees