JPH0116019B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a lateral type transistor that provides a high current amplification rate.

A conventional wafer pretreatment manufacturing method for a lateral type transistor is shown in FIG. 1 using an example of a lateral type PNP transistor using N-type silicon as the substrate.
In FIG. 1, A is an oxidation process, B is a photolithography process, C is a diffusion process, D is a contact hole photolithography process, and E is a sectional view showing an electrode process. First, in the oxidation process of A, N
A mold silicon substrate 1 is thermally oxidized to form an oxide film 2. Next, in the photolithography step B, two windows 3E and 3C for diffusion forming the emitter layer and collector layer are opened. Normally, this emitter-collector layer spacing W _B
In order to increase the withstand voltage between the collector and emitter, it is widened to the extent that the so-called punch-through phenomenon of the depletion layer does not occur. Next, in a diffusion process of C, C is diffused into the N-type silicon substrate by thermal diffusion of an impurity such as boron to form a P-type diffusion layer 4 . At this time, the diffusion window 3 disappears because thermal diffusion is normally performed in an oxygen atmosphere. Next, contact holes 5C and 5E for the collector, base and emitter layers of the transistor are formed by the photolithography step D. The collector/emitter layer contact holes 5C and 5E are formed in the P-type diffusion layer 4.
Base layer contact holes 5 are formed on each surface of the base layer.
B is formed on the surface of the N-type silicon substrate 1. Finally, in the electrode step E, for example, Al is vapor deposited and collector/base/emitter electrode wirings 6C, 6B, and 6E are formed by photolithography.

The above is the conventional wafer pretreatment process for lateral type transistors, but since the diffusion process of A oxidation process C usually involves high temperature heat treatment of 1000°C or more, the N-type silicon substrate forming the base layer of the lateral type transistor is Distortion and the like occur on the surface of the transistor, resulting in a decrease in the lifetime of minority carriers, and manufacturing reproducibility cannot be achieved due to a decrease in the current amplification rate of the transistor and variations.

In particular, for high-voltage lateral type transistors that require a breakdown voltage of 500V or more, the N-type silicon substrate 1 is
Using a specific resistance of about 20Ω・cm, and a P-type diffusion layer 4
The depth must be at least 30 μm. Also C
The diffusion process requires approximately 3 days of diffusion at a temperature of around 1200℃, so the current amplification rate depends on the pattern shape, for example, the collector-emitter width.
At W _B of 120 μm, there was a drawback that the value was small, about 0.2 to 0.01, and the variation was large.

In order to solve these drawbacks, the present invention adds a heat treatment process to the conventional process, and will be described in detail below.

FIG. 2 is a cross-sectional view showing each step of the wafer pretreatment manufacturing method according to the first and second embodiments of the present invention. Steps A, B, C, D, and E are the same as the conventional steps, so their explanation will be omitted. The C' step is a step in which the wafer after the C diffusion step is subjected to heat treatment at 750 DEG C. to 900 DEG C. in an oxygen or nitrogen atmosphere. Figures 3 and 4 show the effects of the present invention, and Figure 3A shows the relationship between the heat treatment time and current amplification rate in the first embodiment using, for example, oxygen as the active atmosphere. The oxide film 2 was completely removed after the process was completed, and the results were measured using a probe. A PNP transistor with an initial current amplification rate of 0.15 to 0.2 immediately after the completion of diffusion process C significantly increases to 0.8 to 1.0 by heat treatment at 900°C for 2 hours, and becomes saturated after long-term heat treatment of 2 hours or more. I can see that However, this current amplification rate of 0.8 to 1.0 can be maintained by heat treatment for up to 5 hours, and heating for longer than that not only worsens the current amplification rate, as can be seen from Figure 3A.
It also has a negative effect on the characteristics of the IC. Therefore, the optimal heat treatment conditions that improve the current amplification rate of the transistor by stabilizing the substrate surface and also do not adversely affect the IC characteristics are 2.
This can be said to be a heat treatment of ~5 hours. Further, FIG. 4 shows the results of measuring the relationship between temperature and current amplification rate in the first and second embodiments, and it is found that the effect of improving the current amplification rate is remarkable at 750°C to 900°C. Moreover, since the heat treatment is performed at 750° C. to 900° C., there is little influence on the oxide film 2 and the diffusion layer 4, and a large improvement in the current amplification rate can be achieved.

In addition, as a second embodiment of the present invention, an inert atmosphere,
For example, the results using nitrogen are shown in Figure 3B. As seen in FIG. 3, the same effect as in the first embodiment can be observed even with nitrogen gas.

As explained above, after the high-temperature thermal diffusion process of the conventional process, the process is carried out for 2 to 5 hours in an active or inert atmosphere.
There is an advantage that a significant improvement in the current amplification rate can be obtained only by adding a heat treatment step at 750°C to 900°C.

The present invention improves the current amplification rate of a lateral type transistor by adding an extremely simple process and stabilizes it by reducing variations. The present invention can be applied to an integrated circuit device including a complementary circuit consisting of the following.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of each step in a conventional wafer pre-treatment manufacturing method for a lateral type transistor, and FIG. 2 is a cross-sectional view of each step in a wafer pre-treatment manufacturing method for a lateral type transistor in the first and second embodiments of the present invention. Figure 3A is a diagram showing the relationship between heat treatment time and current amplification rate showing the effect of the first embodiment of the present invention.
Figure B is a diagram showing the relationship between heat treatment time and current amplification rate showing the effect of the second embodiment of the present invention, and Figure 4 is a diagram showing the relationship between heat treatment temperature and current amplification rate showing the effect of the first and second embodiments of the present invention. FIG. 3 is a diagram showing the relationship between current amplification factors. 1... N-type silicon substrate, 2... Oxide film, 3
C, 3E... Diffusion window, 4... P-type diffusion layer, 5
B, 5C, 5E...Contact hole, 6B, 6C,
6E...Electrode.

Claims (1)

[Claims] 1. Heat-treating the semiconductor lateral transistor, which has undergone all high-temperature heat treatment at 1000°C or higher, at a temperature of 750°C to 900°C for at least 2 hours and at most 5 hours in an oxygen or nitrogen atmosphere. A method for manufacturing a lateral type transistor, characterized in that the strain on the substrate surface of the semiconductor lateral type transistor caused by the high temperature treatment of 1000° C. or more is stabilized, and the current amplification rate of the transistor is improved.