JPH0120433B2 - - Google Patents
Info
- Publication number
- JPH0120433B2 JPH0120433B2 JP16546182A JP16546182A JPH0120433B2 JP H0120433 B2 JPH0120433 B2 JP H0120433B2 JP 16546182 A JP16546182 A JP 16546182A JP 16546182 A JP16546182 A JP 16546182A JP H0120433 B2 JPH0120433 B2 JP H0120433B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- electrode
- panel
- data
- display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Description
【発明の詳細な説明】
(a) 発明の技術分野
この発明は、EL表示パネルの駆動方法に関し、
さらに詳細には互いに抵抗値の異なるマトリクス
電極をそなえたEL表示パネルの電極抵抗の影響
による発光輝度のバラツキを軽減した新しい駆動
方法に関するものである。[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a method for driving an EL display panel,
More specifically, the present invention relates to a new driving method that reduces variations in luminance due to the influence of electrode resistance in an EL display panel equipped with matrix electrodes having different resistance values.
(b) 従来技術と問題点
平面型デイスプレイ・デバイスの1つとして知
られるEL表示パネルは、マンガンを添加した硫
化亜鉛(ZnS;Mn)の発光層の両側を絶縁膜で
サンドイツチ状にはさみ、さらにその両側にマト
リツクス配列の走査電極とデータ電極とを設けた
基本構造を持つ一方、一般にはACリフレツシユ
駆動がなされる。しかしてかかる表示パネルは、
薄型構造を活して大型表示パネルへの適用が試み
られているが、データ側電極に酸化スズと酸化イ
ンジウムとの混合よりなる透明電極を用いている
ためその材料が持つ高抵抗性質に起因し、データ
用電源(ドライバ)から見てそれに近い表示素子
(セル)と遠い表示素子(セル)との間でそのセ
ル印加電圧波形の立上がり特性に差が生じて発光
輝度が異なるという問題があつた。(b) Prior art and problems EL display panels, which are known as a type of flat display device, have a manganese-doped zinc sulfide (ZnS; Mn) luminescent layer sandwiched between insulating films in a sandwich-like pattern on both sides. Although it has a basic structure with scan electrodes and data electrodes arranged in a matrix on both sides, it is generally driven by AC refresh. However, such a display panel is
Attempts have been made to utilize the thin structure to apply it to large display panels, but because the data side electrode uses a transparent electrode made of a mixture of tin oxide and indium oxide, this material has high resistance properties. There was a problem in that the rising characteristics of the voltage waveforms applied to the cells differ between display elements (cells) that are close to the data power supply (driver) and display elements (cells) that are far away, resulting in differences in luminance. .
かかる従来の問題を第1図のパネル模式図、第
2図のパネル等化回路図および第3図の駆動電圧
波形図を参照してさらに詳しく説明するが、各図
はデータ電極D1に関連する表示セル群を選択し
て発光させる場合を示している。第1図および第
2図において、1は基板、D1〜D1000はデータ電
極、S1〜S1000は走査電極、Soはデータ用電源に
最も近い表示セル(以下、パネル内最近セルと記
す)、Sfはデータ用電源から最も遠い表示セル
(以下パネル内最遠セルと記す)、rdは1セル当り
のデータ電極における抵抗値、CSはセル容量を
示し、両図で明らかなようにデータ電極から見た
パネル電極抵抗とパネルセル容量のCR回路は梯
子形回路を形成しており、データ用電源に近い部
位と遠い部位ではCR時定数に大きな差異が生じ
る。従つて第3図を参照して明らかなように、同
図aに示すデータ電極D1にデータ用電源から供
給したデータ電圧パルスDPは、該電源に近い側
の電極部位には同図bの如き波形の半選択電圧と
してほぼそのままの形で加わるけれども、それか
ら遠い電極部位では同図cの如く立上がりがなま
つた半選択電圧波形として加わる。そのため同図
dおよびfに示す走査電極S1およびS1000側の半
選択走査電圧パルスSPとの合成により加わる同
図gのパネル内最近セルSoの電圧波形PSoと同図
hのパネル内最遠セルSfの電圧波形PSfとではフ
ル選択時点での合成電圧の立上りに著しい差異が
現われ、特に最遠セルSfの場合は発光させるに充
分な電圧が得られ難くなつて最近セルSoよりも発
光輝度が低下し、結果的に全表示セルにまたがつ
て発光輝度がバラツクという欠点を生じていた。 These conventional problems will be explained in more detail with reference to the panel schematic diagram in FIG. 1, the panel equalization circuit diagram in FIG. 2, and the drive voltage waveform diagram in FIG. 3 . This shows a case in which a group of display cells to be displayed are selected and emitted light. 1 and 2, 1 is the substrate, D 1 to D 1000 are data electrodes, S 1 to S 1000 are scanning electrodes, and S o is the display cell closest to the data power supply (hereinafter referred to as the nearest cell in the panel). ), S f is the display cell furthest from the data power supply (hereinafter referred to as the farthest cell in the panel), rd is the resistance value at the data electrode per cell, and CS is the cell capacitance. The CR circuit of the panel electrode resistance and panel cell capacitance seen from the data electrode forms a ladder circuit, and there is a large difference in the CR time constant between parts near and far from the data power supply. Therefore, as is clear with reference to FIG. 3, the data voltage pulse DP supplied from the data power source to the data electrode D1 shown in FIG. Although it is applied almost as is as a half-selection voltage with a waveform like this, it is applied as a half-selection voltage waveform with a slow rise at an electrode part far from the waveform as shown in c of the same figure. Therefore, the voltage waveform PS o of the nearest cell S o in the panel g of the same figure and the voltage waveform PS o of the nearest cell S o in the panel h of the figure There is a significant difference in the rise of the composite voltage at the time of full selection between the voltage waveform PS f of the farthest cell S f , and in the case of the farthest cell S f in particular, it has become difficult to obtain sufficient voltage to emit light, and recently the cell The emission brightness was lower than that of S o , resulting in a disadvantage that the emission brightness varied across all display cells.
なお、このような問題は電極材料を同じとして
も電極の長さや大きさを異ならせた場合、(例え
ば長い電極では高抵抗を有することになる)同じ
ように生ずる。 Incidentally, even if the electrode material is the same, the same problem occurs when the length and size of the electrodes are different (for example, a long electrode has a high resistance).
(c) 発明の目的
この発明は、以上のような状況から、互いに抵
抗値の異なるマトリクス電極をそなえたELパネ
ルの発光輝度のバラツキを軽減する駆動法を提供
しようとするものであり、さらに詳細には抵抗値
の大きい側の電極抵抗の影響による輝度バラツキ
の問題を解消できる新しい駆動法の提供を目的と
するものである。(c) Purpose of the Invention In view of the above-mentioned circumstances, the present invention aims to provide a driving method for reducing variations in luminance of an EL panel equipped with matrix electrodes having different resistance values. The purpose of the present invention is to provide a new driving method that can solve the problem of brightness variations due to the influence of electrode resistance on the side with a larger resistance value.
(d) 発明の構成
簡単に述べるとこの発明は、互いに抵抗値の異
なるデータ電極と走査電極をそなえたELパネル
の選択された表示セルに電気光学的表示効果を与
える際、当該選択表示セルへの選択電圧が、その
電極抵抗の影響を軽減するに十分な時間先行して
立上がるように高抵抗側電極から早いタイミング
で印加した電圧と、この先行印加電圧に重畳され
てフル選択効果を与える低抵抗側電極から印加し
た電圧との合成電圧波形をもつて印加されること
を特徴とするものである。この結果、パネル内最
遠セルに加わる合成電圧波形はフル選択時点でシ
ヤープな波形となつてパネル内最近セルにおける
フル選択時点での合成電圧波形とほぼ同じとなる
ので、両セル相互間での輝度バラツキを解消する
ことになる。(d) Structure of the Invention Briefly stated, the present invention provides an electro-optical display effect to a selected display cell of an EL panel having data electrodes and scan electrodes having different resistance values. The selection voltage is applied at an early timing from the high-resistance electrode so that it rises in advance for a sufficient period of time to reduce the influence of the electrode resistance, and this pre-applied voltage is superimposed to give a full selection effect. It is characterized in that it is applied with a composite voltage waveform with the voltage applied from the low resistance electrode. As a result, the composite voltage waveform applied to the farthest cell in the panel becomes a sharp waveform at the time of full selection, and is almost the same as the composite voltage waveform of the nearest cell in the panel at the time of full selection, so the waveform between both cells becomes sharp. This will eliminate variations in brightness.
(e) 発明の実施例
以下、この発明の1実施例につき第4図の駆動
電圧波形を参照して詳しく説明する。この第4図
示の駆動例は、前記第3図の駆動例と同じくデー
タ電極D1に関連する表示セル群を選択発光させ
るものであるが、第3図とはデータ電極に印加す
る電圧パルス波形が著しく異なる。すなわち、選
択データ電極に沿つた表示セル群に半選択電圧と
して加えるデータ電圧パルスDPは、選択データ
電極に沿つた表示セル群に半選択電圧として加え
る走査電圧パルスSPよりも立上がりを早くする
ために1表示ライン分のアドレス(書込み)時間
(例えば16μsec)一ぱいに加わるようなパルス幅
を持つ波形にされており、具体的には走査電圧パ
ルスSPの立上がりより8μsec先行してデータ電極
に印加されるように設定されている。(e) Embodiments of the Invention Hereinafter, one embodiment of the present invention will be described in detail with reference to the drive voltage waveform shown in FIG. The driving example shown in FIG. 4 selectively causes the display cells related to the data electrode D 1 to emit light similarly to the driving example shown in FIG. 3, but differs from the driving example in FIG. are significantly different. In other words, the data voltage pulse DP applied as a half-select voltage to the display cells along the selected data electrode rises faster than the scan voltage pulse SP applied as a half-select voltage to the display cells along the selected data electrode. The waveform has a pulse width that is applied to the address (writing) time for one display line (for example, 16 μsec), and specifically, it is applied to the data electrodes 8 μsec before the rise of the scanning voltage pulse SP. It is set as follows.
従つて、パネル内最遠セルSf上のデータ電極部
位に加わるデータ電圧パルスは、第4図cに示す
如く従前どおり立上がりがなまるけれども対応の
走査電極S1000に走査電圧パルスが印加されるフ
ル選択時点では所定電位に達することができる。
つまりパネル内最遠セルSfに加わる電圧パルス
PSfは第4図hに示す如く、先行して立上がる第
1電圧部分としてのデータ電圧DPと、その上に
第2電圧部分として重畳される走査電圧SPとの
2段階の立上がり波形を持ち、フル選択時点で
は、同図gに示すパネル内最近セルSoの印加電圧
パルスPSoとほぼ同形となる。従つて、当該最遠
セルSfではもはや電極抵抗の影響による輝度の低
下は現われず、パネル内最近セルとパネル内最遠
セルとにおける発光輝度にはほとんど差が生じな
いことになる。 Therefore, although the data voltage pulse applied to the data electrode portion on the farthest cell S f in the panel has a blunted rise as before, as shown in FIG. 4c, the scan voltage pulse is applied to the corresponding scan electrode S 1000 . At the time of full selection, a predetermined potential can be reached.
In other words, the voltage pulse applied to the farthest cell S f in the panel
As shown in Fig. 4h, PS f has a two-step rising waveform: the data voltage DP as the first voltage portion that rises in advance, and the scanning voltage SP that is superimposed thereon as the second voltage portion. , at the time of full selection, has almost the same shape as the applied voltage pulse P o of the nearest cell S o in the panel shown in g of the same figure. Therefore, in the farthest cell S f , the reduction in brightness due to the influence of the electrode resistance no longer appears, and there is almost no difference in luminance between the nearest cell in the panel and the farthest cell in the panel.
以上の実施例では、第1電圧部分としてのデー
タ電圧パルスは1セルアドレス時間相当のパルス
幅を持たせて第2電圧部分としての走査電圧パル
スよりも大幅に先行して立上がらせるようにした
が、その立上がり時間はデータ電極側の電極抵抗
の影響を無視できる程度先行させれば良いのでパ
ネルの大きさや特性に応じていま少し遅く設定す
ることも可能である。またデータ電極と走査電極
との形状において走査電極の長さをデータ電極よ
りも著しく長くした場合は、走査電極の方が抵抗
値が大きくなるので、このときは走査電極に印加
する電圧パルスを先行して立上がらせば良い。 In the above embodiment, the data voltage pulse as the first voltage portion has a pulse width equivalent to one cell address time, and is caused to rise significantly ahead of the scanning voltage pulse as the second voltage portion. However, since it is sufficient to advance the rise time to such an extent that the influence of the electrode resistance on the data electrode side can be ignored, it is possible to set the rise time a little later depending on the size and characteristics of the panel. In addition, if the length of the scanning electrode is made significantly longer than the data electrode in the shape of the data electrode and scanning electrode, the resistance value of the scanning electrode will be larger, so in this case, the voltage pulse applied to the scanning electrode should be applied in advance. All you have to do is stand up.
さらに上記の実施例では、データ電極と走査電
極の双方から正負の極性の半選択電圧パルスを印
加して選択動作をなす場合について説明したが、
これら両選択電極に印加する電圧のレベルは、選
択セルでの合成電圧が表示のためのフル選択効果
を与える範囲において相対的に任意に設定可能で
ある。 Further, in the above embodiment, a case was explained in which a half-selection voltage pulse of positive and negative polarities was applied from both the data electrode and the scan electrode to perform the selection operation.
The level of the voltage applied to both selection electrodes can be set relatively arbitrarily within a range where the combined voltage at the selection cell provides a full selection effect for display.
(f) 発明の効果
以上の説明から明らかなように、要するにこの
発明は、選択セルにフル選択電圧を与える際、電
極抵抗の影響を無視するに充分な時間先行して第
1の電圧部分を立上がらせ、さらにフル選択時点
でその上に第2の電圧部分を重畳するよう印加し
て表示効果を得るものであり、フル選択時点でパ
ネル内最近セルとパネル内最遠セルとに印加され
るセル電圧波形がほぼ同じになるので、両セルは
もちろん全てのセルでの発光輝度を均一にでき、
パネルの表示品質を大幅に向上できる。従つて、
この発明を大型表示用のELパネルに適用すれば
きわめて有利である。(f) Effects of the Invention As is clear from the above explanation, in short, the present invention, when applying a full selection voltage to a selected cell, applies the first voltage portion in advance for a sufficient period of time to ignore the influence of electrode resistance. The display effect is obtained by superimposing a second voltage portion on top of the voltage at the time of full selection. Since the cell voltage waveforms are almost the same, the luminance of both cells as well as all cells can be made uniform.
The display quality of the panel can be significantly improved. Therefore,
It would be extremely advantageous to apply this invention to an EL panel for large displays.
第1図、第2図および第3図は従来例を説明す
るためのパネル模式図、パネル等価回路図および
駆動波形図、第4図はこの発明の1実施例におけ
る駆動電圧波形図を示す。
1:基板、D1〜D1000:透明データ電極、S1〜
S1000:走査電極、So:パネル内最近セル、Sf:
パネル内最遠セル、DP:データ電圧パルス、
SP:走査電圧パルス。
1, 2, and 3 show a panel schematic diagram, a panel equivalent circuit diagram, and a drive waveform diagram for explaining a conventional example, and FIG. 4 shows a drive voltage waveform diagram in one embodiment of the present invention. 1: Substrate, D 1 ~ D 1000 : Transparent data electrode, S 1 ~
S 1000 : Scanning electrode, S o : Nearest cell in panel, S f :
Farthest cell in panel, DP: data voltage pulse,
SP: scanning voltage pulse.
Claims (1)
を有し、それら両電極の交差部に定まる容量性の
表示素子に両電極から所定レベルの選択電圧を合
成する形で印加して電気光学的表示効果を得る
EL表示パネルにおいて、 選択された表示素子に電気光学的表示効果を与
える際、当該選択表示素子への上記選択電圧が、
その電極抵抗の影響を軽減するに十分な時間先行
して立上がるように高抵抗側電極から早いタイミ
ングで印加した電圧と、この先行印加電圧に重畳
されてフル選択効果を与える低抵抗側電極から印
加した電圧との合成電圧波形をもつて印加される ことを特徴とするEL表示パネルの駆動方法。 2 前記データ電極が透明の材質で形成され、該
透明データ電極への印加電圧パルスを前記走査電
極への印加電圧パルスよりも先行して立上がらせ
るように早いタイミングで印加する ことを特徴とする特許請求の範囲第1項に記載の
EL表示パネルの駆動方法。[Claims] 1. A scanning electrode and a data electrode having different resistance values, and applying a selected voltage of a predetermined level from both electrodes to a capacitive display element defined at the intersection of these electrodes in a combined form. to obtain electro-optical display effect
In an EL display panel, when giving an electro-optical display effect to a selected display element, the selected voltage applied to the selected display element is
A voltage is applied from the high-resistance side electrode at an early timing so that the voltage rises in advance for a sufficient time to reduce the influence of the electrode resistance, and a voltage from the low-resistance side electrode that is superimposed on this pre-applied voltage to give a full selection effect. A method for driving an EL display panel, characterized in that a voltage is applied with a composite voltage waveform with an applied voltage. 2. The data electrode is formed of a transparent material, and the voltage pulse applied to the transparent data electrode is applied at an earlier timing so as to rise earlier than the voltage pulse applied to the scanning electrode. As stated in claim 1
How to drive an EL display panel.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16546182A JPS5953891A (en) | 1982-09-21 | 1982-09-21 | Driving of el display panel |
| EP83305504A EP0106550B1 (en) | 1982-09-21 | 1983-09-20 | Method of driving a matrix type display |
| US06/533,986 US4636789A (en) | 1982-09-21 | 1983-09-20 | Method for driving a matrix type display |
| DE8383305504T DE3379612D1 (en) | 1982-09-21 | 1983-09-20 | Method of driving a matrix type display |
| CA000437139A CA1211874A (en) | 1982-09-21 | 1983-09-20 | Method for driving a matrix type display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16546182A JPS5953891A (en) | 1982-09-21 | 1982-09-21 | Driving of el display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5953891A JPS5953891A (en) | 1984-03-28 |
| JPH0120433B2 true JPH0120433B2 (en) | 1989-04-17 |
Family
ID=15812853
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16546182A Granted JPS5953891A (en) | 1982-09-21 | 1982-09-21 | Driving of el display panel |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5953891A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60247298A (en) * | 1984-05-21 | 1985-12-06 | 関西日本電気株式会社 | Driving system of matrix display panel |
| JP2664422B2 (en) * | 1988-07-20 | 1997-10-15 | シャープ株式会社 | Driving method of display device |
| US7714814B2 (en) | 2004-08-18 | 2010-05-11 | Lg Electronics Inc. | Method and apparatus for driving electro-luminescence display panel with an aging pulse |
-
1982
- 1982-09-21 JP JP16546182A patent/JPS5953891A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5953891A (en) | 1984-03-28 |
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