JPH0123992B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic centering correction method used in an automatic centering correction device for a television camera.

As a phase shift detection method for an automatic centering correction device, a shift direction detection method using phase comparison is known. FIG. 1 shows a general phase shift detection circuit. This is a comparator for each video signal R, G, B.
Binaryized by COM, phase comparator PHC,
Using the G channel video signal as a reference, detect the phase shift between this and the R channel or B channel video signal, and control the bias current of the R or B channel deflection system in a direction that eliminates this detected phase shift to perform centering correction. It is something. Here, the video signal in the vertical direction is not a continuous signal like in the horizontal direction, but is composed of scanning lines l ₁ , l ₂ , l ₃ as shown in FIG.
... It is a discrete signal that changes every time. Therefore, the amount of vertical deviation can only be detected by one scanning line or more. To satisfy the empirical rule that the permissible vertical deviation (limit of visual deviation detection) is ±1/4 TV lines, conventionally a special chart was used to increase the number of detection points and collect the detected data. A method has been taken to improve detection accuracy by increasing the number of pixels. However, in such a phase comparison method, even if there is a minute phase shift on the screen due to detection accuracy, there is a matching region where the detected phase shift between each channel is detected as 0. For this reason, when such a phase comparison method is adopted for phase shift detection using a general subject, it is not possible to obtain a sufficient phase shift signal from the video signal to be detected, so it is difficult to obtain sufficient control accuracy, especially in the vertical direction. There was a problem that I could not get it.

In order to solve these drawbacks, the present invention is characterized in that even when the phase shift detection resolution is low, the upper and lower limits of the coincidence region with a detected phase shift of 0 are detected and the center position thereof is calculated. The purpose is to obtain centering correction accuracy that is higher than the detection resolution.

FIG. 3 shows an embodiment of the present invention. In the following explanation, detection and correction of a vertical phase shift of an R channel video signal with respect to a G channel video signal will be described, but the same applies to detection and correction of a phase shift in the horizontal direction and a B channel video signal. In the figure, 1, 2, and 3 are R, G, and B channel deflection circuits, 4, 5, and 6 are R, G, and B channel image pickup tubes, respectively, 7 is a phase shift detection circuit, 8 is a microcomputer, and 9 is a deflection circuit. It is a control circuit. A phase shift detection circuit 7 as shown in FIG. 1 compares the phases of the video signals obtained from the R channel image pickup tube 4 and the G channel image pickup tube 5, and detects the direction of shift. The detection signal obtained here is assumed to be a ternary signal in which the phase of the R channel video signal is advanced relative to the G channel video signal, indicating coincidence or delay.
Based on this detection signal, the microcomputer 8
is a step determined in the direction in which the phase shift is eliminated for the deflection control circuit 9, and changes the correction output for correcting the bias current of the R channel deflection circuit 1. By repeating this control, the G channel and R
As the phase shift of the channel video signal decreases,
Finally, a coincidence signal is obtained from the phase shift detection circuit 7. At this time, the correction output has converged to a value that eliminates the phase shift signal between the R channel and G channel video signals. The control of the correction circuit 0 to 6 in FIG. 4 corresponds to this part. However, in this state, sufficient centering accuracy cannot be obtained because the correction output just converges on a matching area with a certain width, so this matching area (width) is next detected. First, when the microcomputer 8 detects that the detection output signal of the phase shift detection circuit 7 changes from a delayed (or advanced) signal to a coincident signal, the microcomputer 8 transmits the correction output value to the deflection control circuit 9 in the coincident region. Remember it as the bottom edge (or top edge). Then, when the correction output is further changed at the predetermined steps described above and the R channel deflection circuit 1 is controlled, the detection output signal from the phase shift detection circuit 7 advances (or lags) from coincidence due to the correction output of a certain correction step. ) turns into a traffic light.
The control for the number of corrections from 6 to 8 in FIG. 4 corresponds to this part. Here, the corrected output value when this detection output changes from a match signal to an advance (or lag) signal is stored in the microcomputer 8 as the upper end (or lower end) of the match region. Note that the detection of the corrected output value at the upper and lower ends of this matching area is as follows:
As shown in FIG. 4, the accuracy may be increased by repeating the process several times if necessary. The microcomputer 8 calculates the average value of the correction output values corresponding to the upper and lower ends obtained by detecting the matching area as described above, and uses this as the final correction output, which is sent to the R channel via the deflection control circuit 9. It is applied to the deflection circuit 1 to perform centering control that completely eliminates the phase shift between the R channel video signal and the G channel video signal. FIG. 5 is a circuit example showing another embodiment of the present invention, and FIG. 6 is a timing chart of each part thereof. Components that are the same as those in FIG. 3 are designated by the same reference numerals. Directional centering correction will be explained. 1
0 and 11 are holding circuits for corrected output values corresponding to the upper and lower ends of the matching area, respectively; 12 is an R/B channel changeover switch; 13 is an automatic centering start switch; 14 is a matching area end detection circuit; 15
is an up-down counter, 16 is a delay circuit, 1
7, 18 is an and gate, 19 is an or gate, 2
0 is a coincidence signal, 21 is an average value calculation circuit, 22 is a multiplexer, 23 is a D/A converter, 24 is a vertical synchronization signal, 25 is a delay signal, 26 is a lead signal, 27 is a detection end signal, 28 is a correction output signal It is.

In this operation, when the start switch 13 is pressed, the match area end detection circuit 14 and up/down counter 15 are initialized to their initial values. The up-down counter 15 changes its output in accordance with the vertical synchronizing signal 24, and when it is initialized, if the advance signal 26 is output, it counts down, and if it does not, it counts up. The multiplexer 22 switches between the output of the counter 15 and the output of the average value calculation circuit 21 in response to the detection end signal 27, and outputs a correction output signal 28 to the deflection control circuit 9 via the D/A converter 23. Further, when the delay signal 25 is output, the output of the counter 15 is successively rewritten and held in the holding circuit 10, and when the advance signal 26 is output, the output is held by the holding circuit 11.
It is continuously rewritten and retained. Start switch 13
Assuming that the delay signal 25 is being output as shown in FIG.
A corresponding correction output signal 28 is outputted via the A converter 23, and the deflection bias current of the R channel deflection circuit 1 is controlled by the deflection control circuit 9.
The phase shift with respect to the G channel is corrected.
This control loop generates a correction output signal 28
As the phase difference detection circuit 7 changes, the phase shift detection circuit 7 enters a matching region where the delayed signal 25 disappears at the corrected output signal 28 at a certain time point _t1 . Then, at this point, the output of the AND gate 17 disappears, and the holding circuit 10 holds the output of the counter 15 at this point, that is, the correction value corresponding to the lower end of the matching area, and does not accept the output of the counter 15 thereafter. Then, the counter 15 continues to count up, the correction output signal 28 changes accordingly, the R channel deflection circuit 1 is controlled, and at a certain time _t2 , the advance signal 26 is output from the phase shift detection circuit 7. At this point, the AND gate 18 is activated, and the output of the counter 15 at this time, that is, the correction value corresponding to the upper end of the matching area, is held in the holding circuit 11. At the same time, a detection end signal is output from the match area end detection circuit 14 to the counter 15, and counting by the counter 15 is prohibited. Here, the average value calculation circuit 21 is the holding circuit 10,
The average value, which is the center of the matching area, is output from the respective correction values corresponding to the lower and upper ends of the matching area held in 11. When the detection end signal 27 is output, the multiplexer 12 connects the output of the average value calculation circuit 21, which calculates the center of the matching area from the output of the counter 15, to the D/A converter 23, which is used as the final correction output. The signal 28 is output to the deflection control circuit 9, and R
The channel deflection circuit 1 will be controlled by an appropriate correction output. Note that, contrary to the above, when the advance signal 26 is output from the phase shift detection circuit 7, the counter 15 enters a down-counting state, and the output value of the counter 15 corresponding to the upper end of the matching area is held in the holding circuit 11. , the output value of the counter 15 corresponding to the lower end of the matching area is the holding circuit 10
, and the operation is the same as described above.

The B channel and the horizontal centering correction are the same operations as described above, so a description thereof will be omitted.

As explained above, in the past, phase shift detection accuracy could only be obtained in a matching area with a certain width, but it is possible to detect this matching area, find its center, and obtain the corresponding centering correction signal. Therefore, in the present invention, centering correction can be performed with accuracy higher than the phase shift detection resolution.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing a general phase shift detection circuit, Fig. 2 is a waveform/explanatory diagram showing the amount of shift in the R channel and G channel on the screen and in the vertical video signal, and Fig. 3 is a diagram showing one example of the present invention. FIG. 4 is an operational explanatory diagram showing the convergence process of correction, FIG. 5 is a block diagram showing another embodiment of the present invention, and FIG. 6 is a timing chart thereof. 7: Phase shift detection circuit, 8: Microcomputer, 9: Deflection control circuit, 14: Match area end detection circuit, 15: Up/down counter, 10,1
1: Holding circuit, 21: Average value calculation circuit, 22: Multiplexer, 23: D/A converter, 24:
Vertical synchronization signal, 25: Delay signal, 26: Advance signal, 27: Detection end signal, 28: Correction output signal,
17, 18: AND gate, 19: OR gate.

Claims (1)

[Claims] 1. A television that performs centering correction by detecting a phase shift between video signals of each channel whose image is to be centered, and applying a centering correction signal based on the detected phase shift signal to the deflection system of the corresponding channel. In the camera's automatic centering correction method, the lower limit and upper limit of the centering correction signal at which the detected phase shift signal becomes O (phase matching) are detected, the average value is calculated from the lower limit and the upper limit, and the calculated An automatic centering correction method characterized by using an average value signal as the final centering correction signal.