JPH0126544B2 - - Google Patents

Description

[Detailed description of the invention] [Technical field to which the invention pertains] The present invention relates to a multi-chip package, and in particular to a multi-chip LSI (Large Scale
Integration) Regarding packages.

[Prior art]

In recent years, demands for higher performance and smaller size of computers have been increasing, and as a result, semiconductor chips, especially ICs, have become increasingly popular.
Chip density has increased from a few hundred gates/chip a few years ago to 1,000 to 2,000 gates/chip recently.
Even chips are on the verge of being realized. At the same time, the power consumption per chip of IC chips has improved, and IC chips consuming 2 to 5 W/chip are becoming common.

This is because, although the power consumption per gate is decreasing due to advances in IC technology, the number of gates per chip increases due to the increase in the degree of integration, so the power consumption per chip actually increases. It is something.

By the way, in the past, many LSI packages for mounting these IC chips were of the card type, in which a single chip in a case was attached to a printed circuit board by means such as soldering.
Recently, due to the demand for smaller size and higher performance, multi-chip packages, in which an IC chip is mounted on a board in a small case called a chip carrier and multilayer wiring is provided inside the board, have come into use. .

The first challenge when realizing such a multi-chip package is how to mount a large number of IC chips on a board, that is, at high density.
The second problem is how to form high-density wiring between these highly integrated, multi-terminal IC chips, and the third problem is how to reduce the heat generated by these highly integrated, high power consumption IC chips. The key is to dissipate it efficiently.

If these challenges can be met, it will be possible to reduce the size of the multi-chip package, which will shorten the wiring length, thereby increasing operating speed and thus achieving higher performance.At the same time, it will also be possible to achieve higher circuit density. can. However, conventionally, there has been no suitable multi-chip package that satisfies the above-mentioned problems.

[Object of the Invention] An object of the present invention is to provide a high-performance, high-density multichip package that satisfies the above-mentioned conditions, is capable of efficient heat dissipation, and is miniaturized.

[Structure of the invention]

The present invention is provided with a plurality of chip carriers each having a plurality of chip carriers each having a space therein for passing a refrigerant and a plane for providing a semiconductor chip, a pipe connecting each of the spaces in the chip carrier, and a plurality of chip carriers mounted therein. A multi-chip package characterized by comprising a wiring layer for connecting terminals of a chip carrier and a multilayer wiring board having terminals for connection with the outside.

Next, the present invention will be explained in detail with reference to the drawings.

[Explanation of Examples]

Figure 1 shows a multichip that is an embodiment of the present invention.
It is a side view for explaining the LSI package.
This figure shows a multilayer wiring board 1 and a chip carrier 2.
, an IC chip 3 , a pipe 4 , a refrigerant passage gap 5 , and an input/output terminal 6 belonging to the multilayer wiring board 1
and an IC lead 7 belonging to the IC chip.

FIG. 2 is a perspective view showing the external appearance of the chip carrier 2 shown in FIG.
and a pipe connection port 9 connected to the refrigerant passage gap 5 inside the chip carrier.

FIG. 3 is a sectional view of the chip carrier 2 shown in FIG. 2, showing the internal wiring 10 connecting the IC leads and the terminals 8, and the cavity 11 for accommodating and bonding the IC chip.

FIG. 4 is a perspective view for explaining the manufacturing method of the chip carrier 2 according to the embodiment of the present invention.
Sheet 22, third sheet 23, and fourth sheet 2
4 and the fifth sheet 25 are sequentially stacked on top of each other.

In FIG. 1, a multilayer wiring board 1 has a ceramic multilayer wiring board as its base, and has terminal pads formed on its front surface for mounting and connecting a chip carrier 2, and its back surface for connecting to the outside. Input/output terminals 6 are provided.

The chip carrier 2 is connected to the terminal pads on the surface of the multilayer wiring board 1 by soldering. The soldered terminal on the chip carrier 2 side at this time is the chip carrier terminal 8 connected to the lead of the IC chip shown in FIG. 2, and serves both as a connection to the main body of the chip carrier 2 and as a signal terminal connection.

Each pipe connection port 9 of the chip carrier 2 is
They are interconnected by a pipe 4 into which a refrigerant is poured, for example, in the direction indicated by the arrow. The refrigerant is most commonly water, and in some cases a gas such as Freon gas may be used. The refrigerant flows in the direction of the arrow in the order of pipe 4 → chip carrier internal cavity 5 → the next pipe, cooling the IC chip 3 from the back side. Direct cooling with a liquid can be performed with extremely high efficiency because the molecular density of the liquid is higher than that of gas. On the other hand, when using the air cooling method, a huge heat dissipation fin is required on the top of the chip carrier 2, so the interval between the chip carriers 2 becomes large, and a large space is required for the heat dissipation fin in the height direction of the chip carrier 2.
High-density mounting of IC chips is difficult.

By the way, according to the embodiment of the present invention, as shown in FIG. 1, a refrigerant pipe 4 is installed at the top of the chip carrier 2, but these do not require a huge space like a heat dissipation fin. Since the chip carriers 2 are not spaced apart from each other, the space between the chip carriers 2 can be reduced, and the upper space can also be small, making it possible to mount extremely high-density IC chips.

As shown in FIG. 2, the chip carrier 2 according to the embodiment of the present invention is provided with a semicircular groove-shaped chip carrier terminal 8 around the periphery, similar to the leadless chip carrier, and the IC chip mounted inside is provided with a chip carrier terminal 8 in the form of a semicircular groove. connected to each of the leads. It also has at least two pipe connection ports 9 for introducing and discharging the refrigerant inside.

Inside the chip carrier shown in FIG. 3, there is a refrigerant passage gap 5 and a cavity 11 for housing the IC chip.
and internal wiring 1 to which the IC chip leads are connected.
0, but since the IC chip is glued face down inside the cavity 11,
The heat generated by the IC chip is dissipated to the outside by the refrigerant filled in the refrigerant passage gap 5 located on the back side of the IC chip, allowing efficient cooling.

The first to fifth sheets 21 to 25 in FIG.
It is a shaped alumina green sheet,
The refrigerant passage gap 5 is formed by a hole inside the fourth sheet 24 . The cavity 11 for accommodating the IC chip is formed by a hole inside the second sheet 22. A conductive paste mainly made of tungsten or molybdenum is printed as wiring on the bottom surface of the second sheet 22, and a similar conductive paste is also applied to the semicircular grooves formed on the side surface. Sheet 21 to fifth sheet 25
By stacking them and firing them at a high temperature, a chip carrier as shown in FIG. 3 can be obtained.

As this manufacturing method, an alumina ceramic chip carrier of the green sheet lamination method, which is currently widely used, can be used.

As explained above, the embodiments of the present invention can be easily manufactured mainly by using a ceramic multilayer wiring board and a ceramic chip carrier, but the multilayer wiring board does not necessarily have to be made of only ceramic layers as in the above-mentioned embodiments. It does not have to be a wiring board; for example, it can be a multilayer wiring board obtained by printing and firing a thick film insulating paste and a thick film conductor paste on a ceramic board, or a multilayer wiring board obtained by using an organic material for the insulating layer. Alternatively, printed wiring mainly made of glass epoxy may be used.

Similarly, the chip carrier does not necessarily have to be made of ceramic material, but may be a molded chip carrier.

〔Effect of the invention〕

According to the present invention, as described above, by mounting a plurality of chip carriers each having a gap for internal passage of coolant on a multilayer wiring board, a high density, high performance multichip with high cooling efficiency can be realized. This has the effect of realizing a package.

[Brief explanation of drawings]

FIG. 1 is a side view for explaining an embodiment of the present invention, FIG. 2 is a perspective view showing a chip carrier according to an embodiment of the present invention, and FIG. 3 is a sectional view of a chip carrier according to an embodiment of the present invention. FIG. 4 is a perspective view showing a method of manufacturing a chip carrier according to an embodiment of the present invention. In the figure, 1...multilayer wiring board, 2...chip carrier, 3...
IC chip, 4... pipe, 5... refrigerant passage gap,
6... Input/output terminal, 7... IC lead, 8... Chip carrier terminal, 9... Pipe connection port, 10... Chip carrier internal wiring, 11... Cavity, 21... First sheet, 22... Second sheet, 23... Third sheet, 2
4...Fourth sheet, 25...Fifth sheet.

Claims (1)

[Claims] 1. A plurality of chip carriers each having a cavity through which a refrigerant passes, at least two pipe connection ports communicating with the cavity, and a cavity in which a semiconductor chip is disposed are provided, and the pipes connecting the cavities of the plurality of chip carriers are connected to the pipe. 1. A multi-chip package comprising: a multilayer wiring board connected to the opening, on which the plurality of chip carriers are mounted, a wiring layer for connecting terminals of the plurality of chip carriers, and a terminal for connection with the outside.