JPH0141061B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a sweep signal generation circuit used in an oscilloscope or the like.

Traditionally, popular oscilloscopes have used simple sweep signal generation circuits, but the operation of the holdoff circuit, especially at the end of the sweep and at the end of the holdoff period, is similar to that of a linear amplifier and is slow.

In addition, in such popular oscilloscopes, the internal impedance of the power supply line and ground line on the circuit board tends to be high. For example, the transposition operation of the hold-off circuit causes a transient response of the power supply voltage, which is transmitted to the gate circuit. , often caused jitter in the sweep signal.

Conventionally, wideband oscilloscopes have been equipped with jitterless circuits using high-speed logic elements such as tunnel diodes, but in popular oscilloscopes, as mentioned above, the high internal impedance of the power supply line and ground line makes it difficult to use high-speed elements. Its use had the opposite effect.

The conventional sweep signal generation circuit is shown in Figures 1 and 2 below.
This will be explained using figures.

FIG. 1 is a circuit diagram of a conventional sweep signal generating circuit, and FIGS. 2 a to 2 e are timing charts showing waveforms of input and output signals of each part of the circuit. The sweep gate signal generation circuit 3, which receives the trigger pulse of the trigger input signal a applied from the input terminal 1, outputs the output terminal 2 of the hold-off circuit at time _t0 as shown in FIG.
Since the output signal b from the output signal b has completed the hold-off period, it begins to transpose. That is, if a trigger pulse is generated in the trigger input signal a at time _t1 , the sweep gate signal generation circuit 3 will cause its combined input to reach its threshold level at time _t2 .
Since e _SHI is exceeded, the output signal of the sweep gate signal generation circuit 3 begins to undergo c transposition. Since the output signal c gives the cut-off voltage es to the sweep gate transistor 4 at time _t3 , the constant current Is of the sweep integral current source 5 flows into the sweep integral capacitor _CT from time _t3 , and its terminal voltage increases. is increased, and the output voltage of the output signal d at the output terminal 8 of the sweep signal generation circuit is increased through the buffer amplifier 7.

At the same time, the constant current Is is the hold-off circuit transistor 6 connected to the other end of the sweep integrating capacitor C _T.
to the output terminal 2 of the hold-off circuit.
is kept at a low potential.

A part of the output from the buffer amplifier 7 is divided by resistors R ₁ and R ₂ and applied to the output terminal 2 of the hold-off circuit through the diode D ₂ , and is applied to the output terminal 2 of the hold-off circuit at the time.
At t ₄ , diode D ₂ is turned on, and further at time
At _t5 , the second threshold voltage of the sweep gate signal generation circuit 3 is exceeded, and the output signal C is inverted. Therefore, at time t ₆ , the input voltage of the sweep gate transistor 4 reaches the conduction level e _R and pushes down the terminal voltage of the sweep integrating capacitor C _T and also lowers the output voltage of the output signal d of the sweep signal generation circuit.

Therefore, the hold-off circuit transistor 6
The input voltage of is pushed down and cut off,
The charge in the sweep integrating capacitor C _T is a diode
_D1 and the sweep gate transistor 4 short-circuit and discharge. Therefore, the holdoff transistor 6 becomes reverse biased, and the output signal b of the holdoff circuit continues to maintain a high potential, thereby preventing the restart of the sweep.

When the sweep integrating capacitor C _T is completely discharged at time t ₇ , the base potential of the hold-off transistor 6 begins to be pulled up toward the voltage source +V through the resistor R ₄ , and when it reaches approximately 0.7 V at time t ₈ , the hold-off occurs. The transistor 6 becomes completely conductive, the output signal b of the hold-off circuit changes to a low potential, and a waiting period t _W2 for restarting the sweep by the trigger pulse begins.

In this way, when a trigger pulse is generated at time _t9 , the sweep is started again, and the operation is repeated thereafter.

Here, the synchronization jitter that the present invention aims to solve will be explained.

Figure 2 shows two sweep activations; the trigger pulse generated at time t ₁ almost reaches its peak value at time t ₂ , and the trigger pulse generated at time t ₉ reaches its peak value. The threshold potential e SHI of the input of the sweep gate signal generation circuit 3 is reached at time t ₁₀ when the threshold potential e _SHI is not reached.

If the time required for the trigger pulse in input signal a to reach its peak value is t _P , then there are t _W1 and t _W2 between the sweep signal starting at time t ₃ and the sweep signal starting at time t ₁₁ .
This means that jitter corresponding to the time of .

Next, as shown in Fig. 2, the output signal d of the sweep signal generation circuit is shown in a state in which noise e _o is added due to the influence of the transient response that occurs when the output transition of the hold-off circuit occurs, and the trigger pulse waiting period is The shorter t _W1 indicates that more noise remains than the longer t _W2 , and the noise e _oi is added to the sweep signal activated at time t ₃ . time t ₁₁
If a sweep signal that _{starts at} be.

As mentioned above, in this type of sweep signal generation circuit, synchronous jitter is generated due to the above two elements, but in popular oscilloscopes that use such a simple circuit system, high-speed element The drawback was that it was difficult to prevent noise and transient response noise from entering the system.

The present invention eliminates these drawbacks and provides a sweep signal generation circuit with less synchronization jitter.

An embodiment of the present invention will be described below with reference to FIGS. 3 and 4.

FIG. 3 is an electric circuit diagram of a sweep signal generating circuit according to an embodiment of the present invention, and FIGS. 4 a to 4 e are timing charts showing waveforms of input and output signals of each part of the circuit. 1 to 9 in the figure are the same as corresponding parts in FIG.

In FIG. 3, a feedback resistor R _F is added to change the hold-off transistor 6 in FIG. 1 from a common emitter type amplifier to a shunt feedback type amplifier, and the input terminal 1
A capacitor is connected between the base of the transistor 6 and the base of the transistor 6 as a coupling means consisting of a filter or an attenuator to adjust the amount of attenuation and remove components outside the required band.
Coupling circuit 1 consisting of a series circuit of C _B and resistor R _B
0 is set.

The operation in this embodiment is as shown in FIG. 4, and is roughly the same as in FIG. In operation, the base input impedance is very low and the input signal is less likely to appear as a voltage swing at the base. On the other hand, the sweep signal generation circuit finishes sweeping at time _t6 ,
When the reset operation begins, the input voltage drops as at the base of the transistor 6 in the conventional example, and the transistor 6 enters the cut-off state, so that the input signal appears as a voltage at the base of the transistor 6.

As a result, the hold-off transistor 6 receives an increase in base voltage q' due to the positive pulse q of the trigger input signal a, as shown in FIG. 4e.

Therefore, for a high-frequency periodic signal in which many trigger pulses are generated during the hold-off period, the end operation of the hold-off period t _H is synchronized with the positive pulse q of the trigger input signal a.

The positive pulse q and negative pulse p of the trigger input signal a are generally obtained by shaping a synchronizing signal into a square wave signal through a bistable circuit, and then converting it into a pulse through a differentiating circuit. It is clear that the time difference t _pq between the negative polarity pulse p and the positive polarity pulse q is constant if the synchronization signal has _a constant period. Therefore, the time t _W from the end time of the hold-off period to the restart of the sweep can be set to t _W =t _pq +nτ+td.

Here, t _qp is trigger pulse q and trigger pulse p
, τ is the period of the synchronization signal, and t _d is the delay time.

Here, n is zero or a natural number, and the transposition speed of transistor 6, resistances R ₆ , R _A , and capacitor C _A
This is the number of positive and negative trigger pulse pairs that exist within the longest time period t _W , which is determined by the circuit delay characteristics such as t W . This n takes a value uniquely determined by the repetition frequency of the trigger input signal.

Therefore, according to the above circuit configuration, the sweep time t _S
For high-frequency periodic signals that are sufficiently shorter than the holdoff period _tH , the time _tW from the end of the holdoff period to the restart of the sweep can be made constant in correspondence with the period τ of the synchronization signal. It is possible to make the influence of the change time t _p of the trigger pulse p and the transient response noise e _o or e _oi caused by the hold-off circuit 9 unchanged at a certain timing, and it is possible to significantly reduce synchronization jitter.

On the other hand, the base of the hold-off transistor 6 to which parts p' and q' of the trigger input signal a are applied has very little voltage change due to its feature as a shunt feedback type amplifier. In addition, the trigger pulses q and p are connected to the coupling circuit 1
It is not necessary to consider that the effect of supplying the base of transistor 6 through 0 to the base of transistor 6 is applied to the sweep signal through the sweep integrating capacitor _CT .

Therefore, the output signal d is not inferior in noise quality to that of the conventional method.

In addition, for a synchronization signal with a period longer than the sweep time or holdoff period, the probability that a trigger pulse will occur during the period of transient response noise of the holdoff circuit is sufficiently reduced, and the trigger pulse change time p also increases with the synchronization signal period. There is no problem because it can be ignored compared to .

Further, FIG. 5 shows another embodiment of the present invention, in which the trigger input signal a is connected to the coupling capacitor C _A in order to control the sweep start with a positive pulse to the sweep gate signal generation circuit 3. is replaced with transistor _TR2 .

In this embodiment, since both the start of the sweep and the end of the hold-off period are performed using a positive trigger pulse, it is not necessary to provide both positive and negative pulse components. In this case, it is impossible in terms of time for both to operate at the same time with the same synchronized pulse, so the time t _W in this case is determined by t _W = (n+1)τ, which is the same as in the previous example. effect can be achieved.

As explained above, according to the present invention, synchronization jitter can be significantly reduced by adding only a few parts, and its industrial value is great.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of a conventional sweep signal generation circuit, Fig. 2 is a timing chart of input/output signals of each part of the circuit, and Fig. 3 is an embodiment of a sweep signal generation circuit which is an embodiment of the present invention. Figure 4 is a timing chart of the input and output signals of each part of the circuit, Figure 5 is a timing chart of the input and output signals of each part of the circuit.
The figure is a circuit diagram of a sweep signal generation circuit according to another embodiment of the present invention. 1...Input terminal of sweep gate signal generation circuit, 2
... Output terminal of hold-off circuit, 3 ... Sweep gate signal generation circuit, 4 ... Sweep gate transistor, 5 ... Integral current source for sweep, 6 ... Transistor for hold-off circuit, 6a ... Shunt feedback type amplifier, 7... buffer amplifier, 8... output terminal of sweep signal generation circuit, 9... hold-off circuit, 10... coupling circuit.

Claims (1)

[Claims] 1 a sweep gate circuit into which a trigger pulse for starting the sweep is input; an integrating capacitor for generating a sweep signal having one end connected to the output terminal of the sweep gate circuit; a shunt feedback type amplifier into which a pulse is input, the output of the amplifier and the sweep signal output from the integrating capacitor are combined and applied to the input terminal of the sweep gate circuit. Signal generation circuit.