JPH0149036B2 - - Google Patents
Info
- Publication number
- JPH0149036B2 JPH0149036B2 JP12105985A JP12105985A JPH0149036B2 JP H0149036 B2 JPH0149036 B2 JP H0149036B2 JP 12105985 A JP12105985 A JP 12105985A JP 12105985 A JP12105985 A JP 12105985A JP H0149036 B2 JPH0149036 B2 JP H0149036B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- wiring board
- thickness
- adhesive
- plating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000010410 layer Substances 0.000 claims description 54
- 238000007747 plating Methods 0.000 claims description 16
- 239000004020 conductor Substances 0.000 claims description 13
- 239000012790 adhesive layer Substances 0.000 claims description 8
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 5
- 239000003054 catalyst Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 description 12
- 239000011248 coating agent Substances 0.000 description 11
- 238000000034 method Methods 0.000 description 11
- 239000000853 adhesive Substances 0.000 description 7
- 230000001070 adhesive effect Effects 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 238000007772 electroless plating Methods 0.000 description 5
- 239000000243 solution Substances 0.000 description 5
- 238000010438 heat treatment Methods 0.000 description 4
- 238000001723 curing Methods 0.000 description 3
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 238000007788 roughening Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000005406 washing Methods 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- JHWIEAWILPSRMU-UHFFFAOYSA-N 2-methyl-3-pyrimidin-4-ylpropanoic acid Chemical compound OC(=O)C(C)CC1=CC=NC=N1 JHWIEAWILPSRMU-UHFFFAOYSA-N 0.000 description 1
- UUEWCQRISZBELL-UHFFFAOYSA-N 3-trimethoxysilylpropane-1-thiol Chemical compound CO[Si](OC)(OC)CCCS UUEWCQRISZBELL-UHFFFAOYSA-N 0.000 description 1
- JOYRKODLDBILNP-UHFFFAOYSA-N Ethyl urethane Chemical compound CCOC(N)=O JOYRKODLDBILNP-UHFFFAOYSA-N 0.000 description 1
- 229960000583 acetic acid Drugs 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012362 glacial acetic acid Substances 0.000 description 1
- 238000013007 heat curing Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 230000000379 polymerizing effect Effects 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000010019 resist printing Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【発明の詳細な説明】
産業上の利用分野
本発明は多層印刷配線板の製造方法の改良に関
する。DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to an improvement in a method for manufacturing multilayer printed wiring boards.
従来の技術
従来の多層印刷配線板は両面に配線回路が形成
された内層配線板とプリプレグを交互に重合積層
し、プレスして一体化した後、穴明けし、全面に
化学銅めつき及び電気銅めつきを施し、不用な銅
層をエツチング除去して製造している。Conventional technology A conventional multilayer printed wiring board is made by alternately polymerizing and laminating an inner layer wiring board with wiring circuits formed on both sides and a prepreg, pressing them into one piece, drilling holes, and applying chemical copper plating and electrical coating to the entire surface. It is manufactured by applying copper plating and removing unnecessary copper layers by etching.
発明が解決しようとする問題点
従来の製造方法で多層回路板を製造するとき、
この方法では全面に電気銅めつきで導電体層を形
成した後、回路形成する以外の個所をエツチング
で除去しているため、無駄に銅を使用していた。
そのため、無電解めつきにより外層導電体を形成
する方法を試みた。このとき、内層回路板の表面
の絶縁層とその上の接着剤層とが、その後の外層
導電体を形成するためのめつき工程及び加熱処理
工程で接着強度を低下し、部品装着時のはんだ処
理時に剥れ現象が生じることがあつた。Problems to be Solved by the Invention When manufacturing multilayer circuit boards using conventional manufacturing methods,
In this method, after a conductor layer is formed on the entire surface by electrolytic copper plating, areas other than those where the circuit will be formed are removed by etching, resulting in wasted use of copper.
Therefore, we tried a method of forming the outer conductor layer by electroless plating. At this time, the adhesive strength of the insulating layer on the surface of the inner layer circuit board and the adhesive layer thereon decreases during the subsequent plating process and heat treatment process to form the outer layer conductor, and the solder when installing the components decreases. A peeling phenomenon sometimes occurred during processing.
問題点を解決するための手段
本発明は接着剤を塗布した絶縁板にめつきレジ
スト層を形成し、無電解めつきを行つて内層導電
体層を設けて内層回路板となし、この内層回路板
の上に絶縁層、接着剤層を形成し、めつきレジス
ト層を設けて無電解めつきを行い外層導電体層を
形成する多層印刷配線板の製造方法であつて、こ
の絶縁層を形成する際に、1回の塗布厚さを50μ
m以内で塗布硬化を繰り返して重ね塗りを行い所
定厚さにする。Means for Solving the Problems The present invention forms a plating resist layer on an insulating board coated with an adhesive, performs electroless plating to provide an inner conductive layer to form an inner circuit board, and forms an inner circuit board by forming an inner conductor layer on an insulating plate coated with an adhesive. A method for manufacturing a multilayer printed wiring board, in which an insulating layer and an adhesive layer are formed on a board, a plating resist layer is provided, and an outer conductor layer is formed by electroless plating, the insulating layer being formed. When applying, the thickness of each coating should be 50μ.
Repeat coating and curing within m to achieve a predetermined thickness.
作 用
絶縁層を形成するために1回の塗布厚が50μm
を超すと、基板のそりが大となり、次の塗布が不
均一になることがわかつた。多層印刷配線板とし
ては、絶縁層の厚さが100μm以上ないと使用さ
れる用途が限定されるので、2回以上塗布するこ
とになる。基板の表裏面を交互に塗布するとそり
が少なくなりよい。Effect The thickness of one coating is 50 μm to form an insulating layer.
It has been found that if the coating temperature exceeds 100%, the warpage of the substrate becomes large and the subsequent coating becomes uneven. If the thickness of the insulating layer is not 100 μm or more for a multilayer printed wiring board, the applications for which it can be used will be limited, so the coating must be applied two or more times. Warpage can be reduced by applying the coating alternately to the front and back surfaces of the substrate.
絶縁材料としては、通常エポキシ樹脂系の熱硬
化性樹脂が用いられるが、ウレタン系やポリエス
テル系の硬化樹脂も用いられる。塗布手段として
はスクリーン印刷法、ロールコータ法及びバーコ
ータ法等により塗布すればよい。 As the insulating material, an epoxy resin-based thermosetting resin is usually used, but a urethane-based or polyester-based cured resin is also used. As a coating method, a screen printing method, a roll coater method, a bar coater method, etc. may be used.
又絶縁材料の硬化温度は120℃以下がよい。温
度を高くすると、基板のそりが大きくなり、次の
重ね塗り塗布時に厚さが不均一になる。 Also, the curing temperature of the insulating material is preferably 120°C or lower. If the temperature is raised, the warpage of the substrate increases, resulting in uneven thickness during the next overcoat application.
実施例 本発明の実施例を説明する。Example Examples of the present invention will be described.
実施例 1
めつき触媒入り接着剤2を塗布した0.8mm厚さ
の紙フエノール樹脂積層板1にめつきレジストイ
ンクをスクリーン印刷して20μm厚のめつきレジ
スト層3を形成し、硬化(160℃30分)した後、
硼酸化水素酸と重クロム酸ソーダからなる粗化液
で接着剤2表面を化学的に粗化し、洗浄した後無
電解めつき液に浸漬して20μm厚の内層導電体層
4を形成した内層配線板10をうる。Example 1 A plating resist ink was screen printed on a 0.8 mm thick paper phenolic resin laminate 1 coated with a plating catalyst-containing adhesive 2 to form a 20 μm thick plating resist layer 3, and cured (at 160°C). 30 minutes), then
The surface of the adhesive 2 was chemically roughened with a roughening solution consisting of hydroboric acid and sodium dichromate, and after cleaning, the inner layer was immersed in an electroless plating solution to form an inner conductor layer 4 with a thickness of 20 μm. Obtain the wiring board 10.
この内層配線板10の導電体層4の表面を10%
塩酸溶液で10秒間洗浄し、水洗後、γメルカプト
プロピルトリメトキシシラン(0.3%水溶液、氷
酢酸でPH3−4に調整)中に5秒間浸漬し、つい
で90℃で10分間乾燥する。 10% of the surface of the conductor layer 4 of this inner layer wiring board 10
After washing with a hydrochloric acid solution for 10 seconds and washing with water, it is immersed in γ-mercaptopropyltrimethoxysilane (0.3% aqueous solution, adjusted to pH 3-4 with glacial acetic acid) for 5 seconds, and then dried at 90°C for 10 minutes.
次に絶縁層6としてエポキシ樹脂系インク(日
立化成工業株式会社製HCTM−02BU−1)をバ
ーコータ法にて40μ厚の層を形成し、100℃で20
分間乾燥硬化する工程を基板の表裏両面を交互に
繰り返し行つた。表裏両面について各3回塗布し
約120μmの厚さの3層の絶縁層6を形成した。 Next, as the insulating layer 6, a 40 μ thick layer was formed using an epoxy resin ink (HCTM-02BU-1 manufactured by Hitachi Chemical Co., Ltd.) using a bar coater method, and
The step of drying and curing for minutes was repeated alternately on both the front and back surfaces of the substrate. The insulating layer 6 was coated three times on both the front and back surfaces to form a three-layer insulating layer 6 with a thickness of about 120 μm.
さらに、絶縁層6の表面に接着剤層12をカー
テンコータ法で塗布し、160℃90分間の条件で加
熱乾燥し、30μmの厚さの接着剤層12を形成し
た。 Further, the adhesive layer 12 was applied to the surface of the insulating layer 6 by a curtain coater method, and dried by heating at 160° C. for 90 minutes to form the adhesive layer 12 with a thickness of 30 μm.
この後、配線板を貫通する透孔7をドリルで設
け、孔内にシーダー処理を行い、外層回路のめつ
きレジスト層13を形成し、粗化液で接着剤12
表面を粗化し洗浄後、無電解めつき液に配線板を
浸漬し、外層導電体層14を作成した。さらに半
田レジスト印刷を行い4層の印刷配線板20を製
作した。 After that, a through hole 7 is drilled through the wiring board, a seeder treatment is performed in the hole, a plating resist layer 13 for the outer layer circuit is formed, and an adhesive 12 is formed using a roughening liquid.
After the surface was roughened and washed, the wiring board was immersed in an electroless plating solution to form an outer conductor layer 14. Furthermore, solder resist printing was performed to produce a four-layer printed wiring board 20.
この配設板20は半田(260℃、10秒間)処理
時に各層間のふくれ現象がなく、MIL−107D(−
65℃125℃ 30分)の冷熱サイクルに100サイク
ル以上の信頼性を有した。また、層間にめつき液
が浸透することがないので腐食事故の発生や電気
的な短絡現象の発生が皆無であつた。 This mounting plate 20 has no blistering phenomenon between layers during soldering (260°C, 10 seconds), and has MIL-107D (-
It has a reliability of more than 100 cycles in cooling/heating cycles (65℃, 125℃, 30 minutes). Furthermore, since the plating solution did not penetrate between the layers, there was no occurrence of corrosion accidents or electrical short circuit phenomena.
実施例 2
実施例1において、絶縁層6の厚さを一回の塗
布厚40μmで5回塗布して200μmにした。Example 2 In Example 1, the thickness of the insulating layer 6 was changed to 200 μm by applying 5 times with each coating thickness of 40 μm.
実施例1と同様の信頼性がえられ、外層導電体
14の回路を0.2mm幅ラインにした所、インピー
ダンスは80Ωと高圧高温プレスを用い作成した4
層配線板と同等の特性が得られた。 The same reliability as in Example 1 was obtained, and when the circuit of the outer layer conductor 14 was made into a 0.2 mm wide line, the impedance was 80 Ω, which was created using a high-pressure and high-temperature press.
Characteristics equivalent to those of layer wiring boards were obtained.
比較例 1
実施例1において、絶縁層6の1回の塗布厚を
70μm形成した。この配線板の大きさは330×330
mmで絶縁層6を塗布し、加熱乾燥した後ソリ具合
を実測したら21mmあり、次回程の作業ができなか
つた。Comparative Example 1 In Example 1, the thickness of one coating of the insulating layer 6 was
A thickness of 70 μm was formed. The size of this wiring board is 330 x 330
After coating the insulating layer 6 with a thickness of 1.5 mm and drying it by heating, we actually measured the degree of warpage and found that it was 21 mm, so we could not carry out the next work.
比較例 2
実施例1において、絶縁層6の加熱硬化温度を
130℃に設定した。330×330mm寸法の配線板でソ
リが15mmあつて、次回程の作業ができなかつた。Comparative Example 2 In Example 1, the heat curing temperature of the insulating layer 6 was
The temperature was set at 130°C. There was a warpage of 15mm on a wiring board with dimensions of 330 x 330mm, so I was unable to do the next work.
発明の効果
本発明の製造方法を用いれば、加圧工程を含ま
ないので作業能率が向上し、信頼性も満足できる
製品が得られる。Effects of the Invention If the manufacturing method of the present invention is used, work efficiency is improved since a pressurizing step is not included, and a product with satisfactory reliability can be obtained.
第1図は内層配線板の断面図、第2図は本発明
の断面図である。
図面において、1……絶縁板、2……接着剤、
3……めつきレジスト層、4……内層導電体層、
6……絶縁層、10……内層配線板、12……接
着剤層、13……めつきレジスト層、14……外
層導電体層、20……多層印刷配線板。
FIG. 1 is a sectional view of the inner layer wiring board, and FIG. 2 is a sectional view of the present invention. In the drawings, 1...insulating plate, 2...adhesive,
3...Plated resist layer, 4...Inner conductor layer,
6...Insulating layer, 10...Inner layer wiring board, 12...Adhesive layer, 13...Plating resist layer, 14...Outer conductor layer, 20...Multilayer printed wiring board.
Claims (1)
を形成し、この接着剤層の表面の所定個所にめつ
きレジスト層を形成し、このめつきレジスト層を
除く個所に内層導電体層を形成して内層配線板と
なし、この内層配線板の表面に絶縁層を1回の塗
布厚が50μm以内で複数回繰返して塗布し、その
上に接着剤層を形成し、めつきレジスト層を形成
した後外層導電体層を形成したことを特徴とする
多層印刷配線板の製造方法。1. An adhesive layer containing a plating catalyst is formed on both sides of an insulating substrate, a plating resist layer is formed at predetermined locations on the surface of this adhesive layer, and an inner conductive layer is formed at locations other than this plating resist layer. An insulating layer is repeatedly coated on the surface of this inner layer wiring board with a thickness of 50 μm or less each time, an adhesive layer is formed thereon, and a plating resist layer is applied. 1. A method for producing a multilayer printed wiring board, comprising forming an outer conductor layer after forming the outer conductor layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12105985A JPS61279197A (en) | 1985-06-04 | 1985-06-04 | Manufacture of multilayer printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12105985A JPS61279197A (en) | 1985-06-04 | 1985-06-04 | Manufacture of multilayer printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61279197A JPS61279197A (en) | 1986-12-09 |
| JPH0149036B2 true JPH0149036B2 (en) | 1989-10-23 |
Family
ID=14801819
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12105985A Granted JPS61279197A (en) | 1985-06-04 | 1985-06-04 | Manufacture of multilayer printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61279197A (en) |
-
1985
- 1985-06-04 JP JP12105985A patent/JPS61279197A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61279197A (en) | 1986-12-09 |
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