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JPH0156557B2 - - Google Patents
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JPH0156557B2 - - Google Patents

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Publication number
JPH0156557B2
JPH0156557B2 JP55006957A JP695780A JPH0156557B2 JP H0156557 B2 JPH0156557 B2 JP H0156557B2 JP 55006957 A JP55006957 A JP 55006957A JP 695780 A JP695780 A JP 695780A JP H0156557 B2 JPH0156557 B2 JP H0156557B2
Authority
JP
Japan
Prior art keywords
film
plating
copper
conductive paste
fine pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55006957A
Other languages
Japanese (ja)
Other versions
JPS56104492A (en
Inventor
Kaoru Oomura
Takeo Kimura
Tetsuhiro Kususe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Asahi Chemical Industry Co Ltd
Original Assignee
Asahi Chemical Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Chemical Industry Co Ltd filed Critical Asahi Chemical Industry Co Ltd
Priority to JP695780A priority Critical patent/JPS56104492A/en
Publication of JPS56104492A publication Critical patent/JPS56104492A/en
Publication of JPH0156557B2 publication Critical patent/JPH0156557B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明は高密度、高信頼性の厚膜フアインパタ
ーンの簡便な製造法に関するものである。 厚膜フアインパターンは、電流値が必要とされ
る小型コイル、高密度コネクター、高密度配線な
どの分野で要求されている。例えばコイルの製造
法としては、通常巻き線方式が用いられている
が、この方法では小型のコイルを製造する事は困
難であり、かつ巻き線の状態にバラツキが生じ
る。また35μm銅箔をエツチングしたいわゆるプ
リントコイルは、サイドエツチングの為フアイン
パターンは得られず、たかだか2〜3本/mmのパ
ターンが得られるのみであり、この方法も小型の
コイルを製造する事はむつかしい。しかしなが
ら、近年モーターの小型化にともない、8〜10
本/mmのフアインパターンを有するフアインコイ
ルの開発が要望されている。 本発明は、まず膜厚5〜10μmの導電性ペース
トのパターンを形成した後、硫酸銅メツキ液また
はピロリン酸銅メツキ液を用いて、陰極電流密度
5〜15A/dm2の条件で導電体を電解メツキして
厚付けする事により、高密度、高信頼性の厚膜フ
アインパターンが得られる事を見い出したもので
ある。 即ち、本発明は、フイルム基板の回路部に、膜
厚5〜10μmの導電性ペーストのパターンを形成
した後、硫酸銅メツキ液またはピロリン酸銅メツ
キ液を用いて、陰極電流密度5〜15A/dm2の条
件で導電体を電解メツキすることを特徴とする厚
膜フアインパターンの製造法を提供するものであ
る。 厚膜フアインパターン(例えば、5本/mm以上
で厚膜20〜50μm)の製造においては、第1図に
示すように電解メツキの陰極電流密度が重要で、
通常の電流密度で電解メツキを行うと、膜厚以上
に幅方向への太りが生じ、かつメツキ膜厚が不均
一になつてしまい、厚膜フアインパターンを得る
事はむつかしい。この問題点を解決する為に、電
解メツキの陰極電流密度が重要であり、3〜
20A/dm2が好ましい範囲であり、特に5〜
15A/dm2が好ましい。陰極電流密度が3A/d
m2以下の場合は幅方向への太りが生じ、かつメツ
キ膜厚が不均一となり、20A/dm2以上の場合は
やけが生じる様になる。 本発明の厚膜フアインパターンの製造方法は、
フイルム状基板の片面だけに形成しても良いが、
必要に応じて両面に形成しても良く、両面に形成
する場合は導電性ペーストを形成する前に、フイ
ルム状基板に穴あけし、スルーホール接続を行う
必要がある。1枚のフイルム状基板の上に複数の
パターンを形成する場合は、フイルム状基板の両
面にパターンを形成し、スルーホール接続した方
がつなぎ込みが容易であり好ましい。 本発明に使用されるフイルム状基板としては、
ポリエステルフイルム、エポキシフイルム、ポリ
イミドフイルム、ポリパラバン酸フイルム、トリ
アジンフイルムなどフイルム状のものはすべて使
用出来るが、可撓性、耐熱性の点からポリイミド
フイルム、ポリパラバン酸フイルム、トリアジン
フイルムが好ましい。フイルム状基板の膜厚は高
密度化という意味では出来るだけ薄いものが好ま
しいが、余り薄過ぎると作業性が悪くなり、膜厚
としては5〜50μm、特に10〜25μmが好ましい
範囲である。 本発明において行われる導電性ペーストのパタ
ーンを成する方法としては、導電性ペーストをス
クリーン印刷又はグラビア印刷しても良く、フオ
トフオーミング用導電性ペーストを塗布、露光、
現像プロセスを経て行つても良い。印刷法はそれ
程のフアインパターンは得られないが、簡単なプ
ロセスで行え、またフオトフオーミング法はプロ
セスは若干複雑だが、フアインパターンは得易
い。導電性ペーストは、基本的には銀、銅などの
導電性粒子、ポリマーバインダーおよび溶媒から
なり、藤倉化成社の「ドータイト」、徳力化学研
究所の「シルベスト」、タムラ化研社の「アゼル
ライト」などが一般的であり、メツキ性、パター
ニング性および耐熱性に優れたものが好ましい。
導電性ペーストの膜厚は、1〜30μmが好ましい
範囲であり、1μm以下では均一なメツキが困難
であり、30μm以上ではフアインパターンが得ら
れ難くなる。 本発明においては、導電性ペーストのパターン
を形成した後、導電性ペースト上に無電解メツキ
で導電体を形成する事がより好ましい。無電解メ
ツキ膜厚は、フアインパターン得る為に10μm以
下特に5μm以下が好ましい。無電解メツキの種
類としては導電体であれば何でも良いが、特に経
済性および導電性の点から銅が好ましい。 電解メツキの種類としては、導電体であれば何
でも良いが、銀、金、銅、ニツケル、スズなどが
好ましく、特に導電性および経済性の点から銅が
好ましい。銅の電解メツキとしては、シアン化銅
メツキ、ピロリン酸銅メツキ、硫酸銅メツキ、ホ
ウフツ化銅メツキなどがあるが、特にピロリン酸
銅メツキ、硫酸銅メツキが好ましい。メツキ膜厚
は設計値により異なり、10〜50μmが好ましい範
囲である。 また、より信頼性を向上する為に、必要に応じ
て、電解メツキ後、熱処理或いは金、スズ、ハン
ダ又はポリマーから成る保護層を設けるなどの処
理が行われる。 以下に本発明の態様を一層明確にする為に、実
施例を挙げて説明するが、本発明は以下の実施例
に限定されるものではなく、種々の変形が可能で
ある。 実施例 1 デユポン社製ポリイミドフイルム「カプトン」
(膜厚25μm)に、藤倉化成社製導電性ペースト
「D−850」を10μm厚回路部にスクリーン印刷し
て、150℃で30分間熱処理した。次いで、ハーシ
ヨウ村田社製ピロリン酸銅メツキ液を用いて、陰
極の電流密度14A/dm2の条件で銅を20μm厚電
解メツキを行つて、均一な膜厚を有する8本/mm
のフアインパターンを得た。 実施例 2 エツソ化学社製ポリパラバン酸フイルム「トラ
ドロン」(膜厚25μm)に、スルーホール部の穴
あけを行い、m−フエニレンジアミンと無水トリ
メリツト酸クロライドから得たポリアミドイミド
10gと粒径1.8μmの銀微粒子90gおよびジメチル
アセトアミド25mlからなる導電性ペーストを、
5μm厚回路部にグラビア印刷して、100℃で30分
間熱処理した。その後、シプレー社製無電解メツ
キ液「CP−70」を用いて、銅を3μm厚無電解メ
ツキし、次いで、ハーシヨウ村田社製ピロリン酸
銅メツキ液を用いて、陰極の電流密度7A/dm2
の条件で銅を20μm厚電解メツキを行つて、均一
な膜厚を有しスルーホール接続された両面8本/
mmのフアインパターンを得た。 比較例 1〜2 陰極電流密度を表1に示す如くする以外は、実
施例1と同様に処理した。結果を表1に示す。
The present invention relates to a simple method for manufacturing a thick film fine pattern with high density and high reliability. Thick film fine patterns are required in fields such as small coils, high-density connectors, and high-density wiring that require high current values. For example, a wire winding method is normally used to manufacture coils, but this method makes it difficult to manufacture small coils and causes variations in the state of the windings. In addition, so-called printed coils made by etching 35 μm copper foil cannot obtain fine patterns because of side etching, and can only obtain patterns of 2 to 3 wires/mm at most, and this method is also difficult to manufacture small coils. It's difficult. However, with the miniaturization of motors in recent years,
There is a demand for the development of a fine coil having a fine pattern of 1/mm. In the present invention, after first forming a conductive paste pattern with a film thickness of 5 to 10 μm, a conductor is coated using a copper sulfate plating solution or a copper pyrophosphate plating solution at a cathode current density of 5 to 15 A/ dm2 . It has been discovered that a thick film fine pattern with high density and high reliability can be obtained by electrolytically plating the film. That is, in the present invention, after forming a conductive paste pattern with a film thickness of 5 to 10 μm on the circuit portion of a film substrate, a cathode current density of 5 to 15 A/cm is applied using a copper sulfate plating solution or a copper pyrophosphate plating solution. The present invention provides a method for producing a thick film fine pattern characterized by electrolytically plating a conductor under dm2 conditions. In the production of thick film fine patterns (for example, thick films of 20 to 50 μm with 5 lines/mm or more), the cathode current density of electrolytic plating is important, as shown in Figure 1.
When electrolytic plating is performed at a normal current density, thickening occurs in the width direction more than the film thickness, and the plating film thickness becomes uneven, making it difficult to obtain a thick film fine pattern. In order to solve this problem, the cathode current density of electrolytic plating is important;
20A/ dm2 is a preferable range, especially 5~
15 A/dm 2 is preferred. Cathode current density is 3A/d
If it is less than m 2 , thickening occurs in the width direction and the plating film thickness becomes non-uniform, and if it is more than 20 A/dm 2 , it will cause burns. The method for manufacturing a thick film fine pattern of the present invention includes:
It may be formed only on one side of the film-like substrate, but
If necessary, it may be formed on both sides, and if it is formed on both sides, it is necessary to make holes in the film-like substrate and perform through-hole connections before forming the conductive paste. In the case of forming a plurality of patterns on one film-like substrate, it is preferable to form the patterns on both sides of the film-like substrate and connect them through through holes because it is easier to connect them. The film substrate used in the present invention includes:
All film-like materials such as polyester film, epoxy film, polyimide film, polyparabanic acid film, and triazine film can be used, but polyimide film, polyparabanic acid film, and triazine film are preferred from the viewpoint of flexibility and heat resistance. The film thickness of the film-like substrate is preferably as thin as possible in the sense of high density, but if it is too thin, workability will deteriorate, so the film thickness is preferably in the range of 5 to 50 .mu.m, particularly 10 to 25 .mu.m. In the present invention, the conductive paste pattern may be formed by screen printing or gravure printing, and the conductive paste for photoforming may be coated, exposed,
It may be performed through a developing process. The printing method does not produce such a fine pattern, but it is a simple process, and the photoforming method has a slightly complicated process, but it is easy to obtain a fine pattern. Conductive pastes basically consist of conductive particles such as silver or copper, a polymer binder, and a solvent. '' are common, and those with excellent plating properties, patterning properties, and heat resistance are preferred.
The preferred thickness of the conductive paste is 1 to 30 μm; if it is less than 1 μm, it will be difficult to achieve uniform plating, and if it is more than 30 μm, it will be difficult to obtain a fine pattern. In the present invention, after forming a pattern of conductive paste, it is more preferable to form a conductor on the conductive paste by electroless plating. The electroless plating film thickness is preferably 10 μm or less, particularly 5 μm or less in order to obtain a fine pattern. Any type of electroless plating may be used as long as it is a conductor, but copper is particularly preferred from the viewpoint of economy and conductivity. Any type of electrolytic plating may be used as long as it is a conductor, but silver, gold, copper, nickel, tin, etc. are preferred, and copper is particularly preferred from the standpoint of conductivity and economy. Examples of electrolytic plating for copper include copper cyanide plating, copper pyrophosphate plating, copper sulfate plating, and copper borofluoride plating, with copper pyrophosphate plating and copper sulfate plating being particularly preferred. The thickness of the plating film varies depending on the design value, and is preferably in the range of 10 to 50 μm. Further, in order to further improve reliability, after electrolytic plating, heat treatment or treatment such as providing a protective layer made of gold, tin, solder, or polymer is performed as necessary. EXAMPLES In order to further clarify aspects of the present invention, examples will be described below, but the present invention is not limited to the following examples, and various modifications are possible. Example 1 Polyimide film “Kapton” manufactured by DuPont
(film thickness: 25 μm), conductive paste “D-850” manufactured by Fujikura Kasei Co., Ltd. was screen printed on a 10 μm thick circuit portion, and heat treated at 150° C. for 30 minutes. Next, copper was electrolytically plated to a thickness of 20 μm at a cathode current density of 14 A/dm 2 using a copper pyrophosphate plating solution manufactured by Hershyou Murata Co., Ltd. to form a film with a uniform thickness of 8 wires/mm.
A fine pattern was obtained. Example 2 Through-holes were drilled in the polyparabanic acid film "Tradron" (film thickness 25 μm) manufactured by Etsuo Chemical Co., Ltd., and polyamideimide obtained from m-phenylenediamine and trimellitic anhydride chloride was prepared.
A conductive paste consisting of 10 g, 90 g of fine silver particles with a particle size of 1.8 μm, and 25 ml of dimethylacetamide,
Gravure printing was performed on a 5 μm thick circuit portion and heat treated at 100° C. for 30 minutes. Thereafter, copper was electrolessly plated to a thickness of 3 μm using an electroless plating solution "CP-70" manufactured by Shipley Co., Ltd., and then a current density of 7 A/dm 2 was applied to the cathode using a copper pyrophosphate plating solution manufactured by Hersho Murata Co., Ltd.
Electrolytic plating of copper with a thickness of 20 μm was performed under the conditions of
A fine pattern of mm was obtained. Comparative Examples 1-2 The same process as in Example 1 was carried out except that the cathode current density was changed as shown in Table 1. The results are shown in Table 1.

【表】 比較例 3〜4 導電性ペーストの膜厚を表2の如くする以外
は、実施例1と同様に処理した。結果を表2に示
す。
[Table] Comparative Examples 3 to 4 The same process as in Example 1 was carried out except that the film thickness of the conductive paste was changed as shown in Table 2. The results are shown in Table 2.

【表】【table】 【図面の簡単な説明】[Brief explanation of drawings]

第1図は、電解メツキによる導電体成長曲線で
ある。
FIG. 1 is a conductor growth curve obtained by electrolytic plating.

Claims (1)

【特許請求の範囲】[Claims] 1 フイルム状基板の回路部に、膜厚5〜10μm
の導電性ペーストのパターンを形成した後、硫酸
銅メツキ液またはピロリン酸銅メツキ液を用い
て、陰極電流密度5〜15A/dm2の条件で導電体
を電解メツキすることを特徴とする線密度5本/
mm以上で膜厚20μm以上の導体を有する厚膜フア
インパターンの製造法。
1. A film thickness of 5 to 10 μm is applied to the circuit part of the film-like substrate.
After forming a conductive paste pattern, the conductor is electrolytically plated using a copper sulfate plating solution or a copper pyrophosphate plating solution at a cathode current density of 5 to 15 A/ dm2. 5 bottles/
A method for manufacturing a thick film fine pattern having a conductor of mm or more and film thickness of 20 μm or more.
JP695780A 1980-01-25 1980-01-25 Method of manufacturing thick film fine pattern Granted JPS56104492A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP695780A JPS56104492A (en) 1980-01-25 1980-01-25 Method of manufacturing thick film fine pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP695780A JPS56104492A (en) 1980-01-25 1980-01-25 Method of manufacturing thick film fine pattern

Publications (2)

Publication Number Publication Date
JPS56104492A JPS56104492A (en) 1981-08-20
JPH0156557B2 true JPH0156557B2 (en) 1989-11-30

Family

ID=11652696

Family Applications (1)

Application Number Title Priority Date Filing Date
JP695780A Granted JPS56104492A (en) 1980-01-25 1980-01-25 Method of manufacturing thick film fine pattern

Country Status (1)

Country Link
JP (1) JPS56104492A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4926676B2 (en) * 2006-12-04 2012-05-09 日本メクトロン株式会社 Manufacturing method of multilayer printed wiring board

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5160957A (en) * 1974-11-25 1976-05-27 Nippon Kokuen Kogyo Kk PURINTOKI BANSEIZOHO

Also Published As

Publication number Publication date
JPS56104492A (en) 1981-08-20

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