JPH021443B2 - - Google Patents
Info
- Publication number
- JPH021443B2 JPH021443B2 JP15570283A JP15570283A JPH021443B2 JP H021443 B2 JPH021443 B2 JP H021443B2 JP 15570283 A JP15570283 A JP 15570283A JP 15570283 A JP15570283 A JP 15570283A JP H021443 B2 JPH021443 B2 JP H021443B2
- Authority
- JP
- Japan
- Prior art keywords
- oscillation
- waveguide
- dielectric resonator
- fundamental wave
- cut
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B19/00—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
- H03B19/16—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source using uncontrolled rectifying devices, e.g. rectifying diodes or Schottky diodes
- H03B19/18—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source using uncontrolled rectifying devices, e.g. rectifying diodes or Schottky diodes and elements comprising distributed inductance and capacitance
Description
【発明の詳細な説明】
発明の技術分野
本発明はインパツトダイオード、ガンダイオー
ドなどの発振用半導体素子を用い周波数逓倍を行
なう発振逓倍器に関するものである。DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to an oscillation multiplier that performs frequency multiplication using oscillation semiconductor elements such as impact diodes and Gunn diodes.
従来技術と問題点
第1図は従来の導波管型の発振逓倍器を説明す
るための図であり、aは正面図、bはa図のb−
b線における断面図を示す。同図において1及び
2は導波管、3は発振素子、4はデイスク型共振
器をそれぞれ示している。この発振逓倍器はデイ
スク型共振器4がそのデイスク直径できまる共振
周波数で発振し導波管1を励振せしめるので、他
方の導波管2をカツトオフ導波管としておくこと
により該導波管2から高調波だけが出て来るよう
になつている。ところがこの発振逓倍器は周波数
安定度が悪く、恒温槽に入れて使用するか、注入
同期にて安定化するなどの必要があり非常に高価
となる欠点があつた。またマイクロ波集積回路化
した発振逓倍器は、基本波発振部のハウジングが
立体回路として働らき、特にミリ波帯のような超
高周波では、高調波に対しては高次モードの共振
がいくつも起こり、出力の変動が大きく、広帯域
特性を阻害する欠点があつた。Prior Art and Problems Figure 1 is a diagram for explaining a conventional waveguide type oscillation multiplier, in which a is a front view and b is a -b-- of figure a.
A sectional view taken along line b is shown. In the figure, 1 and 2 are waveguides, 3 is an oscillation element, and 4 is a disk-type resonator, respectively. In this oscillation multiplier, the disk-type resonator 4 oscillates at a resonant frequency determined by the disk diameter and excites the waveguide 1. Therefore, by making the other waveguide 2 a cut-off waveguide, the waveguide 2 Now only harmonics are coming out. However, this oscillation multiplier has poor frequency stability and has the disadvantage of being very expensive, requiring it to be placed in a constant temperature bath or stabilized by injection locking. In addition, in an oscillation multiplier built into a microwave integrated circuit, the housing of the fundamental wave oscillation part acts as a three-dimensional circuit, and especially at ultra-high frequencies such as the millimeter wave band, there are many high-order mode resonances for harmonics. This resulted in large fluctuations in output, which hindered broadband characteristics.
発明の目的
本発明は上記従来の欠点に鑑み、誘電体共振器
を有する基本波発振部と発振用半導体素子を設け
た出力導波管部を分離し、高調波電流が流れこま
ないようにして動作の安定性を確保した発振逓倍
器を提供することを目的とするものである。Purpose of the Invention In view of the above-mentioned conventional drawbacks, the present invention separates the fundamental wave oscillation part having a dielectric resonator and the output waveguide part provided with an oscillation semiconductor element to prevent harmonic current from flowing into the part. The object of the present invention is to provide an oscillation multiplier that ensures stability of operation.
発明の構成
そしてこの目的は本発明によれば、発振用半導
体素子と、ダミーロードを有するマイクロストリ
ツプラインと、基本波に共振する誘電体共振器
と、出力周波数以上を阻止するカツトオフ導波管
と、基本波を阻止する出力導波管とからなる発振
逓倍器において、前記発振用半導体素子を出力導
波管内に設置し、カツトオフ導波管を介してマイ
クロストリツプラインにより基本波発振部と接続
したことを特徴する発振逓倍器を提供することに
よつて達成される。Structure of the Invention According to the present invention, an oscillation semiconductor element, a microstrip line having a dummy load, a dielectric resonator that resonates with the fundamental wave, and a cut-off waveguide that blocks frequencies higher than the output frequency are provided. In the oscillation multiplier, the semiconductor element for oscillation is installed in the output waveguide, and the fundamental wave oscillator and the fundamental wave oscillator are connected to each other by a microstrip line via a cut-off waveguide. This is achieved by providing an oscillation multiplier characterized in that it is connected.
発明の実施例 以下、本発明実施例を図面によつて詳述する。Examples of the invention Embodiments of the present invention will be described in detail below with reference to the drawings.
第2図は本発明による発振逓倍器を説明するた
めの図であり、aは蓋を除いた状態での平面図、
bはa図のb−b線における断面図である。 FIG. 2 is a diagram for explaining the oscillation multiplier according to the present invention, and a is a plan view with the lid removed;
b is a cross-sectional view taken along line bb in figure a.
同図において、10は金属筐体、11は金属筐
体に形成されたキヤビテイ、12はカツトオフ導
波管、13は出力導波管、14はガンダイオード
の発振用2端子半導体、15はセラミツク基板、
16はマイクロストリツプライン、17はダミー
ロード、18は第1の誘電体共振器、19は副共
振回路、20はバラクタ、21はダイオード用バ
イアス端子、22はバラクタ用バイアス端子、2
3は第2の誘電体共振器、24は第2の誘電体共
振器の周波数調整用ネジ、25は金属蓋をそれぞ
れ示している。 In the figure, 10 is a metal casing, 11 is a cavity formed in the metal casing, 12 is a cut-off waveguide, 13 is an output waveguide, 14 is a two-terminal semiconductor for Gunn diode oscillation, and 15 is a ceramic substrate. ,
16 is a microstrip line, 17 is a dummy load, 18 is a first dielectric resonator, 19 is a sub-resonant circuit, 20 is a varactor, 21 is a diode bias terminal, 22 is a varactor bias terminal, 2
Reference numeral 3 indicates a second dielectric resonator, 24 a frequency adjustment screw of the second dielectric resonator, and 25 a metal lid.
本実施例は第2図に示す如く金属筐体10と、
該金属筐体内に収容されたマイクロ波回路と、該
金属筐体のキヤビテイを閉じる金属蓋25とから
なり、金属筐体10には基本波発振部を収容する
キヤビテイ11と、カツトオフ導波管12と、出
力導波管13とが形成されている。そしてキヤビ
テイ11にはセラミツク基板の上に形成又は搭載
されたマイクロストリツプライン16、ダミーロ
ード17、第1の誘電体共振器18、副共振回路
19、バラクタ20等を具備した基本波発振部が
収容され、カツトオフ導波管12には第2の誘電
体共振器23が設置され、出力導波管13にはガ
ンダイオード等の発振用2端子半導体14が設け
られカツトオフ導波管12を介して基本波発振部
のマイクロストリツプライン16に金リボンで接
続されている。この発振用2端子半導体14と第
1の誘電体共振器18との距離l3はほぼλg/4
(2n−1)(但しλgは基本波の波長、nは整数)
としている。また金属蓋25には第1の誘電体共
振器18の周波数調整用ネジ(図示なし)と第2
の誘電体共振器23の周波数調整用ネジ24とが
設けられている。 As shown in FIG. 2, this embodiment includes a metal casing 10,
It consists of a microwave circuit housed in the metal casing and a metal lid 25 that closes the cavity of the metal casing. and an output waveguide 13 are formed. In the cavity 11, there is a fundamental wave oscillation section that includes a microstrip line 16, a dummy load 17, a first dielectric resonator 18, a sub-resonant circuit 19, a varactor 20, etc. formed or mounted on a ceramic substrate. A second dielectric resonator 23 is installed in the cut-off waveguide 12, and a two-terminal semiconductor 14 for oscillation such as a Gunn diode is installed in the output waveguide 13. It is connected to the microstrip line 16 of the fundamental wave oscillation section with a gold ribbon. The distance l 3 between this two-terminal semiconductor 14 for oscillation and the first dielectric resonator 18 is approximately λ g /4.
(2n−1) (where λ g is the wavelength of the fundamental wave and n is an integer)
It is said that The metal lid 25 also has a frequency adjustment screw (not shown) for the first dielectric resonator 18 and a second
A frequency adjustment screw 24 of the dielectric resonator 23 is provided.
このように構成された本実施例は、発振用2端
子半導体14と第1の誘電体共振器18との距離
をほぼλg/4(2n−1)としていることにより基
本波発振部で基本波が発振される。また第1の誘
電体共振器18は副共振回路19にも結合してお
りバラクタ20により周波数変調をかけることが
できる。またカツトオフ導波管12は出力導波管
13よりマイクロストリツプライン16を通して
基本波発振部に洩れ込む高調波を第2の誘電体共
振器23で阻止することにより高次モードの共振
の影響を除いている。また発振用2端子半導体1
4と第2の誘電体共振器23との距離l2は出力周
波数に対して整合素子として働らくのでl2を可変
とすれば出力調整が可能となる。 In this embodiment configured as described above, the distance between the two-terminal semiconductor 14 for oscillation and the first dielectric resonator 18 is set to approximately λ g /4 (2n-1), so that the fundamental wave oscillation part waves are oscillated. The first dielectric resonator 18 is also coupled to a sub-resonant circuit 19, and can be frequency modulated by a varactor 20. In addition, the cut-off waveguide 12 prevents harmonics from leaking from the output waveguide 13 into the fundamental wave oscillation section through the microstrip line 16 with the second dielectric resonator 23, thereby reducing the influence of higher-order mode resonance. Excluding. In addition, the 2-terminal semiconductor 1 for oscillation
The distance l 2 between the resonator 4 and the second dielectric resonator 23 acts as a matching element for the output frequency, so if l 2 is made variable, the output can be adjusted.
なお第2の誘電体共振器23がない場合でも第
1の誘電体共振器18が出力周波に対して容量サ
セプタンスとして働らき、第1の誘電体共振器1
8の収容される基本波発振部内に流れこむ高調波
は少なく前記基本波発振部内に電波吸収体を置き
高次モードの共振を吸収しても出力電力の損失は
少なく、充分実用可能であり、第2誘電体共振器
23が不要となる利点がある。 Note that even when the second dielectric resonator 23 is not present, the first dielectric resonator 18 acts as a capacitive susceptance for the output frequency, and the first dielectric resonator 1
There are few harmonics flowing into the fundamental wave oscillation section in which No. 8 is accommodated, and even if a radio wave absorber is placed in the fundamental wave oscillation section to absorb higher-order mode resonance, the loss of output power is small, and it is sufficiently practical. There is an advantage that the second dielectric resonator 23 is not required.
第3図は他の実施例を説明するための図であ
る。本実施例が第2図に示した前実施例と異なる
ところは、カツトオフ導波管12内の第2の誘電
体共振器23を除き、マイクロストリツプライン
16にスタブ26,26′を設け、出力周波数の
み阻止し、基本波に対して打消す関係の帯域阻止
波器を構成したものである。本実施例では第2
の誘電体共振器がなくても出力高調波を阻止でき
るので出力電力の損失を小さく、かつ動作の安定
化が可能となる。またマイクロストリツプライン
で構成できるので低価格で実現できる利点があ
る。 FIG. 3 is a diagram for explaining another embodiment. This embodiment is different from the previous embodiment shown in FIG. 2, except for the second dielectric resonator 23 in the cut-off waveguide 12, and the microstrip line 16 is provided with stubs 26, 26'. This is a band-elimination device that blocks only the output frequency and cancels the fundamental wave. In this example, the second
Since output harmonics can be blocked even without a dielectric resonator, output power loss can be reduced and operation can be stabilized. Furthermore, since it can be constructed using microstrip lines, it has the advantage of being realized at a low cost.
第4図は発振用半導体素子として電界効果型ト
ランジスタ等の3端子半導体を使用する場合の1
例を示した図であり、ドレインDを接地すること
により、ゲートGより見ると負性抵抗としてみえ
るためダイオードと同様に使用することができ
る。 Figure 4 shows a case where a three-terminal semiconductor such as a field effect transistor is used as an oscillation semiconductor element.
This figure shows an example, and by grounding the drain D, it appears as a negative resistance when viewed from the gate G, so it can be used in the same way as a diode.
発明の効果
以上、詳細に説明したように本発明による発振
逓倍器は、発振用2端子半導体を出力導波管内に
配置し、基本波発振を行なう誘電体共振器との間
をマイクロストリツプラインで接続し、両者の間
に出力周波数を阻止するカツトオフ導波管をお
き、マイクロストリツプラインを通り基本波発振
部に洩れ込む高調波を阻止することにより動作の
安定性が確保されるといつた効果大なるものであ
る。Effects of the Invention As described above in detail, the oscillation multiplier according to the present invention has a two-terminal semiconductor for oscillation disposed within the output waveguide, and a microstrip line between the two-terminal semiconductor for oscillation and the dielectric resonator that performs fundamental wave oscillation. A cut-off waveguide is placed between the two to block the output frequency, and operation stability is ensured by blocking the harmonics that leak into the fundamental wave oscillator through the microstrip line. The effect is great.
第1図は従来の導波管型発振逓倍器を説明する
ための図、第2図は本発明による発振逓倍器を説
明するための図、第3図及び第4図は他の実施例
を説明するための図である。
図面において、10は金属筐体、11はキヤビ
テイ、12はカツトオフ導波管、13は出力導波
管、14は発振用2端子半導体、16はマイクロ
ストリツプライン、17はダミーロード、18は
第1の誘電体共振器、23は第2の誘電体共振
器、25は金属蓋をそれぞれ示す。
FIG. 1 is a diagram for explaining a conventional waveguide type oscillation multiplier, FIG. 2 is a diagram for explaining an oscillation multiplier according to the present invention, and FIGS. 3 and 4 are diagrams for explaining other embodiments. It is a figure for explaining. In the drawing, 10 is a metal case, 11 is a cavity, 12 is a cut-off waveguide, 13 is an output waveguide, 14 is a two-terminal semiconductor for oscillation, 16 is a microstrip line, 17 is a dummy load, and 18 is a third waveguide. 1 is a dielectric resonator, 23 is a second dielectric resonator, and 25 is a metal lid.
Claims (1)
マイクロストリツプラインと、基本波に共振する
誘電体共振器と、出力周波数以上を阻止するカツ
トオフ導波管と、基本波を阻止する出力導波管と
からなる発振逓倍器において、前記発振用半導体
素子を出力導波管内に設置し、カツトオフ導波管
を介してマイクロストリツプラインにより基本波
発振部と接続したことを特徴とする発振逓倍器。 2 前記カツトオフ導波管に、出力周波数に共振
する第2の誘電体共振器を設けたことを特徴とす
る特許請求の範囲第1項記載の発振逓倍器。[Claims] 1. An oscillation semiconductor element, a microstripline having a dummy load, a dielectric resonator that resonates with the fundamental wave, a cut-off waveguide that blocks frequencies above the output frequency, and a cut-off waveguide that blocks the fundamental wave. In the oscillation multiplier comprising an output waveguide, the oscillation semiconductor element is installed in the output waveguide and connected to the fundamental wave oscillation part by a microstrip line via a cut-off waveguide. oscillation multiplier. 2. The oscillation multiplier according to claim 1, wherein the cut-off waveguide is provided with a second dielectric resonator that resonates at the output frequency.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15570283A JPS6048604A (en) | 1983-08-27 | 1983-08-27 | Oscillation multiplier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15570283A JPS6048604A (en) | 1983-08-27 | 1983-08-27 | Oscillation multiplier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6048604A JPS6048604A (en) | 1985-03-16 |
| JPH021443B2 true JPH021443B2 (en) | 1990-01-11 |
Family
ID=15611645
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15570283A Granted JPS6048604A (en) | 1983-08-27 | 1983-08-27 | Oscillation multiplier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6048604A (en) |
-
1983
- 1983-08-27 JP JP15570283A patent/JPS6048604A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6048604A (en) | 1985-03-16 |
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