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JPH0241168B2 - - Google Patents
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JPH0241168B2 - - Google Patents

Info

Publication number
JPH0241168B2
JPH0241168B2 JP56017713A JP1771381A JPH0241168B2 JP H0241168 B2 JPH0241168 B2 JP H0241168B2 JP 56017713 A JP56017713 A JP 56017713A JP 1771381 A JP1771381 A JP 1771381A JP H0241168 B2 JPH0241168 B2 JP H0241168B2
Authority
JP
Japan
Prior art keywords
substrate
emitter region
diffusion
gold
mixed gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56017713A
Other languages
Japanese (ja)
Other versions
JPS57132358A (en
Inventor
Kenichiro Kaneko
Mitsuhiko Kanbayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56017713A priority Critical patent/JPS57132358A/en
Publication of JPS57132358A publication Critical patent/JPS57132358A/en
Publication of JPH0241168B2 publication Critical patent/JPH0241168B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/30Devices controlled by electric currents or voltages
    • H10D48/32Devices controlled by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H10D48/34Bipolar devices
    • H10D48/345Bipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions

Landscapes

  • Bipolar Transistors (AREA)

Description

【発明の詳細な説明】 本発明は半導体装置の製造方法に係り、特にバ
イポーラトランジスタのスイツチング・スピード
向上するための金拡散工程における熱処理工程の
改良に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and more particularly to an improvement in a heat treatment process in a gold diffusion process for improving the switching speed of a bipolar transistor.

一般に半導体基板にバイポーラトランジスタを
製造する場合、トランジスタのスイツチング特性
改善のために、キヤリアのライプタイム・キラー
として金、銅、鉄等の重金属の拡散が行なわれ
る。
Generally, when bipolar transistors are manufactured on a semiconductor substrate, heavy metals such as gold, copper, and iron are diffused as carrier lifetime killers in order to improve the switching characteristics of the transistors.

第1図は一般的なバイポーラトランジスタの断
面図である。1は半導体基板で、2の表面にはN
型のコレクタ領域2とP型のベース領域3、及び
ベース領域内にN型のエミツタ領域4が形成され
る。5はコレクタコンタクト部、6は埋込み層、
7は素子分離部である。
FIG. 1 is a cross-sectional view of a general bipolar transistor. 1 is a semiconductor substrate, and 2 has N on its surface.
A type collector region 2, a P type base region 3, and an N type emitter region 4 are formed within the base region. 5 is a collector contact part, 6 is a buried layer,
7 is an element isolation section.

従来の金拡散工程では、上記したような各領域
を形成(拡散)した後、基板の裏面に金の層を蒸
着せしめ、その後酸素ガス雰囲気中で熱処理
(1000〜1100℃)を施こして、金を基板中に拡散
していた。十分なライフ・タイム・キラーを得る
ためには、金を十分基板中に注入することが必要
である。そのためには熱処理時の温度を上げて、
金と基板のシリコンとの固溶度を上げることが必
要である。ところが上記固溶度を上げるために温
度を上げると、リン(P)等のN型不純物により
形成されているエミツタ領域の拡散も進んでしま
い、トランジスタの耐圧が十分得られなくなると
いう問題がでてくる。すなわち、スイツチングス
ピードと共にトランジスタの重要な特性の一つで
ある耐圧特性は、エミツタ領域4の深さXjに依
存するところがあり、所定の耐圧を得るためには
エミツタ領域4の拡散の深さを制御する必要があ
る。
In the conventional gold diffusion process, after each region as described above is formed (diffused), a gold layer is deposited on the back surface of the substrate, and then heat treatment (1000-1100°C) is performed in an oxygen gas atmosphere. Gold was diffused into the substrate. To obtain sufficient life time killer, it is necessary to implant enough gold into the substrate. To do this, increase the temperature during heat treatment,
It is necessary to increase the solid solubility between gold and silicon of the substrate. However, when the temperature is raised to increase the solid solubility, diffusion of the emitter region formed by N-type impurities such as phosphorus (P) also progresses, causing the problem that a sufficient breakdown voltage of the transistor cannot be obtained. come. In other words, the breakdown voltage characteristic, which is one of the important characteristics of a transistor along with the switching speed, depends in part on the depth Xj of the emitter region 4, and in order to obtain a predetermined breakdown voltage, the depth of the diffusion of the emitter region 4 must be adjusted. need to be controlled.

従つて従来は、エミツタ領域の拡散の問題から
熱処理時の温度をあまり上げることができず、そ
の結果十分な金拡散を行なうことができなかつ
た。
Therefore, in the past, the temperature during heat treatment could not be raised much due to the problem of diffusion in the emitter region, and as a result, sufficient gold diffusion could not be achieved.

そこで本発明の目的は、金拡散を制御する温度
とは別のパラメータによりエミツタ領域の拡散を
制御することができるようにして、十分な金拡散
を施こすため温度を上げてもエミツタ領域の拡散
を抑制することができるような製造方法を提供す
ることにある。
Therefore, an object of the present invention is to be able to control the diffusion of the emitter region using a parameter different from the temperature that controls gold diffusion, and to ensure sufficient gold diffusion that the emitter region does not diffuse even if the temperature is raised. The objective is to provide a manufacturing method that can suppress the

本発明の特徴は、一導電型の基板表面に反対導
電型のベース領域と、該ベース領域内に一導電型
のエミツタ領域が設けられる工程と、該基板の裏
面に重金属の層が成長される工程と、酸素ガスと
不活性ガスの混合ガス雰囲気中で該混合ガスの混
合比を制御しながら該基板に熱処理を施して、前
記重金属を該基板中へ拡散させるとともに前記エ
ミツタ領域を前記混合ガスの混合比によつて定ま
る深さまで拡散させる工程とを有することにあ
る。
The present invention is characterized by a step in which a base region of an opposite conductivity type is provided on the surface of a substrate of one conductivity type, an emitter region of one conductivity type is provided in the base region, and a layer of heavy metal is grown on the back surface of the substrate. and heat-treating the substrate in a mixed gas atmosphere of oxygen gas and inert gas while controlling the mixing ratio of the mixed gas to diffuse the heavy metal into the substrate and to heat the emitter region with the mixed gas. and a step of diffusing the mixture to a depth determined by the mixing ratio.

以下本発明の一実施例を図面に従つて詳細に説
明する。
An embodiment of the present invention will be described in detail below with reference to the drawings.

本実施例では、基板裏面に金の層を蒸着した
後、基板の熱処理を、酸素ガスと窒素ガスとの混
合ガス雰囲気中で行なつている。第2図は、熱処
理時における混合ガス中の酸素ガスの体積濃度と
エミツタ領域の拡散の深さとの関係を示すグラフ
図である。各種の条件は、拡散基板が、P型のシ
リコン基板で、表面の結晶面が<111>面で、シ
ート抵抗がが1Ωcmであり、拡散源がリン(P)
で濃度25Ω/□、温度が1050℃、処理時間が60分
である。酸素濃度は図中に示したようにした。
In this example, after a gold layer is deposited on the back surface of the substrate, the substrate is heat-treated in a mixed gas atmosphere of oxygen gas and nitrogen gas. FIG. 2 is a graph showing the relationship between the volume concentration of oxygen gas in the mixed gas and the depth of diffusion in the emitter region during heat treatment. The various conditions are that the diffusion substrate is a P-type silicon substrate, the surface crystal plane is a <111> plane, the sheet resistance is 1Ωcm, and the diffusion source is phosphorus (P).
The concentration was 25Ω/□, the temperature was 1050℃, and the processing time was 60 minutes. The oxygen concentration was as shown in the figure.

原理は不明であるが、このグラフ図から明らか
なように、エミツタ領域の拡散の深さXjは、混
合ガス中の酸素ガスの量を少なくすることにより
浅くなつている。つまり従来酸素ガス雰囲気中で
行なつていたのを、雰囲気中に窒素ガス等の不活
性ガスを混合することにより、エミツタ領域の拡
散深さを抑制することができるわけである。
Although the principle is unknown, as is clear from this graph, the diffusion depth Xj of the emitter region becomes shallower by reducing the amount of oxygen gas in the mixed gas. In other words, the depth of diffusion in the emitter region can be suppressed by mixing an inert gas such as nitrogen gas into the atmosphere, which was conventionally done in an oxygen gas atmosphere.

そこで、金拡散の工程において、処理温度を高
くすると共に、雰囲気中の不活性ガスの量を制御
してやれば、十分な金拡散を行なうことができ、
かつエミツタ領域の拡散深さXjを抑制して所望
の深さに制御することができる。特に第2図に示
すように、酸素濃度を10%以下にすることによ
り、エミツタ領域の拡散深さを十分抑制すること
ができる。
Therefore, in the gold diffusion process, if the processing temperature is increased and the amount of inert gas in the atmosphere is controlled, sufficient gold diffusion can be achieved.
Moreover, the diffusion depth Xj of the emitter region can be suppressed and controlled to a desired depth. In particular, as shown in FIG. 2, by reducing the oxygen concentration to 10% or less, the diffusion depth of the emitter region can be sufficiently suppressed.

以上説明した様に、本発明によれば、金拡散工
程において、十分なライフ・タイム・キラーをも
ちスイツチングスピードが速くなるよう高温処理
で十分な金を基板中に注入することができ、かつ
エミツタ領域の拡散深さを抑制しつつ所望値に制
御して最適な耐圧特性を得ることができる。
As explained above, according to the present invention, in the gold diffusion process, sufficient gold can be injected into the substrate by high temperature treatment so as to have a sufficient life time killer and increase the switching speed. Optimal breakdown voltage characteristics can be obtained by controlling the diffusion depth of the emitter region to a desired value while suppressing it.

なお、不活性ガスとしては窒素の他にAr等で
も同様の効果を得ることができる。
Incidentally, as the inert gas, the same effect can be obtained by using Ar or the like in addition to nitrogen.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は一般的なバイポーラトランジスタの断
面図、第2図は本発明を説明するためのグラフ図
である。 図中、1:半導体基板、2:コレクタ領域、
3:ベース領域、4:エミツタ領域、、8:重金
属層。
FIG. 1 is a cross-sectional view of a general bipolar transistor, and FIG. 2 is a graph diagram for explaining the present invention. In the figure, 1: semiconductor substrate, 2: collector region,
3: base region, 4: emitter region, 8: heavy metal layer.

Claims (1)

【特許請求の範囲】[Claims] 1 一導電型の基板表面に反対導電型のベース領
域と、該ベース領域内に一導電型のエミツタ領域
が設けられる工程と、該基板の裏面に重金属の層
が成長される工程と、酸素ガスと不活性ガスの混
合ガス雰囲気中で該混合ガスの混合比を制御しな
がら該基板に熱処理を施して、前記重金属を該基
板中へ拡散させるとともに前記エミツタ領域を前
記混合ガスの混合比によつて定まる深さまで拡散
させる工程とを有することを特徴とする半導体装
置の製造方法。
1. A step of providing a base region of an opposite conductivity type on the surface of a substrate of one conductivity type, an emitter region of one conductivity type within the base region, a step of growing a layer of heavy metal on the back surface of the substrate, and a step of growing an oxygen gas layer. The substrate is heat-treated in a mixed gas atmosphere of and an inert gas while controlling the mixing ratio of the mixed gas to diffuse the heavy metal into the substrate and to form the emitter region according to the mixing ratio of the mixed gas. 1. A method of manufacturing a semiconductor device, comprising the step of diffusing to a predetermined depth.
JP56017713A 1981-02-09 1981-02-09 Manufacture of semiconductor device Granted JPS57132358A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56017713A JPS57132358A (en) 1981-02-09 1981-02-09 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56017713A JPS57132358A (en) 1981-02-09 1981-02-09 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS57132358A JPS57132358A (en) 1982-08-16
JPH0241168B2 true JPH0241168B2 (en) 1990-09-14

Family

ID=11951388

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56017713A Granted JPS57132358A (en) 1981-02-09 1981-02-09 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57132358A (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5110070A (en) * 1974-07-13 1976-01-27 Shizuoka Seiki Co Ltd JUNKANGATAKOKUMOTSUKANSOKI
JPS55102266A (en) * 1979-01-31 1980-08-05 Fujitsu Ltd Fabricating method of semiconductor device
JPS55125625A (en) * 1979-03-23 1980-09-27 Nec Corp Diffusion of impurity

Also Published As

Publication number Publication date
JPS57132358A (en) 1982-08-16

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