JPH0243245B2 - - Google Patents
Info
- Publication number
- JPH0243245B2 JPH0243245B2 JP3575285A JP3575285A JPH0243245B2 JP H0243245 B2 JPH0243245 B2 JP H0243245B2 JP 3575285 A JP3575285 A JP 3575285A JP 3575285 A JP3575285 A JP 3575285A JP H0243245 B2 JPH0243245 B2 JP H0243245B2
- Authority
- JP
- Japan
- Prior art keywords
- line
- channel
- pad
- straight
- width
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000005291 magnetic effect Effects 0.000 claims description 39
- 239000010409 thin film Substances 0.000 claims description 30
- 239000000758 substrate Substances 0.000 claims description 12
- 239000011295 pitch Substances 0.000 description 21
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical group [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 16
- 230000004907 flux Effects 0.000 description 12
- 238000012045 magnetic resonance elastography Methods 0.000 description 12
- 101100459664 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) NAM8 gene Proteins 0.000 description 5
- 239000010408 film Substances 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 229910004298 SiO 2 Inorganic materials 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000000059 patterning Methods 0.000 description 3
- 229910000859 α-Fe Inorganic materials 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000005294 ferromagnetic effect Effects 0.000 description 2
- 229910003271 Ni-Fe Inorganic materials 0.000 description 1
- 229910018605 Ni—Zn Inorganic materials 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000003302 ferromagnetic material Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Landscapes
- Magnetic Heads (AREA)
Description
【発明の詳細な説明】
産業上の利用分野
本発明は磁気記録再生装置の高密度記録に対応
した多チヤンネル薄膜磁気ヘツドの配線装置に関
するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a wiring device for a multi-channel thin film magnetic head that is compatible with high-density recording in a magnetic recording/reproducing device.
従来の技術
最近の磁気記録再生装置では、記録線密度及び
トラツク密度の著しい向上に伴ない記録及び再生
ヘツドに薄膜タイプが広く使用されつつある。コ
ンピユータ用の磁気テープ装置やオーデイオ用の
コンパクトカセツトテープレコーダにおいて、高
密度化や高品質化を目的として多チヤンネルデイ
ジタル記録が急速に進んでいる。この結果磁気ヘ
ツドには狭トラツク、多チヤンネル化が強く要求
され、これを実現する薄膜磁気ヘツド技術の向上
は近年著しいものがある。2. Description of the Related Art In recent magnetic recording and reproducing devices, thin film type recording and reproducing heads are being widely used as recording linear densities and track densities have significantly improved. Multichannel digital recording is rapidly progressing in magnetic tape devices for computers and compact cassette tape recorders for audio, with the aim of increasing density and quality. As a result, magnetic heads are strongly required to have narrower tracks and multiple channels, and thin film magnetic head technology to realize this has been improved significantly in recent years.
薄膜磁気ヘツドの多チヤンネル化に伴なうチヤ
ンネル間距離の短縮化により、ヘツドチツプ上の
配線、特に外部回路との電気的接続を容易にする
目的からリード引出し線の構造が重要となつてく
る。従来の引出し線パターンでは、チヤンネル間
の電気抵抗値に大きな偏差を生じ、外部回路によ
り、チヤンネル毎の補正が必要となつている。今
までリード引出し線構造に関して最適設計された
薄膜磁気ヘツドの事例はない。 As the distance between channels becomes shorter as thin film magnetic heads become multi-channeled, the structure of lead wires becomes important for the wiring on the head chip, especially for the purpose of facilitating electrical connections with external circuits. In conventional lead line patterns, large deviations occur in electrical resistance values between channels, requiring correction for each channel using an external circuit. Until now, there has been no example of a thin film magnetic head that has been optimally designed with respect to the lead wire structure.
以下図面を参照しながら従来の多チヤンネル薄
膜磁気ヘツドの配線装置について説明を行なう。
第5図は再生用に使用されるmチヤンネルの磁気
抵抗効果型磁気ヘツド(以後MRヘツドと呼ぶ)
で説明する。第5図のMRヘツドは基板上での磁
気抵抗効果素子(以下MREと呼称する)と引出
し線構造の配列を一例として示したものであり、
最終ヘツド構造とするためのその他の構成部材、
最終形状は省略してある。 A conventional multi-channel thin film magnetic head wiring device will be described below with reference to the drawings.
Figure 5 shows an m-channel magnetoresistive magnetic head (hereinafter referred to as an MR head) used for reproduction.
I will explain. The MR head in Figure 5 shows an example of the arrangement of magnetoresistive elements (hereinafter referred to as MREs) and lead wire structures on a substrate.
Other components for the final head structure,
The final shape is omitted.
第5図において、1は基板であり、Mn−Zn単
結晶フエライト等の強磁性体が使われる。基板1
上にはSiO2などの第1の絶縁層(図示せず)が
形成され、この上に共通接地線6が形成された
後、SiO2などの第2の絶縁層(図示せず)が付
着される。この第2の絶縁層上に必要な形状寸法
にパターニングされたmチヤンネル分のMRE2
(21,…,2o,…,2n)が配列されている。
MRE2は一軸磁気異方性を有するNi−Fe膜など
の強磁性薄膜から成つている。mチヤンネル分で
全トラツク幅Wとなる。MRE2の各チヤンネル
でのMREには電極端子3(31,…,3o-1,3o,
…,3n)と4(41,…4o-1,4o,…,4n)
とがそれぞれ形成される。一点鎖線内は磁束セン
サ部としての上記したMRE2と電極端子3,4
で構成され、総称して磁束センサ部10とする。 In FIG. 5, reference numeral 1 denotes a substrate, which is made of a ferromagnetic material such as Mn--Zn single crystal ferrite. Board 1
A first insulating layer (not shown) such as SiO 2 is formed on top, and after a common ground conductor 6 is formed on this, a second insulating layer (not shown) such as SiO 2 is deposited. be done. On this second insulating layer, MRE2 for m channels is patterned into the required shape and dimensions.
(2 1 ,..., 2 o ,..., 2 n ) are arranged.
MRE2 consists of a ferromagnetic thin film such as a Ni-Fe film that has uniaxial magnetic anisotropy. The total track width W is made up of m channels. MRE in each channel of MRE2 has electrode terminals 3 (3 1 ,..., 3 o-1 , 3 o ,
…, 3 n ) and 4 (4 1 , …4 o-1 , 4 o , …, 4 n )
are formed respectively. Inside the dashed line is the above-mentioned MRE 2 and electrode terminals 3 and 4 as the magnetic flux sensor part.
These components are collectively referred to as the magnetic flux sensor section 10.
電極端子3の各端子は第2の絶縁層に形成され
たそれぞれのスルーホール5を通じ共通接地線6
に接続されている。二点鎖線で囲まれた領域はワ
イヤボンデイング用のパツドエリア11で磁束セ
ンサ部10の電極端子3のそれぞれの端子と一対
を成してパツド7(71,…,7o-1,7o,…,
7n)が形成される。このパツド7は基板1上で
トラツク幅方向のほぼ全幅に亘つて一定のピツチ
間隔で整列している。パツドエリア11内の両端
部に共通接地線6のパツド61,62も構成され
る。磁束センサ部10とパツドエリア11を連結
する引出し線8はそれぞれのチヤンネルでの電極
端子3(31,…3o-1,3o,…,3n)とパツド
7(71,…,7o-1,7o,…,7n)を結ぶもの
で、各引き出し線81,…8o-1,8o,…,8nで
構成される。 Each terminal of the electrode terminal 3 is connected to a common ground line 6 through a respective through hole 5 formed in the second insulating layer.
It is connected to the. The area surrounded by the two-dot chain line is a pad area 11 for wire bonding, which forms a pair with each of the electrode terminals 3 of the magnetic flux sensor section 10, and connects the pads 7 (7 1 ,..., 7 o-1 , 7 o , ...,
7n ) is formed. The pads 7 are arranged at constant pitch intervals over almost the entire width of the track in the track width direction on the substrate 1. Pads 6 1 and 6 2 of the common ground line 6 are also configured at both ends within the pad area 11 . The lead wire 8 connecting the magnetic flux sensor section 10 and the pad area 11 connects the electrode terminal 3 (3 1 ,...3 o-1 , 3 o ,..., 3 n ) and the pad 7 (7 1 ,..., 7 ) in each channel. o-1 , 7o ,..., 7n ), and is composed of each leader line 81 ,... 8o-1 , 8o ,..., 8n .
各チヤンネルの引出し線8(81,…,8o-1,
8o,…,8n)は第5図に示す様に電極端子3を
パツド7との間でMRE2に垂直に伸びる直線と、
この直線と角度θ=45゜を有する斜線で構成され
ている。尚、この角度θは135゜の場合もある。パ
ツドの線幅Dをそれぞれ一定とすると、第5図の
場合の引出し線の斜線部線幅はD/√2(直線部
線幅はd)となる。 Lead line 8 of each channel (8 1 ,..., 8 o-1 ,
8 o ,..., 8 n ) is a straight line extending perpendicular to the MRE 2 between the electrode terminal 3 and the pad 7 as shown in FIG.
It is composed of a diagonal line having an angle θ=45° with this straight line. Note that this angle θ may be 135°. Assuming that the line width D of each pad is constant, the line width of the diagonal line portion of the leader line in the case of FIG. 5 is D/√2 (the line width of the straight line portion is d).
以上のように構成された高密度記録再生用の多
チヤンネル薄膜磁気ヘツドではヘツド駆動回路の
簡易化、コスト低減の目的からヘツドチツプ上で
全チヤンネル抵抗の均一化と低電圧駆動の実現が
強く要求される。さらに記録・再生時の発熱を抑
制する目的から低抵抗化も要求される。 In the multi-channel thin-film magnetic head for high-density recording and reproducing configured as described above, it is strongly required to make the resistance of all channels uniform on the head chip and realize low-voltage driving in order to simplify the head drive circuit and reduce costs. Ru. Furthermore, low resistance is also required for the purpose of suppressing heat generation during recording and reproduction.
発明が解決しようとする問題点
しかしながら、上記従来のリード引出し線の構
造では各チヤンネルの抵抗値の偏差が本質的に大
きい。パツド7のピツチ間隔、パツド幅D、リー
ド引出し線の直線部線幅d、さらにはMRE2の
各チヤンネル間のトラツクピツチなどのすべてが
適切でないと、各チヤンネルの抵抗値偏差が発生
する。従来ではこれらの一連の最適設計が行なわ
れていないため、例えばMRE2のトラツクピツ
チ80μm、d=17μm、D=100μmパツド間距離
20μm、チヤンネル数m=20、磁束センサ10と
パツドエリア11との間隔を約2.7mmとする一般
的なデイメンジヨンにおいて引出し線8の最大
(第5図の場合引き出し線81)と最小(引き出し
線820)の抵抗値比は約2倍となる。チヤンネル
抵抗の不揃いは外部駆動回路で均一化のためのチ
ヤンネル補正を余儀なくされ、チヤンネル数が多
い程、補正工程は繁雑となり、再生出力、記録レ
ベル変動要因にもなつている。Problems to be Solved by the Invention However, in the structure of the conventional lead wire described above, the deviation in the resistance value of each channel is essentially large. If the pitch spacing of the pads 7, the pad width D, the line width d of the straight portion of the lead extraction line, and even the track pitch between each channel of the MRE 2 are all inappropriate, a resistance value deviation of each channel will occur. Conventionally, these series of optimal designs have not been performed, so for example, the track pitch of MRE2 is 80 μm, d = 17 μm, D = 100 μm distance between pads.
20 μm, the number of channels m = 20, and the distance between the magnetic flux sensor 10 and the pad area 11 is approximately 2.7 mm. 20 ), the resistance value ratio is approximately twice as high. Unevenness in channel resistance requires channel correction for uniformity using an external drive circuit, and as the number of channels increases, the correction process becomes more complicated and becomes a factor in fluctuations in reproduction output and recording level.
本発明は上記問題点に鑑み、全チヤンネル抵抗
を均一化にし、かつ低抵抗化と並行して最稠密パ
ターン設計が容易で形状の微小化を図ることので
きる多チヤンネル薄膜磁気ヘツドの配線装置を提
供するものである。 In view of the above-mentioned problems, the present invention provides a wiring device for a multi-channel thin-film magnetic head that can make the resistance of all channels uniform, and at the same time as lowering the resistance, it is easy to design the densest pattern and miniaturize the shape. This is what we provide.
問題点を解決するための手段
上記問題点を解決するために本発明は再生ヘツ
ドでのMRセンサ部又は記録ヘツドの薄膜コイル
部とワイヤボンデイング用のパツドエリアとを結
ぶものであり、その構造は直線部とこの直線に対
して傾斜角45゜又は135゜の斜線部との組合わせ或
いは直線部と45゜及び135゜の両方の斜線部との組
合わせを基本とし、(1)上記斜線部の線幅を直線部
の線幅の√2倍とし、かつ(2)各チヤンネルでのパ
ツドピツチ及び引出し線の直線部の隣接するピツ
チ間隔をそれぞれT,P′とするとT=2P′の関係
とすることである。Means for Solving the Problems In order to solve the above problems, the present invention connects the MR sensor part of the reproducing head or the thin film coil part of the recording head to the pad area for wire bonding, and the structure thereof is a straight line. The basic combination is a combination of a part and a shaded part with an angle of 45° or 135° with respect to the straight line, or a combination of a straight part and a shaded part of both 45° and 135°. If the line width is √2 times the line width of the straight part, and (2) the pad pitch in each channel and the interval between adjacent pitches in the straight part of the leader line are T and P', respectively, then the relationship T = 2P' is established. That's true.
作 用
本発明は上記構成手段のうち、引出し線パター
ン形状の斜線線幅を直線線幅の√2倍とすること
によつて全チヤンネルに亘るチヤンネル抵抗が全
く等しくなり、かつT=2P′の関係で最稠密実装
が実現できる。また直線部のピツチ間隔P′を考慮
して実現可能な限り、直線部の線幅を増大するこ
とによつて各チヤンネル抵抗値を容易に低減でき
る。本発明の構成によると、引出し線の製造工程
において各チヤンネルに亘る膜厚分布誤差、線幅
誤差を無視すれば、各チヤンネル間の抵抗値偏差
が除去され、抵抗補正回路は不必要となり、そこ
で消費されるエネルギーをゼロとすることができ
る。また最稠密パターン化によりヘツドチツプ形
状は小さくなり、システム装置の小型化に大きく
寄与すると共に、引出し線長の短縮化に伴ない、
外乱ノイズや浮遊容量による信号品質の劣化を防
ぎ広帯域に亘つての良好な記録・再生が可能とな
る。低抵抗化はMR再生ヘツドや薄膜コイルを有
する記録ヘツドの低電圧駆動を容易なものとし、
さらにMRヘツドでは熱雑音を低減せしめるもの
である。Effects The present invention provides, among the above-mentioned configuration means, by making the diagonal line width of the leader line pattern shape √2 times the straight line width, so that the channel resistance over all channels becomes completely equal, and T = 2P'. The densest implementation can be achieved by the relationship. Further, by increasing the line width of the straight portions as much as possible by considering the pitch interval P' of the straight portions, the resistance value of each channel can be easily reduced. According to the configuration of the present invention, if film thickness distribution errors and line width errors across each channel are ignored in the lead wire manufacturing process, resistance value deviation between each channel is eliminated, and a resistance correction circuit is unnecessary. Energy consumption can be reduced to zero. In addition, the densest patterning reduces the head chip shape, which greatly contributes to the miniaturization of system equipment, as well as shortening the lead wire length.
This prevents deterioration of signal quality due to disturbance noise and stray capacitance, and enables good recording and reproduction over a wide band. Lower resistance makes it easier to drive MR playback heads and recording heads with thin film coils at low voltages.
Furthermore, it reduces thermal noise in the MR head.
実施例
以下本発明の一実施例について図面を参照しな
がら説明する。第4図は本発明の概念を示す平面
図で、往復記録再生可能な磁気テープ装置を示
す。同図は磁気テープ80のテープ全幅Hに対
し、記録及び再生用の全トラツク幅Wなる片面記
録・再生での記録ヘツド又は再生ヘツドチツプ上
でのレイアウトの概念とフレキシブルワイヤやプ
リント基板等の外部回路との接続部材60との相
対関係を示している。第4図において、20はヘ
ツドチツプ基板(以下基板という)、30は記録
ヘツドの場合は薄膜コイル部で、再生ヘツドの場
合は磁束センサ部となる。40はワイヤボンデイ
ングのためのパツドエリア、27は本発明の主要
部であり、薄膜コイル部30(又は磁束センサ
部)とパツドエリア40とを連結する引出し線で
あり、その本数はチヤンネル数又はその2倍に等
しい。パツドエリア40は基板20上のほぼ全幅
に広がつていて、接続部材60上の導体70と1
チヤンネルごとのボンデイングを容易にしてい
る。Embodiment An embodiment of the present invention will be described below with reference to the drawings. FIG. 4 is a plan view showing the concept of the present invention, showing a magnetic tape device capable of reciprocating recording and reproducing. The figure shows the layout concept on the recording head or reproduction head chip in single-sided recording and reproduction, where the total tape width H is the total track width W for recording and reproduction, and the external circuits such as flexible wires and printed circuit boards. The relative relationship between the connecting member 60 and the connecting member 60 is shown. In FIG. 4, 20 is a head chip substrate (hereinafter referred to as a substrate), 30 is a thin film coil section in the case of a recording head, and a magnetic flux sensor section in the case of a reproducing head. 40 is a pad area for wire bonding, 27 is a main part of the present invention, and is a lead wire connecting the thin film coil section 30 (or magnetic flux sensor section) and the pad area 40, the number of which is equal to or twice the number of channels. be equivalent to. The pad area 40 extends over almost the entire width of the board 20 and is connected to the conductor 70 on the connecting member 60.
This facilitates bonding for each channel.
第1図は本発明の一実施例における再生用の多
チヤンネル薄膜磁気ヘツドの配線装置のチツプ上
での引出し線構造を主体として示している。最終
ヘツド構造とするための構成部材は省略してあ
り、最終形状を示すものではない。 FIG. 1 mainly shows the lead line structure on a chip of a wiring device for a multi-channel thin film magnetic head for reproduction according to an embodiment of the present invention. Components for the final head structure are omitted and the final shape is not shown.
第1図において、20はMn−Zn単結晶フエラ
イト、Ni−Znフエライト等の高透磁性の基板で
あり、この基板20にはSiO2などの第1の絶縁
層(図示せず)が形成され、全チヤンネルの共通
接地線25がパターニングされた後、スルーホー
ル24を形成するようにSiO2などの第2の絶縁
層(図示せず)が付着される。第2の絶縁層上に
チヤンネル数に等しいm個のMRE21(211,
212,…,21n)が必要な形状、ピツチで配列
されている。MRE21は周知の如く一軸磁気異
方性を有するNi−Fe膜などの強磁性薄膜から成
つている。mチヤンネル分で第4図に示した全ト
ラツク幅Wとなる。MRE21の各チヤンネルで
のMREにはMREに垂直に伸びる電極端子22
(221,222,…,22n)と23(231,2
32,…,23n)とがそれぞれ形成されている。
電極端子23は第2の絶縁層に形成されたスルー
ホール24を通じて共通接地線25に接続され
る。一点鎖点内領域は主に上述したMRE21と
電極端子22,23で構成され、総称して第4図
で説明した如く磁束センサ部30とする。二点鎖
線で囲まれた領域はヘツドチツプと外部回路とを
ワイヤボンデイング等で接続するためのパツドエ
リア40である。パツドエリア内には磁束センサ
部30の電極端子22のそれぞれの端子と一対を
成す様に、チヤンネル数に等しいパツド26(2
61,…,26n)が配列されている。パツド26
は必要に応じて厚膜形成され、バンプやビームリ
ード構造とすることもできる。上記磁束センサ部
30とパツドエリア40とを連結する配線群とし
て、チヤンネル数に等しい数の引出し線27(2
71,…,27n)が形成されている。なおバンプ
エリア40内には共通接地線25のパツドも形成
されている。電極端子22及び23、引出し線2
7、パツド26などの製造プロセスではAl、
Au、Cuなどの導体薄膜を付着後、同一プロセス
にてパターニング形成される。 In FIG. 1, 20 is a highly permeable substrate made of Mn-Zn single crystal ferrite, Ni-Zn ferrite, etc., and a first insulating layer (not shown) made of SiO 2 or the like is formed on this substrate 20. After the common ground line 25 for all channels is patterned, a second insulating layer (not shown), such as SiO 2 , is deposited to form the through-holes 24 . On the second insulating layer, m MREs 21 (21 1 ,
21 2 ,..., 21 n ) are arranged in the required shape and pitch. As is well known, the MRE 21 is made of a ferromagnetic thin film such as a Ni--Fe film having uniaxial magnetic anisotropy. The total track width W shown in FIG. 4 is obtained by m channels. The MRE in each channel of the MRE 21 has an electrode terminal 22 extending perpendicularly to the MRE.
(22 1 , 22 2 , ..., 22 n ) and 23 (23 1 , 2
3 2 ,..., 23 n ) are formed, respectively.
The electrode terminal 23 is connected to a common ground line 25 through a through hole 24 formed in the second insulating layer. The dot-dash dot area is mainly composed of the above-mentioned MRE 21 and the electrode terminals 22, 23, and is collectively referred to as the magnetic flux sensor section 30 as explained in FIG. The area surrounded by the two-dot chain line is a pad area 40 for connecting the head chip and an external circuit by wire bonding or the like. Within the pad area, pads 26 (2
6 1 ,..., 26 n ) are arranged. Patsudo 26
If necessary, a thick film can be formed, and a bump or beam lead structure can also be formed. As a wiring group connecting the magnetic flux sensor section 30 and the pad area 40, a number of lead wires 27 (2
7 1 ,..., 27 n ) are formed. Note that a pad for the common ground line 25 is also formed within the bump area 40. Electrode terminals 22 and 23, lead wire 2
7. In the manufacturing process of Pad 26 etc., Al,
After depositing a conductor thin film such as Au or Cu, it is patterned using the same process.
以上の様に構成された多チヤンネル薄膜磁気ヘ
ツドの配線装置について説明する。本発明は第4
図に示した如く全チヤンネルのトラツク幅をWと
し磁束センサ部30からのリード引出し線をワイ
ヤボンデイング等の外部回路への接続可能な寸法
まで基板20のほぼ全幅に広げるに際し、引出し
線27の最適パターン化を図り、全チヤンネルの
チヤンネル抵抗を均一にし、かつ最稠密構造とし
てヘツドチツプの小型化を目的とするものであ
る。 A wiring device for a multi-channel thin film magnetic head constructed as described above will be explained. The present invention is the fourth
As shown in the figure, when the track width of all channels is set to W and the lead wire from the magnetic flux sensor section 30 is expanded to almost the entire width of the board 20 to a size that allows connection to an external circuit such as wire bonding, the lead wire 27 is optimized. The purpose is to make the channel resistance of all channels uniform by patterning, and to miniaturize the head chip by forming the most dense structure.
第1図においてMRE21は一定のピツチPで
m個配列されている。磁束センサ部30内の電極
端子22,23及びパツドエリア40内のパツド
26の形状、膜厚等は全チヤンネルで同一のもの
となつている。各チヤンネルの引出し線27は線
幅dなる直線部と、線幅Sなる斜線部から構成さ
れ、斜線部、傾斜角はθ=45゜又は135゜(第1図の
場合は45゜のみ)である。直線部の隣接チヤンネ
ルとのピツチはP′であり、第1図の構成例では
MRE21と同一ピツチ(P′=P)となる。線間
距離はrである。つまりP′=d+rとなる。引出
し線27の直線部の一端は電極端子22と、斜線
部の一端はパツド26とそれぞれ接続している。
パツド26の線幅はD、パツド間距離はGであ
る。従つて各チヤンネルのパツドはT=D+Gな
るピツチでトラツク幅方向に整列している。各チ
ヤンネルの引出し線27の斜線部とパツド26と
の接続状態は、例えば第3チヤンネルで説明する
と側線ABはパツド263の一方の側線ECの延長
線とBで交わる。BC間の距離をΔXとする。他
方の斜線部側線FJはパツド側線KJとパツドエリ
ア40の境界線上のJで交差する。 In FIG. 1, m MREs 21 are arranged at a constant pitch P. The shape, film thickness, etc. of the electrode terminals 22 and 23 in the magnetic flux sensor section 30 and the pad 26 in the pad area 40 are the same in all channels. The lead line 27 of each channel consists of a straight part with a line width d and a diagonal part with a line width S, and the inclination angle of the diagonal part is θ=45° or 135° (only 45° in the case of Fig. 1). be. The pitch between the straight section and the adjacent channel is P', and in the configuration example shown in Figure 1,
It has the same pitch as MRE21 (P'=P). The distance between the lines is r. In other words, P'=d+r. One end of the straight portion of the lead wire 27 is connected to the electrode terminal 22, and one end of the diagonal line portion is connected to the pad 26, respectively.
The line width of the pads 26 is D, and the distance between the pads is G. Therefore, the pads of each channel are aligned in the track width direction at a pitch of T=D+G. The state of connection between the hatched part of the lead line 27 of each channel and the pad 26 will be explained, for example, in the third channel.The side line AB intersects with the extension line of one side line EC of the pad 263 at B. Let the distance between BC be ΔX. The other diagonally shaded side line FJ intersects the pad side line KJ at J on the boundary line of the pad area 40.
ここで以上の様な引出し線パターンにおいて次
の条件を設定する。 Here, the following conditions are set for the leader line pattern as described above.
(1) 引出し線27の各チヤンネルにおける直線部
線幅dと斜線部線幅Sとの間にS=√2dとす
る。(1) Set S=√2d between the line width d of the straight line part and the line width S of the diagonal line part in each channel of the leader line 27.
(2) 斜線部側線ABとパツド側線ECとの交点Bと
パツドエリア40との間隔ΔXをΔX=D−2d
とする。(2) The distance ΔX between the intersection B of the diagonally shaded side line AB and the pad side line EC and the pad area 40 is ΔX = D-2d
shall be.
(3) 引出し線27の直線部ピツチP′とパツド26
のピツチTとの間にT=2P′を満足させる(従
つてT=2Pも満足する)。(3) Straight line pitch P' of leader line 27 and pad 26
T=2P' is satisfied between the pitch T of (therefore, T=2P is also satisfied).
以上の条件設定のうち(1)、(2)の条件から全チヤ
ンネルのチヤンネル抵抗を等しくすることがで
き、(3)の条件から引出し線の直線部と斜線部との
変曲点、例えば第3チヤンネルではAとF点のす
べてがα=135゜の直線上に並ぶ。すなわちスペー
ス利用効率(特にトラツク幅方向)の高い最稠密
パターンが実現できることを意味している。また
隣接チヤンネル間の直線部の長さの変化量はT−
P′となる。 Among the above condition settings, the channel resistance of all channels can be made equal from conditions (1) and (2), and from the condition (3), the inflection point between the straight part and the diagonal part of the leader line, for example, the In 3 channels, all points A and F are aligned on a straight line with α=135°. This means that the densest pattern with high space utilization efficiency (particularly in the track width direction) can be realized. Also, the amount of change in the length of the straight section between adjacent channels is T-
becomes P′.
例えば、P′=80μm、d=40μm、ΔX=40μm
とすれば、一義的にD=120μm、G=40μm、r
=40μm、S=56.6μmが決定される。また実装プ
ロセスにおいて斜線部の線間距離やパツド間隔を
広げる場合はΔXをコントロールして簡単にパタ
ーン設計ができる。例えばP′=80μm、d=40μ
m、ΔX=0とすればD=80μm、G=80μm、r
=40μm、S=56.6μmとなる。 For example, P'=80μm, d=40μm, ΔX=40μm
Then, D = 120 μm, G = 40 μm, r
= 40 μm and S = 56.6 μm are determined. In addition, when increasing the distance between lines in the diagonal areas or the spacing between pads during the mounting process, pattern design can be easily done by controlling ΔX. For example, P'=80μm, d=40μ
m, ΔX=0, then D=80μm, G=80μm, r
= 40 μm, S = 56.6 μm.
引出し線の各チヤンネル抵抗値を低減するため
には、上記(1)〜(3)の3つの条件を満たしながら実
装プロセスの可能な限り直線部線幅dを大きくす
るか、その長さを短かくする。第1図に示す様に
第mチヤンネルの直線部をゼロとすることが可能
でありヘツドチツプ寸法を小型にできる。 In order to reduce the resistance value of each channel of the lead wire, it is necessary to increase the line width d of the straight line part as much as possible in the mounting process while satisfying the three conditions (1) to (3) above, or shorten its length. Hidden. As shown in FIG. 1, it is possible to make the straight portion of the m-th channel zero, and the size of the head chip can be reduced.
チヤンネル数が多くなりm′(m′>m)となると
斜線部の傾斜角は第1図の如くすべてθ=45゜と
は限らず第1チヤンネルから或るチヤンネルまで
のθは135゜(従つてα=45゜)とし、それ以後第
m′チヤンネルまでθ=45゜とすることは本発明の
最適パターン設計の目的からして、チヤンネル数
に無関係に設計の自由度を拡張することを意味す
る。 As the number of channels increases and m′ (m′>m), the angle of inclination of the shaded area is not necessarily all θ = 45° as shown in Figure 1, but θ from the first channel to a certain channel is 135° (as shown in Fig. 1). α = 45°), and after that
Setting θ=45° up to the m′ channel means expanding the degree of freedom in design, regardless of the number of channels, from the purpose of optimal pattern design of the present invention.
第2図は、第1図における共通接地線25を基
板20上に設置しないでMRE21の両端電極端
子22(221,…,22n)と28(281,…,
28n)が共にそれぞれ引出し線27(271,
…,27n)と29(291,…,29n)に接続
されて電気回路的にパツドエリア40へ導びかれ
た構成を示すもので、第1、第2、第3チヤンネ
ルを示している。つまり各チヤンネルのMRE2
1に2本の引出し線を有するタイプである。パツ
ドエリア40内には引出し線29に対応してパツ
ド31(311,…,31n)が形成されている。
この場合の引出し線パターンの最適設計は第1図
に示した構成と同一の思想に基づいて、直線部と
傾斜角θ=45゜又は135゜の斜線部で形成されてい
る。MRE21の配列ピツチをPとし、パツド2
6、及び31の一つ一つの配列ピツチを第2図に
示す如くTとしパツド幅をD、パツド間距離をG
(従つてT=D+G)とする。引出し線26,2
9の斜線部とパツド26,31との接続は第2図
に示した例では、引出し線29の斜線部側線AB
とバンプ31の側線ECの延長線とがB点で交差
し、BC間距離がΔXとなる。他方のそれぞれの
側線FJとKJはパツドエリア40の境界上のJ点
で交差する。各チヤンネルの引出し線27,29
の直線部の線幅はd、斜線部線幅はSとする。 FIG. 2 shows the electrode terminals 22 (22 1 , . . . , 22 n ) and 28 (28 1 , .
28 n ) are both lead lines 27 (27 1 , 27 1 ,
..., 27 n ) and 29 (29 1 , ..., 29 n ) and are led to the pad area 40 in terms of an electric circuit, indicating the first, second, and third channels. . In other words, MRE2 of each channel
This type has two lead lines in one part. Pads 31 (31 1 , . . . , 31 n ) are formed in the pad area 40 in correspondence with the lead lines 29.
The optimal design of the leader line pattern in this case is based on the same idea as the structure shown in FIG. 1, and is formed by a straight line part and a diagonal line part with an inclination angle θ=45° or 135°. Let the array pitch of MRE21 be P, and the pad 2
As shown in Figure 2, the arrangement pitch of each of pads 6 and 31 is T, the pad width is D, and the distance between pads is G.
(Therefore, T=D+G). Lead line 26,2
In the example shown in FIG. 2, the connection between the diagonal line part 9 and the pads 26 and 31 is made by the side line AB of the diagonal line part of the leader line 29.
and the extension line of the side line EC of the bump 31 intersect at point B, and the distance between BC becomes ΔX. The other side lines FJ and KJ intersect at point J on the boundary of the padded area 40. Lead lines 27 and 29 of each channel
The line width of the straight line part is d, and the line width of the diagonal line part is S.
以上の引出し線パターンにおいて次の条件を設
定する。 The following conditions are set for the above leader line pattern.
(1) 各チヤンネルにおける直線部線幅dと斜線部
線幅Sとの間にS=√2dの関係をつくる。(1) Create the relationship S=√2d between the line width d of the straight line and the line width S of the diagonal line in each channel.
(2) 各チヤンネルの一方の引出し線(第2図では
引き出し線29)でのΔXをΔX=D−2dとす
る。(2) Let ΔX at one leader line (the leader line 29 in FIG. 2) of each channel be ΔX=D−2d.
(3) 引出し線27,29の直線部線間距離をすべ
て等しくrとする。(3) The distances between the straight parts of the lead lines 27 and 29 are all set to the same r.
(4) 直線部のピツチP′=d+rをMRE21の配
列ピツチPの1/2とする。(4) The pitch P'=d+r of the straight line section is set to 1/2 of the arrangement pitch P of the MRE21.
(5) 直線部のピツチP′をパツドの配列ピツチTの
1/2とする(従つてP′=1/2P=1/2T)。(5) Set the pitch P′ of the straight part to the pitch T of the pads.
1/2 (therefore, P'=1/2P=1/2T).
以上の条件設定のうち(1)、(2)の条件で各チヤン
ネルの2本の引出し線27,29の抵抗値の和が
全チヤンネルにおいて等しくなる。(3)、(4)、(5)の
条件から引出し線の直線部と斜線部との変曲点の
すべてがα=135゜、直線上に並ぶ。従つてスペー
ス利用効率の最も高い最稠密パターンが実現でき
る。さらに隣接する直線部の長さの変化量はT−
P′となる。 Among the above condition settings, under conditions (1) and (2), the sum of the resistance values of the two lead wires 27 and 29 of each channel becomes equal in all channels. From the conditions (3), (4), and (5), all the inflection points between the straight and diagonal parts of the leader line are aligned on a straight line at α=135°. Therefore, the densest pattern with the highest space utilization efficiency can be achieved. Furthermore, the amount of change in length of the adjacent straight section is T-
becomes P′.
例えばP′=40μm、d=20μm、ΔX=20μmと
すればD=60μm、G=20μm、r=20μm、S=
28.3μmとなる。 For example, if P′ = 40 μm, d = 20 μm, ΔX = 20 μm, D = 60 μm, G = 20 μm, r = 20 μm, S =
It becomes 28.3μm.
実装プロセスにおいて実現可能なレベルで直線
部線幅d及び長さΔXなどをコントロールして最
適パターン化を図ることができるのは第1図に示
した構成のものと同じである。またチヤンネル数
が多くなつた場合、θ=135゜の引出し線27,2
9の斜線部を導入することにより最適化パターン
が可能であることも第1図に示した構成のものと
同じである。 As with the configuration shown in FIG. 1, it is possible to achieve optimal patterning by controlling the straight line width d, length ΔX, etc. at a level that can be realized in the mounting process. Also, when the number of channels increases, the leader line 27, 2 of θ = 135°
It is also the same as the configuration shown in FIG. 1 that an optimized pattern can be created by introducing the hatched portion 9.
第3図は本発明を磁気誘導型多チヤンネル薄膜
記録ヘツド又は記録再生兼用ヘツドに適用したも
のである。同図において薄膜コイル部30を除い
て第1図の再生ヘツドと同じ構成であり、同一個
所には同一番号を付してある。薄膜コイル部30
はトラツクピツチPで薄膜コイル素子32(32
1,322,…,32n)がmチヤンネル数だけ配
列されている。各チヤンネルの記録ヘツドは下部
磁性層を基板20、上部磁性層を磁気ポール33
とした両磁性層間に電気的に絶縁された形で導電
体薄膜コイル素子32がパターン形成されてい
る。基板20上には第1の絶縁層(図示せず)が
付着され、この上に共通接地線25が形成され
る。この共通接地線25上にはスルーホール34
を有する第2の絶縁層があり、スルーホール34
を通して各チヤンネルの薄膜コイル素子32の一
端と共通接地線25とが接続している。 FIG. 3 shows the present invention applied to a magnetic induction type multi-channel thin film recording head or a recording/reproducing head. In this figure, the configuration is the same as that of the reproducing head in FIG. 1 except for the thin film coil section 30, and the same parts are given the same numbers. Thin film coil section 30
is the track pitch P and the thin film coil element 32 (32
1 , 32 2 , . . . , 32 n ) are arranged for m channels. The recording head of each channel has a lower magnetic layer as a substrate 20 and an upper magnetic layer as a magnetic pole 33.
A conductive thin film coil element 32 is patterned in an electrically insulated manner between both magnetic layers. A first insulating layer (not shown) is deposited on the substrate 20 and a common ground line 25 is formed thereon. A through hole 34 is provided on this common ground line 25.
There is a second insulating layer having a through hole 34.
One end of the thin film coil element 32 of each channel is connected to the common ground line 25 through the channel.
第3図の構成における引出し線27のパターン
は、第1、第2チヤンネルの斜線部の傾斜角をθ
=135゜、それ以後の各チヤンネルの傾斜角をθ=
45゜とした一実施例である。引出し線27のパタ
ーン設計条件は第1図に示した再生ヘツドの場合
と同一である。 The pattern of the lead line 27 in the configuration shown in FIG. 3 has an inclination angle of θ
= 135°, and the inclination angle of each channel after that is θ =
This is an example in which the angle is 45°. The pattern design conditions for the leader line 27 are the same as those for the reproduction head shown in FIG.
以上の様に引出し線の最適設計条件は記録・再
生ヘツドの種類に問わず、またチヤンネル数に無
関係に成立するものである。 As described above, the optimal design conditions for the leader line are established regardless of the type of recording/reproducing head and regardless of the number of channels.
発明の効果 本発明の効果を以下まとめて列挙する。Effect of the invention The effects of the present invention are summarized below.
(1) 多チヤンネル薄膜磁気ヘツドのヘツドチツプ
上における各チヤンネルの電圧抵抗値が全トラ
ツクに亘つて等しくなる。この結果外部回路に
よる各トラツクでの電気抵抗補正手段が不必要
となり、大幅な製造コスト低減を図ることがで
きる。(1) The voltage resistance value of each channel on the head chip of a multi-channel thin film magnetic head becomes equal over all tracks. As a result, electrical resistance correction means for each track using an external circuit becomes unnecessary, and manufacturing costs can be significantly reduced.
(2) 外部抵抗補正回路が除去できることから駆動
電圧の低電圧化が実現できる。(2) Since the external resistance correction circuit can be removed, the drive voltage can be lowered.
(3) 引出し線は直線部と45゜又は135゜傾斜の斜線
部のみから構成されているのでホトマスク設計
が極めて容易である。(3) Since the leader line consists of only a straight line and a diagonal line at an angle of 45° or 135°, photomask design is extremely easy.
(4) 引出し線の直線部と斜線部との交差点がすべ
てのチヤンネルに亘つて傾斜角45゜又は135゜の
直線上に配列され、引出し線パターンとしては
最稠密となる。従つて引出し線のチツプ上での
占有面積が小さくでき、ヘツドチツプの小型化
が図れる。又引出し線の短縮に伴ない外部から
の雑音や浮遊容量などの影響を受けにくく、高
品質の記録・再生が可能となる。(4) The intersections of the straight line portion and the diagonal line portion of the leader line are arranged on a straight line with an inclination angle of 45° or 135° across all channels, resulting in the densest leader line pattern. Therefore, the area occupied by the lead wire on the chip can be reduced, and the head chip can be made smaller. Furthermore, as the lead wire is shortened, it is less susceptible to external noise and stray capacitance, and high-quality recording and playback becomes possible.
(5) 全チヤンネルの電気抵抗を均一化を保証しつ
つ、抵抗値を低減せしめる自由度が大きく、製
造プロセスの能力に合わせて最適設計が可能で
ある。(5) While ensuring uniform electrical resistance of all channels, there is a large degree of freedom in reducing the resistance value, making it possible to design optimally according to the capabilities of the manufacturing process.
(6) 製造能力の向上に伴ない、隣接の直線部との
スペーシングを小さくして引出し線の直線部の
線幅を拡大することで低抵抗化を図ることが可
能である。この低抵抗化は低電圧駆動と熱雑音
の低減に大きな効果を発揮する。(6) As manufacturing capacity improves, it is possible to reduce the resistance by reducing the spacing between adjacent straight parts and increasing the line width of the straight part of the lead wire. This reduction in resistance has a significant effect on low voltage drive and thermal noise reduction.
第1図、第2図は本発明の一実施例における多
チヤンネル薄膜磁気ヘツドの配線装置の平面図、
第3図は他の実施例としての多チヤンネル薄膜記
録ヘツドの配線装置の平面図、第4図は本発明の
概念を説明するための平面図、第5図は従来の多
チヤンネル薄膜再生ヘツドの配線装置の平面図で
ある。
20……基板、21……磁気抵抗効果素子、2
2,23……電極端子、24,34……スルーホ
ール、25……共通接地線、26,31……パツ
ド、27……引出し線、30……磁束センサ部、
32……薄膜コイル素子、33……磁気ポール、
40……パツドエリア、60……接続部材、70
……導体、80……磁気テープ。
1 and 2 are plan views of a wiring device for a multi-channel thin film magnetic head according to an embodiment of the present invention;
FIG. 3 is a plan view of a wiring device for a multi-channel thin film recording head as another embodiment, FIG. 4 is a plan view for explaining the concept of the present invention, and FIG. 5 is a plan view of a conventional multi-channel thin film reproducing head. FIG. 3 is a plan view of the wiring device. 20... Substrate, 21... Magnetoresistive element, 2
2, 23... Electrode terminal, 24, 34... Through hole, 25... Common ground wire, 26, 31... Pad, 27... Lead wire, 30... Magnetic flux sensor section,
32... Thin film coil element, 33... Magnetic pole,
40... Pad area, 60... Connection member, 70
...Conductor, 80...Magnetic tape.
Claims (1)
にピツチPの間隔でチヤンネル数の再生用磁気抵
抗効果素子或いは記録再生用薄膜コイル素子が配
列され、一方上記基板の他方の端縁部に沿つて上
記素子の配列方向と平行に上記基板のほぼ全幅に
亘つてチヤンネル数分のボンデイングパツド部を
パツド線幅D、ピツチTの間隔で配列し、各チヤ
ンネルで上記素子と上記パツド部とを連結する複
数本の引出し線群を有し、上記各引出し線は線幅
dの直線部と上記直線部に対して傾斜角45度又は
135度の斜線部とで組合わされることを基本とし、
一端が上記パツド部に接続する上記斜線部線幅を
√2dとし、かつ上記斜線部の線幅を構成する一
方の側線のみが、対応接続するパツドの一方の側
線の延長線上にΔX=D−2dの距離で交差し、か
つ上記引出し線直線部の配列ピツチP′に対し、上
記各素子から延びる引出し線数が1本の場合は
P′=P=T/2、2本の場合はP′=P/2=T/2を
満た し、かつ隣接する上記引出し線直線部の長さの変
化量をT−P′としたことを特徴とする多チヤンネ
ル薄膜磁気ヘツドの配線装置。[Scope of Claims] 1. A number of channels of magnetoresistive elements for reproduction or thin film coil elements for recording and reproduction are arranged along one edge of the substrate at intervals of pitch P in the track width direction; Along the other edge, in parallel with the direction in which the elements are arranged, bonding pads corresponding to the number of channels are arranged at intervals of pad line width D and pitch T over almost the entire width of the substrate, and each channel has the above bonding pads. It has a plurality of lead line groups connecting the element and the pad part, and each of the lead lines has a straight part with a line width d and an inclination angle of 45 degrees with respect to the straight part.
Basically, it is combined with the shaded part of 135 degrees,
The line width of the diagonal line part where one end connects to the pad part is √2d, and only one side line constituting the line width of the diagonal line part is on the extension line of one side line of the corresponding pad. If the number of lead wires intersecting at a distance of 2d and extending from each of the above elements is one with respect to the arrangement pitch P′ of the straight line part of the lead wires, then
P′=P=T/2, in the case of two wires, P′=P/2=T/2 is satisfied, and the amount of change in length of the adjacent straight part of the leader line is T−P′. A wiring device for a multi-channel thin film magnetic head.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60035752A JPS61196414A (en) | 1985-02-25 | 1985-02-25 | Multi-channel thin film magnetic head wiring device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60035752A JPS61196414A (en) | 1985-02-25 | 1985-02-25 | Multi-channel thin film magnetic head wiring device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61196414A JPS61196414A (en) | 1986-08-30 |
| JPH0243245B2 true JPH0243245B2 (en) | 1990-09-27 |
Family
ID=12450557
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60035752A Granted JPS61196414A (en) | 1985-02-25 | 1985-02-25 | Multi-channel thin film magnetic head wiring device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61196414A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0478147U (en) * | 1990-11-22 | 1992-07-08 |
-
1985
- 1985-02-25 JP JP60035752A patent/JPS61196414A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0478147U (en) * | 1990-11-22 | 1992-07-08 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61196414A (en) | 1986-08-30 |
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