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JPH0261816B2 - - Google Patents
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JPH0261816B2 - - Google Patents

Info

Publication number
JPH0261816B2
JPH0261816B2 JP25483A JP25483A JPH0261816B2 JP H0261816 B2 JPH0261816 B2 JP H0261816B2 JP 25483 A JP25483 A JP 25483A JP 25483 A JP25483 A JP 25483A JP H0261816 B2 JPH0261816 B2 JP H0261816B2
Authority
JP
Japan
Prior art keywords
transistor
diode
circuit
emitter
grounded transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP25483A
Other languages
Japanese (ja)
Other versions
JPS59126325A (en
Inventor
Michihiko Horiuchi
Saburo Kojima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Totoku Electric Co Ltd
Nippon Technart Inc
Original Assignee
Totoku Electric Co Ltd
Nippon Technart Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Totoku Electric Co Ltd, Nippon Technart Inc filed Critical Totoku Electric Co Ltd
Priority to JP25483A priority Critical patent/JPS59126325A/en
Publication of JPS59126325A publication Critical patent/JPS59126325A/en
Publication of JPH0261816B2 publication Critical patent/JPH0261816B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/04Modifications for accelerating switching

Landscapes

  • Electrophotography Using Other Than Carlson'S Method (AREA)
  • Electronic Switches (AREA)
  • Dot-Matrix Printers And Others (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)

Description

【発明の詳細な説明】 本発明は、選択駆動回路、特に多針電極を用い
る静電記録装置のその針電極を選択駆動するため
の回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a selective driving circuit, and particularly to a circuit for selectively driving needle electrodes of an electrostatic recording device using multi-needle electrodes.

静電記録装置は、電気信号を多針電極に書画状
に印加することにより記録体上に静電潜像を記録
作成するものである。この記録に際しては、針極
を走査せずに針極を与える信号を走査するように
すれば、記録速度が高速となることから、最近で
はこの記録方式が専ら用いられている。ところ
で、この記録方式によると、高速度で選択された
針極に所定の高電圧を印加すること、選択駆動回
路がその集積化上低消費電力の回路構成であるこ
とが必要である。
An electrostatic recording device records and creates an electrostatic latent image on a recording medium by applying electrical signals to multi-needle electrodes in a calligraphic pattern. In this recording, the recording speed can be increased by scanning the signal that provides the needle pole without scanning the needle pole, so this recording method has been exclusively used recently. By the way, according to this recording method, it is necessary to apply a predetermined high voltage to the needle pole selected at high speed, and it is necessary that the selection drive circuit has a circuit configuration with low power consumption due to its integration.

しかし、従来のこの種の選択駆動回路では、制
御入力に対する出力電気信号の立上りが遅いとい
う欠点を有している。これは、微小電圧の制御入
力を以て高電圧の電気信号の出力状態を制御する
には、何等かのスイツチング素子回路が介在せし
められるが、このスイツチング素子回路の特性な
どに起因して出力の電気信号にその影響があらわ
れるからである。
However, this type of conventional selection drive circuit has the disadvantage that the rise of the output electric signal relative to the control input is slow. In order to control the output state of a high-voltage electrical signal using a micro-voltage control input, a switching element circuit of some kind is required, but due to the characteristics of this switching element circuit, the output electrical signal This is because its influence appears in

第1図は、従来のこの種の選択駆動回路の回路
構成例を示したものである。これによると、トラ
ンジスタTR1がオン状態にあるとき、ツエナー
ダイオードD1によつてトランジスタTR2のベ
ースにはツエナー電圧が印加され、そのエミツタ
はダイオードD2を介して印加されるV2により
ベースに対して逆バイアスがかかつた状態となつ
ておりトランジスタTR2はオフ状態にある。一
方、トランジスタTR1がオフ状態にあるとき
は、トランジスタTR2のベースには電源V1より
抵抗R1を介してベース電流が供給されるので、
トランジスタTR2はオン状態となる。この場
合、トランジスタTR2がオフ状態よりオン状態
となるとき、すなわちダイオードD2,D3の中
間接続点Oが電圧値V2よりV1に変化する時にト
ランジスタTR2のベースに供給される電流は上
記抵抗R1を介して供給されるのみであり、また
ダイオードD3が存在することにより、このダイ
オードD3のスイツチング動作による高速化の限
界があつた。
FIG. 1 shows an example of the circuit configuration of a conventional selection drive circuit of this type. According to this, when the transistor TR1 is in the on state, a Zener voltage is applied to the base of the transistor TR2 by the Zener diode D1, and its emitter is reversed with respect to the base by V2 applied through the diode D2. It is in a biased state and the transistor TR2 is in an off state. On the other hand, when the transistor TR1 is in the off state, the base current is supplied to the base of the transistor TR2 from the power supply V1 via the resistor R1.
Transistor TR2 is turned on. In this case, when the transistor TR2 changes from the off state to the on state, that is, when the voltage value at the intermediate connection point O between the diodes D2 and D3 changes from V2 to V1 , the current supplied to the base of the transistor TR2 is the resistor R1. Moreover, the existence of the diode D3 limits the speed-up of the switching operation of the diode D3.

本発明は上記の点に鑑みなされたもので、上記
O点で高速スイツチング、を行なうためダイオー
ドD3を取り外すと共にトランジスタTR2のエ
ミツタ・ベース間にダイオードを挿入することに
より高速立上がりパルスの供給を可能とする選択
駆動回路を提供することを目的とする。
The present invention has been made in view of the above points, and in order to perform high-speed switching at the above-mentioned point O, it is possible to supply a high-speed rising pulse by removing diode D3 and inserting a diode between the emitter and base of transistor TR2. The purpose of the present invention is to provide a selection drive circuit that performs the following.

本発明の最適な実施例回路を第2図に示す。図
に示すようにトランジスタTR2のエミツタ・ベ
ース間にダイオードD4を挿入した。これにより
トランジスタTR2のオフよりオン状態となる時
すなわちトランジスタTR1のオン状態よりオフ
状態となる時に抵抗R1を介して電流を供給する
と共にTR1,D1,TR2の過渡現象に対して
ダイオードD4を介して電流を供給し、TR2の
オフ時にベース・エミツタ間に高電位の逆バイア
スがかかるのを防止したスイツチング回路の高速
化を実現した。
A preferred embodiment circuit of the present invention is shown in FIG. As shown in the figure, a diode D4 was inserted between the emitter and base of the transistor TR2. As a result, when the transistor TR2 goes from off to on, that is, when the transistor TR1 goes from on to off, a current is supplied through the resistor R1, and a current is supplied through the diode D4 for transient phenomena of TR1, D1, and TR2. We achieved a faster switching circuit that supplies current and prevents high potential reverse bias from being applied between the base and emitter when TR2 is off.

これにより第1図に示す回路のツエナーダイオ
ードのツエナー電圧を5V,V1を400V、V2を7V
とした場合、O点の約+6Vより+400Vへの立上
りが約5μ秒であつたものが第2図の回路構成と
することにより約3μ秒となつた。さらにエネル
ギー蓄積要素であるコンデンサC1をツエナーダ
イオードD1の両端に接続した第3図の構成を取
りトランジスタのスイツチング時の過渡時にこの
コンデンサC1よりエネルギーを供給することに
より、ツエナーダイオードD1の特性に左右され
ることの少ない高速のスイツチング回路が実現
し、前記同様のV1,V2,D1にて立上りが約1μ
秒に減少し非常に高速でのスイツチング回路が実
現した。
As a result, the Zener voltage of the Zener diode in the circuit shown in Figure 1 is 5V, V1 is 400V, and V2 is 7V.
In this case, the rise from about +6 V to +400 V at point O took about 5 μ seconds, but by using the circuit configuration shown in FIG. 2, it took about 3 μ seconds. Furthermore, by adopting the configuration shown in Fig. 3 in which a capacitor C1, which is an energy storage element, is connected to both ends of the Zener diode D1, and supplying energy from the capacitor C1 during a transition during switching of the transistor, the power is controlled by the characteristics of the Zener diode D1. A high -speed switching circuit has been realized that is less likely to cause problems.
A very high-speed switching circuit has been realized, which is reduced to seconds.

定電圧源としてはツエナーダイオードD1に変
えてダイオードの直列接続また抵抗分割によつて
定電圧を得ても同様の効果が得られることはもち
ろんである。
Of course, the same effect can be obtained by using a series connection of diodes or resistance division to obtain a constant voltage instead of using the Zener diode D1 as the constant voltage source.

またトランジスタに変えてもFET,VMOS,
SMOS等で等価回路を形成しても同様である。
Also, even if you change it to a transistor, FET, VMOS,
The same is true even if an equivalent circuit is formed using SMOS or the like.

また本発明は静電記録の多針駆動回路を例にと
つて説明したが広くスイツチングを行なう回路構
成に応用できることももちろんである。
Further, although the present invention has been described by taking a multi-stylus drive circuit for electrostatic recording as an example, it is of course applicable to a wide variety of circuit configurations that perform switching.

以上説明した様に簡単回路構成により極めて高
速でのスイツチング回路が実現した。
As explained above, an extremely high-speed switching circuit has been realized with a simple circuit configuration.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の回路例図、第2図は本実施例の
選択駆動回路図、第3図は他の実施例の選択駆動
回路図である。 図において、D1…ツエナーダイオード、D2
〜D4…スイツチングダイオード、TR1,TR
2…トランジスタ、C1…コンデンサ、R1〜R
5…抵抗である。
FIG. 1 is an example of a conventional circuit, FIG. 2 is a selection drive circuit diagram of this embodiment, and FIG. 3 is a selection drive circuit diagram of another embodiment. In the figure, D1... Zener diode, D2
~D4...Switching diode, TR1, TR
2...Transistor, C1...Capacitor, R1~R
5...Resistance.

Claims (1)

【特許請求の範囲】[Claims] 1 エミツタ接地形トランジスタ回路のコレクタ
よりツエナーダイオードと第1の抵抗を介して電
源に接続し、前記ツエナーダイオードと第1の抵
抗の接続点より第2の抵抗を介してコレクタ接地
形トランジスタ回路のベースに接続し、該コレク
タ接地形トランジスタのエミツタに第1のダイオ
ードのアノード端子を、ベースにカソード端子を
接続し、該コレクタ接地形トランジスタのエミツ
タより第3の抵抗を介して前記エミツタ接地形ト
ランジスタのコレクタに接続し、前記コレクタ接
地形トランジスタのエミツタに前記エミツタ接地
形トランジスタのオン時に順方向接続となるよう
に第2のダイオードを介して一定の電圧を供給
し、前記コレクタ接地形トランジスタのエミツタ
より出力を取り出す構成としたことを特徴とする
選択駆動回路。
1 The collector of the emitter grounded transistor circuit is connected to the power supply via a Zener diode and a first resistor, and the base of the collector grounded transistor circuit is connected to the power supply via a second resistor from the connection point of the Zener diode and the first resistor. The anode terminal of the first diode is connected to the emitter of the collector grounded transistor, and the cathode terminal of the first diode is connected to the base of the transistor. A constant voltage is supplied to the emitter of the collector grounded transistor through a second diode so that the emitter of the collector grounded transistor is connected in a forward direction when the emitter grounded transistor is turned on. A selection drive circuit characterized by having a configuration for taking out an output.
JP25483A 1983-01-06 1983-01-06 Selective driving circuit Granted JPS59126325A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25483A JPS59126325A (en) 1983-01-06 1983-01-06 Selective driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25483A JPS59126325A (en) 1983-01-06 1983-01-06 Selective driving circuit

Publications (2)

Publication Number Publication Date
JPS59126325A JPS59126325A (en) 1984-07-20
JPH0261816B2 true JPH0261816B2 (en) 1990-12-21

Family

ID=11468789

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25483A Granted JPS59126325A (en) 1983-01-06 1983-01-06 Selective driving circuit

Country Status (1)

Country Link
JP (1) JPS59126325A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4133764C1 (en) * 1991-10-11 1993-02-18 Texas Instruments Deutschland Gmbh, 8050 Freising, De

Also Published As

Publication number Publication date
JPS59126325A (en) 1984-07-20

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