JPH0262876B2 - - Google Patents

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention relates to a device that creates a reverberant sound of an input signal by superimposing multiple delayed signals of an input signal (music signal, etc.) created based on an impulse response using a convolution operation. This is designed to prevent delays between input and output in adaptive convolution operations. [Prior Art] When artificially adding reverberation to music signals, etc., the most direct electronic method is to extract various types of reverberation from the direct sound in response to the impulse response in an acoustic space such as a virtual hall. This is a method of expressing signals as a superposition of signals with time delays. That is,
As shown in Figure 2, the impulse response of a virtual acoustic space is composed of multiple reflections consisting of a delay time τ _i and a level g _i (i = 1, 2,..., n) with respect to the direct sound R ₀ . Assuming that it is a sequence of sounds, a reflected sound is created for each sample of the input signal using the delay time τ _i and the level g _i as parameters (reflected temperature parameters), and the reflected sounds of each sample are superimposed at the same time. Reverberation sound is created by combining the delayed signals (this operation of multiplying the delayed signal by a gain and adding it is called a convolution operation). Conceptually, as shown in Fig. 3, the convolution operation involves inputting each sample value of an input signal to a shift register 1 with multi-tap while sequentially shifting it every sampling period, and delaying it within one sampling period. Delayed signals X ₁ to X _o of each sample are output from each tap corresponding to times τ ₁ to τ _{o ,} and these are applied to coefficients (gains) g ₁ to go by multipliers 2-1 and 2-n, respectively. By adding them and adding them in the adder 3, one sample of the reverberant signal is obtained: X _put = _o 〓 ^{i = 1} x _i · g _i . Specifically, as shown in FIG. 4, each sample of the input signal is stored in the data memory 10, the delay time data τ ₁ to τ _o are sequentially read out from the parameter memory 12, and each delay time τ is set using these as addresses. ₁
The delayed signals X _{1 to} X _o corresponding to ~τ _o are sequentially read out from the data memory 10, and the multiplier 14 assigns coefficients g ₁ to go to these delayed signals X ₁ to _{X o} , respectively.
Sequentially create individual reflected sound signals X ₁・g ₁ ~X _o・g _o ,
One sample of the reverberant signal is created by accumulating these in the amulator 16, which includes an adder 18 and a register 20. and,
By repeating this series of operations each time a new input signal sample is written to the data memory 10, a series of reverberation signals is created. In the convolution operation using serial sequential processing, the series of operations described above must be performed during one sampling period of the input signal to create one reverberant signal sample. The number of points that can be convolved (the number of times the amulator 16 adds coefficients to data and accumulates them within one cycle) is limited. In order to obtain more natural reverberation, it is desirable to increase the number of convolution points to increase the amount of information, that is, to increase the number of reflected sound parameters (τ _i , g _i ) used as much as possible. This was difficult to achieve for these reasons. Conventionally, this has been achieved by appropriately thinning out the reflected sound parameters. However, this has the disadvantage that the density of the reflected sound on the time axis becomes coarse, resulting in an unnatural reverberant sound. In addition, we focused on the fact that when the input signal is continuous, the latter part (low level) of the reverberant sound is masked by the input signal and becomes inaudible, so we use only the initial part of the reflected sound parameter. However, the latter part was omitted. However, although this works well when the input signal is continuous, when the input signal is interrupted, the reverberation sound also suddenly discontinues, giving an unnatural feeling. Therefore, in order to improve these problems, a so-called adaptive type was devised. In this method, when the input signal is interrupted, the interval of the reflected sound parameters to be used is sequentially shifted to the lower level.If there is an input signal, a predetermined number of higher-ranking reflected sound parameters are selected, and the interval of the reflected sound parameter to be used is When it runs out, it is moved to a lower level one by one. As a result, total reflection sound parameters are sequentially applied to several samples immediately before the input signal is interrupted to create reflected sounds, resulting in a long and natural reverberant sound. The adaptive type detects that the input signal has reached zero level, and changes from fixed type operation (operation that creates reverberation sound by fixing the parameter usage interval to the upper level) to adaptive type operation (operation that creates reverberant sound by fixing the parameter usage interval to the upper level). However, in order to determine whether the detected zero level is simply due to a zero crossing of the signal waveform or whether the input signal is truly interrupted, it takes a long time of several tens of milliseconds. It is necessary to detect the level of the input signal over time. In addition, if it is determined that the input signal is interrupted, the adaptive operation must be executed going back to the first input signal part of the detection interval, so in the conventional adaptive type, the detection time The input signal must always be delayed, which has the drawback of causing a delay time between input and output. This point will be explained in detail below. FIG. 5 shows a conventional adaptive reverberation adding device. The input signal samples are temporarily stored in the pre-memory 22 of the zero detection unit 5, and are sequentially transferred to the data memory 24 of the adaptive convolution calculation unit 6 with a delay of several tens of milliseconds for zero detection. The zero detection circuit 26 accumulates the sample data of the past several tens of milliseconds stored in the pre-memory 22, and if the accumulated value is higher than a certain threshold, it is determined that the input signal is sustained, and the input signal is low. In this case, it is determined that the input signal has been interrupted. The input signal samples output from the pre-memory 22 are sequentially input to the data memory 24, and are sequentially updated by sequentially writing the oldest sample from the written address. The impulse response delay memory 30 is
Parameter data τ _i (i=1 to n) of delay time is stored. The impulse response level memory 32 stores level parameter data g _i (i=1
-n) are memorized. The counter 28 is used to measure time to control the operation timing of the adaptive convolution calculation unit 6. The permutation controller 34 selects the delay memory 30 and the level memory 32 as k parameters used to create one sample of reverberant sound.
This is to select which one of the n parameters (τ _i , g _i ) stored in the image data is to be used. In other words, when the input signal continues, (τ _i ,
A fixed type operation is performed in which k parameters from the beginning are sequentially read out according to the count of the counter 28, such as g _i ), (τ _k , g _k ). Additionally, when zero detection circuit 26 detects an input signal discontinuation, adaptive operation is performed. In adaptive motion,
The time t since the start of the operation (that is, the elapsed time since the input was stopped) is measured, and k parameters having the relationship w=τ _i are used from the top. That is, since t=0 at the beginning, (τ ₁ , g ₁ ), (τ _k , g _k )
Then, when t>τ ₁ , (τ ₂ , d ₂ ), (τ _k+1
，
g _k+1 ) further becomes t > τ ₂ , (τ ₃ , g ₃ ) ~
(τ _k+2 , g _k+2 ), and so on, the area of parameters used gradually moves to the lower level, and
Along with this, the cumulative value obtained by the convolution operation becomes smaller, and the reverberant sound gradually attenuates, and the reverberant sound completely disappears τ _o after the input signal is interrupted. The address controller 36 controls the data memory 2
This designates the write address and read address of No. 4. As the write address, as described above, the address of the oldest sample is sequentially designated and updated to a new sample. For the read address, specify the address corresponding to the delay time parameter τ _i based on the write address (since the write address shifts sequentially in each sampling period,
The read address corresponding to τ _i must also be migrated accordingly. ) Read the delayed signal data X _i .
It also sends information regarding the current address to the permutation controller 34 . Note that when zero is detected, writing to the data memory 24 is stopped, and writing is resumed when an input signal is received again. The convolution calculation circuit 38 is connected to the data memory 24
The delayed signal data X _i sequentially read from the impulse response level memory 32 is sequentially multiplied and accumulated by the corresponding level parameter g _i read from the impulse response level memory 32, and one reverberation signal sample is output. In this way, one sample of the reverberant signal is created for each sampling period of the input signal,
This process is repeated to create a series of reverberation signals. FIG. 6 shows the operation of the reverberation adding device in FIG.
The figures are shown in order. Each state a~m
shows the states at the time points indicated by arrows at the right end, with the memories (pre-memory 22, data memory 24) shown in the upper row, and the parameters shown in the lower row. In the memory, the shaded area indicates the state in which samples of the input signal shown above are stored. Vertical lines in the parameters indicate the parameters (τ _i , g _i ) selected at that time. Moreover, the double hatched portion in the memory is a sample of the input signal to which the selected parameter is applied and convolved. Among the symbols a to m indicating each state, the states circled are fixed-type operations, that is, k parameters (τ ₁ , g ₁ ) to (τ _k , g _k ) are selected from the beginning of the parameters and are folded. Insertion is performed. Furthermore, in the state surrounded by ◎, an adaptive operation is performed, that is, convolution is performed by sequentially shifting the selected parameters to the lower order. The input signal shown in the lower column of FIG. 6 is a series of reverberant signals obtained by connecting convolution calculation values (accumulated values) at each time point, that is, sample values of the reverberant signal. According to this, it can be seen that the output signal is delayed by the retention time in the pre-memory 22 with respect to the input signal. As a result, a difference occurs between the direct sound and the reverberant sound, resulting in unnatural reverberant sound. When playing back records, etc., the problem can be resolved by delaying the direct sound by this amount, but when playing live music such as musical instruments or vocals, the sound is raw and no delay is necessary. This is a problem because it cannot be done. [Problems to be Solved by the Invention] This invention aims to prevent delays in reverberant sound when creating reverberant sound by adaptive convolution. [Means for Solving the Problems] The present invention performs a fixed convolution operation by applying an initial part of reflected sound parameters to pre-memory data for detecting the presence or absence of an input signal, and calculates the delay from pre-memory. For the data memory into which data is input, adaptive convolution is performed using the remaining portion of the reflected sound parameters, and these two calculated values are added. [Operation] According to the solving means of the present invention, since the initial part of the reflected sound is created in the pre-memory with no delay in the input signal, the finally obtained reverberant sound also has no delay. Note that the delayed signal from the pre-memory is input to the data memory, but since the data memory creates reflected sound after the initial part (with a delay time longer than the delay time in the pre-memory), Even in adaptive convolution calculation, reverberant sound without delay can be obtained. [Principle of the invention] The principle of this invention will be explained. here,
As the reflected sound parameters, as shown in Figure 7,
Assuming a case where there are 12 parameters (τ ₁ , g ₁ ) to (τ ₁₂ , g ₁₂ ), a total of 8 parameters are used, and the top 3 initial parameters are stored in pre-memory data. For the lower five parameters, adaptive convolution is performed on the data in the data memory. As a configuration for realizing this, as shown in FIG. 8, the pre-memory 22 and the data memory 24 are configured with shift registers, and input samples are sequentially shifted using the clock of the sampling period. Signals are extracted from the taps corresponding to the delay times τ ₁ to _{τ 12} of the pre-memory 22 and data memory 24 (data memory 24
The delay time of tap No. 4 is a value based on the input side of the pre-memory 22. ) and leads to amplifiers _21-1 to 21-12 having gains g1 to _g12 . Regarding the data in the pre-memory 22, all of the outputs of the amplifiers 21-1 to 21-3 are added together by a convolution arithmetic circuit (adder) 48. Regarding the data in the data memory 24, the selection circuit 23 selects the output of each amplifier 21-4 to 21-12 and five dummy amplifiers 21-D1 to 21-D5 (delay time inputs the outputs of τ ₁₂ <τ _D1 <...<τ _D5 ), and selects and outputs any five of them. The selected outputs are added by a convolution calculation circuit (adder) 38. The outputs of the convolution calculation circuits 48 and 38 are added together by an adder 50 and output as one sample of the reverberation signal. This series of operations is repeated every sampling period to create a series of reverberation signals. The zero detection circuit 26 adds the outputs of each stage of the pre-memory 22 using an adder 26, and compares the sum with a predetermined threshold value using a comparator 25 to detect a zero (no signal) state of the input signal. Based on this zero detection, the data memory 24 shifts to adaptive operation. Each operation mode is shown in FIGS. 8 to 12. In each of these memories 22 and 24, the shaded areas indicate areas containing signals, and the blank areas indicate zero signal areas. Furthermore, in the circuit used for calculation, the amplifier is shown in black. FIG. 8 shows a continuous signal state, where the pre-memory 22 contains the signal, and the data memory 24 has the top five parameters (τ ₄ , g ₄ ) to (τ ₈ to _{g 8} ) selected. . In FIG. 9, when the signal is interrupted, the signal in the pre-memory 22 disappears, so zero is detected, and the data memory 24 performs an adaptive operation and selects the top five parameters at the position where the signal exists. As the no-signal portion moves to a lower level, the parameter selection area also moves to a lower level. FIG. 10 shows that when the zero signal state continues and the number of parameters in the data memory 24 at a position having a signal becomes less than five, the remaining parameters are assigned to dummy parameters. When all parts of the data memory 24 become non-signal, dummy parameters are applied to all five. Since the input signal of the dummy is zero, the output of the arithmetic circuit 38 is zero. FIG. 11 shows the situation when the signal is temporarily interrupted, transition is made to adaptive operation, and then the signal is re-entered while the data before the interruption still remains in the data memory 24. At this time, pre-memory 2
2, the zero detection state is canceled and the data memory 24 side shifts to fixed type operation. That is, five parameters from the top are selected. However, since it is not possible to allocate five parameters only to the new data that has entered the data memory 24, the remaining parameters are applied to the data before the interruption. FIG. 12 shows a state in which one sample period has advanced from the state in FIG. 11, and the number of parameters assigned to new data in the data memory 24 has increased by one to three, so the parameters to be applied to the data before interruption are One has been reduced to two. In this way, until the five parameters can be applied to the new data, the corresponding parameters are temporarily applied to the old data before the interruption, resulting in a state of mixed operations. Note that FIGS. 11 and 12 show the data memory 2.
4 shows the case where the data before the interruption remains, but even if the data memory 24 is all in a no-signal state, the dummy parameters are applied, so during the transition period after the interruption is resolved, The upper parameters are applied to the new data, and dummy parameters are applied to the rest. To summarize the operations shown in Figures 8 to 12 above,
The selection circuit 23 operates to select the top five parameters excluding the no-signal portion of the data memory 24. In any case, calculation is performed by applying all parameters (τ ₁ , g ₁ ) to (τ ₃ , g ₃ ) on the pre-memory 22 side, and the output is different from the applied form calculation value on the data memory 24 side. They are added by a calculator 50 and output. In this case, on the pre-memory 22 side, the initial part of the reverberation signal is created without any time delay with respect to the input signal, and on the data memory 24 side, although the input signal itself is a signal delayed by the pre-memory 22,
The delay time of the parameters handled on the data memory 24 side is slower than the delay time generated in the pre-memory 22, and the delay time of each tap in the data memory 24 is based on the input side of the pre-memory 22. Reverberant signals after the initial portion are created without time delay with respect to the signal. [Embodiment] An embodiment of the present invention is shown in FIG. Here, the same reference numerals are used for parts corresponding to those of the conventional device shown in FIG. Furthermore, in the explanation of the principle of the invention, the case where the pre-memory 22 and the data memory 24 are configured with shift registers has been shown, but in the following embodiments, there is a large degree of freedom in configuration, and parameters can be easily set and changed. The case of using RAM will be explained. In this example, it is assumed that there are a total of n parameters (τ ₁ , g ₁ ) to (τ _o , _go ), of which k parameters are used at one time,
Among them, the top n parameters (τ ₁ , g ₁ ) to (τ _o , _go ) are applied to the fixed type operation, and the remaining parameters (τ _h+1 , g _h+1 ) to (τ A case will be described in which k−n of the following _(o , _go ) are applied. In FIG. 1, the zero detection section 5 and the adaptive convolution calculation section 6 are constructed in the same manner as in FIG. The fixed convolution calculation unit 7 has a pre-memory 22
Create a reverberation signal for the initial part from the data. That is, impulse response delay memory 4
0 is the delay time parameter τ _i (i=1, 2,...
_{. _} Further, the impulse response level memory 42 stores corresponding level parameters g ₁ to _gh . A counter 44 stores all parameter read addresses and a pre-memory 4 for each sample of the input signal in the delay memory 40 and level memory 42.
4 is a counter for instructing a write address and a read address. Since the read address is at a position delayed by τ ₁ to τ _h with respect to the write address, the adder 46 adds the delay time parameter τ ₁ to the write address.
It is given by adding ~τ _h . Each delay time τ ₁ read from the pre-memory 22
The input sample values X ₁ to X _h corresponding to ~τ _h are multiplied and accumulated by the corresponding level parameters g ₁ to g _h from the impulse response level memory 42, respectively, in the convolution calculation circuit 48, and then convolved. An operation is performed. In this way, a series of convolution operations are performed every sampling period of the input signal, and the fixed convolution operation section 7 outputs an initial portion of the reverberation signal. In the adaptive convolution calculation unit 6, the data memory 24 writes the delayed data output from the pre-memory 22 in order from the address where the oldest sample is written, and updates the data memory 24 sequentially. The impulse response delay memory 30 is
Delay time parameters τ _{h +1 to} τ _o of the early reflected sound portion used in the fixed convolution calculation unit 7 are stored. In addition, the impulse response level memory 32 is
Corresponding gain parameters g _h+1 to _{g o} are stored. The counter 28 controls the timing for reading out the kh set of parameters selected by the permutation controller 34 from among all the parameters from the delay memory 30 and level memory 32 every sampling period of the input signal. The permutation controller 34 determines which of the kn sets of parameters to be used in the arithmetic unit 6 to be selected. That is, when the input signal is continuous, the counter 28 calculates k−n parameters (τ _h+1 , g _h+1 ) to (τ _k , g _k ) from the beginning.
The operation for sequential reading is performed according to the count. Furthermore, when the zero detection circuit 26 detects zero, it shifts to adaptive operation. In adaptive operation, the time t from the start of the operation is measured, and this and the pre-memory 22
Add the delay time t ₀ (τ _h ≦t ₀ ≦τ _h+1 ) at t + t ₀
K−n parameters having the relationship of ≦τ _i are used from the top. The address controller 36 controls the data memory 2
This designates the write address and read address of No. 4. It also sends address information to the permutation controller 34. When zero is detected, the data memory 24 stops writing, and when zero detection is canceled (when signal input is restarted), the data memory 24 resumes writing from the address where it stopped. Thereby, the capacity of the data memory 24 can be reduced. That is, the capacity of the data memory 24 does not need to be large enough to accommodate all the parameters, and the capacity for the parameters applied to the adaptive convolution is sufficient. The operation of each of these controllers 34 is shown below for each state of the input signal. In Fig. 13, the input signal is maintained, and the parameters are from the 1st (τ _h+1 , g _h+1 ) to the k-nth (τ _k , g _k ).
The steps up to this point are applied to the data at the corresponding address using the write address _Aw as a reference. FIG. 14 shows a state where a little time has passed since the state shown in FIG. 13, and the parameters have changed from the first (τ _h+1 , g _h+1 ) to k− based on the moved write address A _w .
The data up to the h-th (τ _k +g _k ) are applied to the data at the corresponding address. When the write address A _w reaches the final address, it returns to the first address and updates old data one by one. FIG. 15 shows a state in which the input signal is interrupted, the write address A _w is stopped, and writing is prohibited. At this time,
The parameters are sequentially shifted downward every sampling period and are applied to the data at the corresponding address. FIG. 16 shows a state in which the input signal has been interrupted for a long time, and the applied parameters have shifted to the lowest level. If the process continues as it is, no more parameters will be applied, and the reverberation signal will disappear. In FIG. 17, the write address A _w starts to shift from the stopped write address A _ws at every sampling period in a state where the input signal is restarted after the interruption of the input signal. The parameters are applied from the first parameter to the stopped write address A _ws with the new write address A _w as a reference. At this time, if there are remaining parameters that are applied to the data before the input signal is stopped, the corresponding data are also applied. The convolution calculation circuit 38 is connected to the data memory 24
The delayed signal data from X ₁ and the corresponding level parameters from the impulse response level memory 32
g _i is sequentially multiplied and accumulated to output one reverberant signal sample. By repeating this process, samples of the reverberation signal after the initial part are created. The initial portion of the reverberation signal created by the fixed convolution calculation unit 7 and the subsequent reverberation signal created by the adaptive convolution calculation unit 6 are added together by an adder 50 and output as a single unit. . Figure 18 shows the operation of the reverberation adding device in Figure 1.
-m are shown in order. The display method is the same as that shown in FIG. 6 above. The reverberation signal obtained by adding the respective outputs of the fixed convolution calculation unit 7 and the adaptive convolution calculation unit 6 is shown in the lower column of the same figure, and according to this, the input signal and the output signal are It can be seen that there is no delay between the two. Therefore, there is no unnecessary delay in the reverberant sound relative to the direct sound, and natural reverberant sound can be obtained not only when playing records, but also during live performances such as musical instruments and vocals. A specific example of the embodiment shown in FIG. 1 is shown in FIG. In FIG. 19, the parameter memory 52 stores fixed operating parameters (τ ₁ , g ₁ ) to (τ _h , g _h ) and adaptive operating parameters (τ _h+1 , g _h+1 ) to (τ _o , _go )
is memorized. The counter 60 provides a write address to the pre-memory 22, and is incremented by the clock C1 every sampling period τ ₀ of the input signal. The subtracter 62 obtains the address of the delay time τ ₁ to τ _h with respect to the current write address, and provides this to the prememory 22 as a read address. The prememory 22 is switched to the write mode once every period τ ₀ by the clock C6. At this time, the delay time parameter from the parameter memory 52 is 0.
The value of the counter 60 is output as is from the subtracter 62, and the sample of the input signal is written to the address of the pre-memory 22 indicated by the value.
At timings other than clock C6, the prememory 22 is in the read mode, and the parameter memory 52
With the delay time parameters τ ₁ to τ _h sequentially output within the period τ ₀ from τ 1 to _τ with the write address as the reference
Input samples at a delay time of τ _h are read out sequentially. The counter 54 provides a write address to the data memory 24, and is incremented by the clock C1 every cycle _τ0 . The subtracter 56 obtains each address of delay time τ _i with respect to the current write address, and provides it to the data memory 24 as a read address. The data memory 24 is connected to the clock C2.
The write mode is switched once every period τ ₀ by . At this time, the delay time parameter is 0,
The value of the temporary counter 54 is output as is from the subtracter 56, and the output of the pre-memory 22 is written to the address of the data memory 24 indicated by the value. At this time, since the next write address (oldest data address) is specified in the pre-memory 22 by the counter 60, the data written to the data memory 24 becomes data delayed by the capacity of the pre-memory 22. At timings other than clock C2, the data memory 24 is switched to the read mode, and is at a delay time of τ _i with respect to the write address based on the delay time parameter τ _i sequentially output from the parameter memory 52 within the period τ ₀ . Data is read sequentially. Data read out sequentially from pre-memory 22
X ₁ to _{X h} are multipliers 64 and parameter memory 52
The level parameters g ₁ to _gh that are sequentially output from are multiplied, respectively, and g ₁ ·X ₁ to g _h ·X _h are sequentially output. Data read out sequentially from data memory 24
In the multiplier 66, X _i is
The level parameters g _i sequentially output from are multiplied, respectively, and g _i ·X _i are sequentially output. The accumulator 68 accumulates the multipliers from the multipliers 64 and 66 using an adder 70 and a register 72. As a result, the accumulator 68 finally outputs the total accumulated value of all multiplication values within the period τ ₀ . The contents of register 72 are reset by clock C3 after all multiplication values have been accumulated. The zero detection circuit 26 outputs the output of the pre-memory 22.
X ₁ to X _h are each squared by the multiplier 76 to obtain X ₁ ² to
Find X _h ² and add these to the adder 78 and register 80.
The accumulated value within the period τ ₀ is transferred to the register 82 using the clock C1. Register 80 is reset every period τ ₀ by clock C1. Next, Table 1 shows examples of write addresses for adaptive operation parameters. Note that, for convenience, the delay time parameter τ _i is stored in the form of how many sampling periods τ ₀ of the input signal it corresponds to. (It is also possible to store this in real time form, but in that case a separate interface configuration with the timing on the circuit is required.)

[Table] Also, the address of fixed type operation parameters is
Since the addresses of the parameters for adaptive type operation cannot be used in common (in the applied type, all parameters (τ _h+1 , g _h+1 ) ~ (τ _o , _go ) can be convolved once.
Therefore, if a common address is used, a situation may arise in which a necessary parameter is not read in fixed type operation. ), with its own address and read signals. In this case a) All parameters (τ ₁ , g ₁ ) ~ within period τ ₀
(τ _h , g _h ) (however, they may be in any order) b) Since they are convolved together with the adaptive form in the accumulator 68, read them in synchronization with the parameters of the adaptive form b) Pre-memory 22 Conditions such as the delay time parameter being 0 when writing input data to the address (in order to write the input data to the address of the pre-memory 22 designated by the counter 60) are required. For this purpose, for example, the clock C5 generated after the start of the sampling period τ ₀ may be counted, and the fixed operation parameters may be read out using the counted value as an address. An example is shown in Table 2. Note that the delay time parameter τ _i is also stored here as a number of sampling periods τ ₀ .

〔Effect of the invention〕

As explained above, according to the present invention, reverberant sound is generated by applying the parameters of the initial part to the pre-memory for detecting the presence or absence of an input signal, and there is no signal delay between input and output, and the instrument Natural reverberation can be created even during live performances such as performances and vocals.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a diagram showing an impulse response in a certain acoustic space. FIG. 3 is a conceptual diagram of a reverberation adding device using the impulse response of FIG. 2 as a parameter. FIG. 4 is a block diagram showing a specific example of the apparatus shown in FIG. 3. FIG. 5 is a block diagram showing a conventional reverberation adding device. FIG. 6 is an explanatory diagram of the operation of the apparatus shown in FIG. 5. Figures 7 to 12
The figures are explanatory diagrams of the principle of the present invention; FIG. 7 is an impulse response, and FIGS. 8 to 12 are conceptual diagrams in each operation mode of the reverberation adding apparatus using the impulse response of FIG. 7 as a parameter. Figures 13 to 17
The figure is a diagram showing each operating state of the data memory 24 in FIG. 1 and applied parameters. FIG. 18 is an explanatory diagram of the operation of the apparatus shown in FIG. 1. FIG. 19 is a block diagram showing a specific example of the apparatus shown in FIG. 1. FIG. 20 is an explanatory diagram of the operation of the apparatus shown in FIG. 19. FIG. 21 shows the zero detection circuit 2
FIG. 6 is a circuit diagram showing another configuration example of No. 6; 22... Pre-memory, 24... Data memory, 26
...Zero detection circuit.

Claims (1)

[Scope of Claims] 1. A pre-memory for sequentially storing input signals; a level detecting means for detecting the presence or absence of the input signal based on the data stored in the pre-memory; and output from the pre-memory after a predetermined time delay. A main memory that sequentially stores the input signals, and data stored in the pre-memory,
a fixed convolution calculation unit that applies an initial part of the reflected sound parameters to create a reverberation signal; an adaptive convolution calculation unit that creates a reverberation signal by applying a plurality of higher-order items except for those corresponding to the delay time of the no-signal portion of the input signal; and the fixed convolution calculation unit and the adaptive convolution calculation unit. A reverberation adding device characterized by comprising: an adding means for adding and outputting the outputs of the reverberation adding device.