JPH0312459B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method of manufacturing a metal ballast resistor in a semiconductor device.

[Prior art]

The following will explain the case of a planar high frequency, high output transistor as an example. Recent high-frequency, high-output transistors employ a large number of emitter stripes divided into fine patterns to improve their high-frequency, high-output characteristics, and a divided base cell to create a thermally stable structure. In order to prevent current from concentrating on a specific one of the large number of emitter stripes and divided base cells, a method has been adopted in which a ballast resistor is inserted into the emitter electrode.

1A to 1G are cross-sectional views showing the main stages of forming a ballast resistor in a conventional high-frequency, high-output transistor. A film 2 is formed, and a p-type impurity is diffused through a required opening provided in the film to form a base diffusion layer 3. Furthermore, an n-type impurity is selectively diffused into the surface of this base diffusion layer 3 to form an emitter diffusion layer. A layer 4 is formed, and a base contact hole 5 and an emitter contact hole 6 are formed in the surface oxide film 2 formed at that time (FIG. 1A). Next, a barrier metal layer 7 is formed on the oxide film 2 including the inner surfaces of both contact holes 5 and 6, and a metal film 8 of the same quality as the main electrode metal, which will be described later, is further formed thereon. A photoresist film 9 is formed on a portion other than the portion where the upper electrode wiring is to be formed [FIG. 1B]. The barrier metal layer 7 improves the adhesion between the electrode metal and the underlying oxide film 2, and also prevents the electrode metal from diffusing into the semiconductor substrate 1, and is used here as a ballast resistor. Barrier metal layer 7 and metal film 8 are generally formed using a sputtering device. Next, a main electrode metal layer 11 is formed on the metal film 8 by plating, and the photoresist film 9 is removed with a resist stripper to form a groove 10 (FIG. 1C). Next, the exposed portion of the metal film 8 in the groove 10, which is the same as the main electrode metal but much thinner than the main electrode metal, is removed by etching, and then the barrier metal layer 7 is removed using the main electrode metal layer 11 as a mask.
The exposed portion in the groove 10a is removed by etching, and the emitter electrode part and the base electrode part are removed in the groove 10a.
(Fig. 1D). Next, a photoresist film 12 is formed on the upper surface of the main electrode metal layer 11 including the inside of the groove 10a, and a groove 13 having a width l is formed in a portion where an emitter ballast resistor is to be formed (FIG. 1E). The width l of this groove 13 determines the length of the ballast resistance layer; the narrower the width l, the smaller the ballast resistance, and the wider the width l, the larger the ballast resistance. Next, using this photoresist film 12 as a mask, the main electrode metal layer 11 and the homogeneous metal film 8 in the groove 13 are removed by etching, leaving the barrier metal layer 7 (FIG. 1F). The ballast resistance layer is thus formed, but since side etching occurs during this etching, the length of the ballast resistance layer becomes L (L>l) as shown in the figure. Thereafter, the photoresist film 12 is removed to complete the electrode wiring 11 provided with the emitter ballast resistor [first
Figure G].

However, in the conventional method described above, the amount of side etching is determined at the etching step shown in FIG. changes, making it difficult to control the length L of the ballast resistance layer to a predetermined value, causing variations between wafers and between lots, and resulting in changes in the emitter ballast resistance value, resulting in poor high-frequency, high-output characteristics. was becoming a factor in the instability.

[Summary of the invention]

This invention was made in view of the above points, and instead of using the photoetching method to form grooves in the electrode wiring in the area where the ballast resistor is to be formed, it is possible to form grooves in the electrode wiring before forming the electrode wiring. After forming a photoresist pattern with a width corresponding to the width of the groove at the site, electrode wiring is formed by plating, and the photoresist is removed to form the groove, thereby forming the groove with the desired width. The present invention provides a method for accurately configuring and forming a ballast resistor of a desired value with good reproducibility.

[Embodiments of the invention]

FIGS. 2A to 2G are cross-sectional views showing the state at each stage for explaining an embodiment of the present invention.
The same reference numerals as in FIG. 1 of the conventional example indicate the same or corresponding parts. The stage of FIG. 2A is exactly similar to the stage of FIG. 1A. Next, in the step shown in FIG. 2B, a varimetal layer 7 and a metal thin film 8 of the same quality as the metal used for the main electrode are formed, as in FIG. A photoresist film 14 having a desired width is formed by photolithography. Next, as shown in FIG. 2C, photoresist films 9, 1
Using 4 as a mask, the metal thin film 8 is used as a "seed" for plating.
As shown in FIG. 2D, the main electrode metal 11 is formed by electrolytic plating, and then, as shown in FIG. At the same time, a groove 15 is formed in the area where the emitter ballast resistor is to be formed, where the photoresist film 14 was formed. The width of this groove 15 is equal to the width of the photoresist film 14 and has a desired value L. Next, as shown in FIG. 2E, the exposed regions within the grooves 10 and 15 of the metal film 8 are removed by etching to form grooves 10a and 15a. Next, as shown in FIG. 2F, only the groove 15a is covered with a photoresist film 16, and then the barrier metal layer 7 in the groove 10a is removed by etching, and the base electrode part and the emitter electrode part are completely formed by the groove 10b. Separate into Thereafter, as shown in FIG. 2G, the photoresist film 16 covering the groove 15a is removed to complete the electrode wiring having the desired emitter ballast resistance.

Note that here, the metal thin film 8 having the same quality as the main electrode metal 11 is formed on the barrier metal layer 7 with the main electrode metal 11
It serves as the plating "seed" when forming (usually gold) by electrolytic plating. By providing the metal thin film 8 on the barrier metal layer 7 in advance in this manner, the main electrode metal 11 can be uniformly formed by electrolytic plating.

In the manufacturing method of this embodiment as described above, since the etching at the stage of FIG. The length L of the emitter ballast resistor by
The variation in can be made extremely small.

Although the formation of the emitter ballast resistor of a high-frequency, high-output transistor has been described above, the present invention can be applied to the formation of each ballast resistor of any semiconductor device including an integrated circuit device.

〔Effect of the invention〕

As detailed above, in the present invention, only a thin second metal film is formed on the portion of the first metal film made of barrier metal that should be used as a ballast resistor, and the thick main electrode wiring is Since the ballast resistor is not formed, only the second metal film etching is required to complete the ballast resistor, and there is almost no variation in dimensions due to side etching, and the ballast resistor of a desired value can be formed with good reproducibility.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view showing the main stages of forming a ballast resistor in a conventional high-frequency, high-output transistor, and FIG. 2 is a cross-sectional view showing the main stages of an embodiment of the present invention. In the figure, 1 is a semiconductor substrate, 2 is an oxide film (insulating film), 7 is a barrier metal layer (first metal film), and 8 is a semiconductor substrate.
1 is a second metal film, 11 is a main electrode wiring, and 14 is a photoresist layer (insulating layer). Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] 1. In forming a metal ballast resistor in a shape inserted into a part of the main electrode wiring on the surface of an insulating film on a semiconductor substrate, the insulating film and the main electrode wiring are in close contact with each other. a first step of forming a first metal film on the insulating film to serve as a barrier metal for improving properties;
a second step of forming a thin second metal film of the same quality as the metal on which the main electrode wiring is to be formed on the first metal film; a third step of forming an insulating film on the second metal film; electrolytic plating using the second metal film as a plating seed on a portion of the second metal film that is not covered with the insulating layer; a fourth step of depositing a metal layer of the same quality as the second metal film to form the main electrode wiring, removing the insulating layer and removing the second metal film covered by the insulating layer; a fifth step of exposing a portion of the second metal film; and a sixth step of etching away the portion of the second metal film exposed in this fifth step to leave the first metal film covered therewith. A method for manufacturing a metal ballast resistor in a semiconductor device, comprising the steps of: 2. A method of manufacturing a metal ballast resistor in a semiconductor device according to claim 1, characterized in that a photoresist is used for the insulating layer.