JPH0141014B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and particularly to an improvement for reducing the size of the semiconductor device.

Hereinafter, a method for manufacturing a high-frequency, high-output transistor will be described as an example. In high-frequency, high-output transistors, it is necessary to advance miniaturization of pattern dimensions as one measure for achieving higher frequency characteristics and higher efficiency.

By the way, FIGS. 1A to 1D are cross-sectional views showing the main stages of a conventional transistor manufacturing process. First, as shown in FIG.
An opening 3 is formed in the first oxide film 2 to form a base region by a photoetching operation. Next, as shown in FIG. 1b, after boron is diffused or ion-implanted through the opening 3 to form a p-type base region 4, the first oxide film 2 is removed, including the surface of the base region 4. A second oxide film 5 is formed thereon. Next, as shown in FIG. 1c, an opening 6 is formed by photo-etching the second oxide film 5 on a part of the base region 4, and arsenic is injected through this opening 6. An n-type emitter region 7 is formed by diffusion or ion implantation, and a third oxide film 8 is formed on the entire upper surface including the upper surface. Subsequently, as shown in FIG. 1d, contact holes 9 and 10 are formed on base region 4 and emitter region 7, respectively, and electrodes (not shown) are formed through these contact holes 9 and 10. .

However, in this conventional method, when forming the contact holes 9 and 10, the oxide film on the base region 4 and the oxide film on the emitter region 7 have the same film quality, but have different film thicknesses. Since the oxide film on top of the oxide film is thicker, the emitter contact hole 10 is completed first, and then etching is performed while baking the resist by heating it in an oven several times until the base contact hole 9 is completed. Must be repeated. In this way, even though the emitter contact hole 10 has already been opened, it is immersed in the etching solution until the base contact hole 9 is opened, so it undergoes side etching and the pattern dimensions as designed can be achieved. Not only was this impossible, but it also led to the occurrence of defects.

This invention was made in view of the above points, and by forming the second oxide film by CVD method and the third oxide film by thermal oxidation, two contact holes can be formed substantially simultaneously. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can complete formation, form contact holes with high precision, and reduce the size of the pattern.

FIGS. 2a to 2c are sectional views showing the state of essential parts of an embodiment of the present invention, and parts equivalent to those of the conventional example shown in FIG. 1 are designated by the same reference numerals. A base region 4 is formed in exactly the same manner as in the steps shown in FIGS. 1a and 1b, and then a second oxide film 5a is formed. The second oxide film 5a is of a quality that is etched 1.2 to 1.4 times faster than the third oxide film 8a described later.
Formed to a thickness of 3000 to 4000 Å using the CVD method. Subsequently, as shown in FIG. 2a, an opening 6 is formed in a part of the base region 4 by photo-etching the second oxide film 5a, and arsenic is injected through the opening 6. is diffused or ion-implanted to form an n-type emitter region 7, and then a third oxide film 8a is formed on the emitter region 7 by thermal oxidation at a temperature of 2,500 ~
Formed to a thickness of 3000 Å. This third oxide film 8a
Since is a thermal oxide film, the oxide film grows much less on the second oxide film 5a than on the emitter region 7. Next, as shown in FIG. 2b, contact holes 9 and 10 are respectively formed on the base region 4 and the emitter region 7 by photo-etching. The third oxide film 8a has a different film quality from the third oxide film 8a, and is different from the third oxide film 8a on the second oxide film 5a.
is much thinner than the third oxide film 8a directly above the emitter region 7, so both contact holes 9,
10 can be completed almost simultaneously. After that, as shown in FIG. 2c, after depositing the metal electrode material, the base electrode 1 is etched as required.
1 and emitter electrode 12 are formed to complete the semiconductor device.

Although the above description has been made using an npn transistor as an example, the present invention can be widely applied to the manufacture of other semiconductor devices. Furthermore, the present invention can be extended to the case where the semiconductor regions in which the two contact holes are formed are independent from each other and the thicknesses of the insulating films thereon are different.

As detailed above, in the manufacturing method of the present invention, when forming contact holes by etching simultaneously the insulating films formed on two semiconductor regions within one semiconductor substrate and having different thicknesses from each other, The thicker insulating film
The insulating film is composed of an oxide film formed by CVD method and an oxide film formed by thermal oxidation, and the smaller insulating film is formed only of the oxide film formed by thermal oxidation, thereby reducing the difference in the completion time of both contact holes. Therefore, contact holes can be formed with high precision, and the semiconductor device can be miniaturized.

[Brief explanation of drawings]

Figures 1 a to d are cross-sectional views showing the main stages of the conventional transistor manufacturing process, and Figure 2 a
-c are cross-sectional views showing states of essential parts of an embodiment of the present invention. In the figure, 1 is a semiconductor substrate, 4 is a base region, 7 is an emitter region, 5a is a second oxide film (insulating film), 8a is a third oxide film (a thin insulating film), 9 and 10 are This is a contact hole. In addition,
In the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A step of forming a first oxide film on the entire surface of a semiconductor substrate, a step of forming an opening in the first oxide film to form a base region, and then a step of forming a base region on the entire top surface. a step of forming a second oxide film by a CVD method, a step of forming an opening in a part of the second oxide film on the base region to form an emitter region, and then thermally oxidizing the entire upper surface. a step of simultaneously etching the oxide film on the base region and the emitter region to form a contact hole reaching each region; and a step of etching the oxide film on the base region and the emitter region, respectively. A method of manufacturing a semiconductor device, comprising the step of forming an electrode connected through the contact hole.