JPH0317305B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a signal measurement method, in particular a signal measurement method for automatically measuring an input signal included within a set range or an input signal not included within this set range. Regarding.

[Conventional technology]

When testing or adjusting an electronic device, it is necessary to supply a test signal to the electronic device and measure its output signal. In this case, it is convenient if the signal under test and the reference signal can be displayed simultaneously on a display. Such conventional techniques are disclosed in Japanese Utility Model Application Publication No. 49-126483 and Japanese Patent Application Publication No. 55-144552.

By the way, measuring instruments that convert an analog input signal into a digital signal and store it in a memory and measure the input signal based on the contents of this memory include a waveform storage device, a waveform digitizer, a transient recorder, a transient memory, or a digital - Widely used under names such as oscilloscope. Such a measuring device (hereinafter referred to as a waveform storage device) automatically detects only input signals that are within a predetermined range or only input signals that are not within a predetermined range and stores them in memory. If you can,
It becomes easier to measure the output signal of the electronic device under test. Such a conventional technique is disclosed in Japanese Patent Laid-Open No. 75068/1983.

[Problem that the invention seeks to solve]

In the waveform storage device, it is necessary to set the predetermined range before determining whether the input signal is within the predetermined range. In the above-mentioned Japanese Patent Laid-Open No. 58-75068, after a reference signal is captured and stored in a memory, an allowable range is set by a program.
Therefore, there is no problem if the tolerance range is centered around the reference signal and is uniform in each part of the reference signal waveform, but if the width of the tolerance range differs in each part of the waveform, such as in the transition part of a pulse, then The problem arises that the settings are extremely difficult.

The purpose of the present invention is to solve this problem of the prior art,
It is an object of the present invention to provide a signal measurement method that can easily set an allowable range even when the allowable range differs for each part of a waveform depending on the characteristics of an electronic device under test.

[Means for solving problems]

According to the signal measurement method of the present invention, the reference signal is changed, and each time the reference signal is changed, the same timing portion of the reference signal is captured, and the overall maximum value of each portion of the reference signal captured multiple times is calculated. The minimum value is determined and stored in the first storage means, the part of the signal under test corresponding to the captured part of the reference signal is stored in the second storage means, and the part of the signal under test corresponding to the captured part of the reference signal is stored in the second storage means. The maximum value and minimum value stored in the first storage means are compared, and the signal under measurement is repeatedly stored in the second storage means until the signal under test is included or no longer included between these maximum and minimum values. It is stored in the second storage means.

[Effect]

By supplying a test signal to a standard electronic device and changing the adjustment portion within the electronic device, the output signal of the electronic device changes depending on its characteristics. Therefore, by changing the adjustment portion up to the boundary of the permissible value, the upper and lower limits of the permissible range can be obtained. The width of this tolerance range may be different for each part of the waveform. On the other hand, the present invention captures the same timing portion of the reference signal every time the reference signal is changed, and determines the overall maximum and minimum values of each portion of the reference signal captured multiple times. Therefore, by using the output signal of the above-mentioned electronic device as a reference signal in the present invention, the obtained overall maximum value and minimum value become the limits of the allowable range. Therefore, tolerance ranges with different widths can be easily set for each part of the waveform. Furthermore, since the present invention stores the signal under test until the signal under test is included in this tolerance range or until it is no longer included, desired measurements can be easily performed.

〔Example〕

First, a waveform storage device utilizing the present invention will be described with reference to FIG. An input signal applied to an analog-to-digital (A/D) converter 14 via an input terminal 10 and a buffer amplifier 12 is converted into a digital signal. The envelope detection circuit 16 detects the maximum and minimum values of this digital signal for each period as necessary and stores them in the memory 18, or stores them in the memory 18 as is. Memory 18 is, for example, high speed random access memory (RAM). The trigger/timing control circuit 20 detects the trigger point of the signal from the buffer amplifier 12 according to the setting device 22, sets the acquisition timing, and adjusts the operation timing of the A/D converter 14 and the envelope detection circuit 16. and controls the write operation and address of the memory 18. The envelope detector 16 may be, for example, one disclosed in Japanese Unexamined Patent Publication No. 56-21068. In this case, control circuit 2
0 to A/D converter 14 and envelope detection circuit 16
The timing frequency applied to the memory 18 is, for example, 10 times higher than the timing frequency applied to the memory 18, processing ten input signal portions during one timing period of the memory 18, and determining the maximum and minimum values among them; Transfer to memory 18. As described above, the envelope detection circuit of JP-A-56-21068 uses a digital processing method, but instead,
An analog processing type envelope detection circuit disclosed in Japanese Patent No. 94198 may be provided before the A/D converter 14. This analog processing type envelope detection circuit detects the maximum and minimum values for each timing period using a peak detector. In addition, envelope detection,
That is, if detection of the maximum value and minimum value is not necessary, the input signal is not processed at all by the envelope detection circuit and passes through as is.

The stored contents of the memory 18 are transferred via a bus 21 to a display memory 22, which is a RAM, for example. This bus 21 includes a central processing unit (CPU) 2 such as a microprocessor that performs various controls and processes.
4. Read-only memory (ROM) 26 that stores programs for this CPU 24, CPU 24
CPU RAM 28, which is a temporary storage device for
Connect 2. The stored contents of the display memory 22 can be read by a display control circuit 32, converted into an analog signal by a digital-to-analog (A/A) converter 34, and displayed on a display 36. This display 36
If it is a cathode ray tube, it receives a time axis signal such as a gradient wave from the control circuit 32. Further, if the display device 36 is a plasma display device, a liquid crystal display device, etc., the D/A converter 34 is not necessary. However, displaying the captured input signal is not the gist of the invention.

FIG. 1 is a schematic flow diagram illustrating the invention. Note that each step is controlled or processed by the CPU 24 according to the program in the ROM 26. First, in step 40, the input signal that is successively changed is taken in a plurality of times, and the overall maximum and minimum values are detected for each part of the input signal. For example, if a square wave is applied to an electronic device such as an amplifier and the adjustment part of this electronic device is varied, the output waveform will change from the overshoot state shown by the solid line in Figure 4 to the undershoot state shown by the dotted line. . Therefore, first, the overshoot waveform (solid line waveform) within the allowable limit is loaded into the waveform storage device. Next, this rectangular waveform is loaded into the waveform storage device while being sequentially changed to an undershoot state of the permissible limit. In addition,
Due to the action of the trigger/timing control circuit 20,
Note that the waveform storage captures the same timing portion of the input signal. By determining the maximum and minimum values for each part of the input signal that has been captured a plurality of times, a permissible range (for example, between the solid line and the dotted line in FIG. 4) can be set. Similarly, when measuring a spike pulse response, a tolerance range can be set in the waveform storage device by offsetting the DC level of the electronic device within the tolerance range, as shown by the dotted line in FIG. The overall maximum and minimum values are determined by the envelope detection circuit 16, memory 18 and CPU 24, and detailed explanation thereof will be given later with reference to FIG.

The overall maximum value and minimum value of the allowable range are stored in the first area (first storage means) of the memory 18, and the process proceeds to step 42. This step
At step 42, a portion of the signal under test having the same timing as the input signal portion acquired at step 40 is acquired and stored in the second area (second storage means) of the memory 18. This timing adjustment is also performed by the trigger/timing control circuit 20. Next, the CPU 24
It is determined whether the signal under measurement stored in the second area of the memory 18 is included between the maximum value and the minimum value stored in the first area. According to the settings made by the keyboard 30, the signal to be measured is taken in and the second area of the memory 18 is rewritten until the signal to be measured is included between the maximum value and the minimum value or until it is no longer included.
Step 42 will be described in detail below with reference to FIG. Therefore, the signal under test finally stored in the second area of the memory 18 is the desired waveform, and this signal under test is measured in step 44. This may be displayed on the display 36 or the like as described above, or may be transferred to a computer, digitally processed, and measured.

2A-2C are detailed flowcharts of step 40. At step 50, the trigger/timing control circuit 20 begins to capture a reference signal. In step 52, the envelope detection circuit 16 detects each portion of the reference signal, namely the maximum value MAX and the minimum value min within the set time, as described above.
seek. These maximum value MAX and minimum value min are set by pointer (address specification) in step 54.
According to the capture area of memory 18 (capture memory)
, and advance the pointer. Next, step 56
If the control circuit 20 has not issued a capture stop command, the process returns to step 52 and the maximum and minimum values of the next timing portion are determined. Steps 52 to 56 are repeated until a capture stop command is issued. Thus, the maximum and minimum values of each portion of the reference signal are stored sequentially at each address of the acquisition memory, as shown in FIG. 6A. In addition, in Figure 6A, AM0, AM1
... is the maximum value in each part (period),
Am0, am1... are the minimum values in each part.
This means that in the portion T of FIG. 4, the solid line waveform has a maximum value at point a and the minimum value at point b, and the wavy line waveform has a minimum value at point a and a maximum value at point c.

In step 58, it is determined whether or not the previous acquisition is the first time. If it is the first time, the process advances to step 60, and the data (maximum value and minimum value) in the acquisition memory is stored in the comparison area (comparison memory) of the memory 18. and return to step 50. FIG. 6B shows the contents of the comparison memory, where BM0, BM1, . . . are the maximum values transferred, and Bm0, Bm1, . . . are the minimum values transferred. If it is determined in step 58 that this is the second or later acquisition, the process proceeds to step 62, where the pointers of the acquisition memory and comparison memory are set to 0. Next, in step 64, the CPU 24 reads the data in the acquisition memory and comparison memory according to the pointers. Since these memories store data in the order of maximum value and minimum value, first, in step 66, the maximum value is determined. If the data in the acquisition memory (acquisition data) AM is larger than the data in the comparison memory (comparison data) BM, proceed to step 68, transfer the acquisition data to the corresponding address location in the comparison memory, and transfer the acquisition data AM to the new comparison memory. Make it a data BM. If the comparison data is larger in step 66 and after the processing in step 68, the process proceeds to step 70 to advance the pointer. In step 72, similar to step 64, data in the acquisition memory and comparison memory are read in accordance with the pointers. This pointer indicates the minimum value, so in step 74 the acquired data Am
is smaller than comparison data Bm. If yes, proceed to step 76, transfer the acquired data to the corresponding address location in the comparison memory, and transfer the acquired data Am to the new comparison data Bm.
shall be. If no at step 74, and step
After processing 76, the process advances to step 78 to advance the pointer. Thereafter, in step 80, it is determined whether all the captured data has been processed, and if no, the process returns to step 64. If the answer is YES, the process advances to step 82 to determine whether the desired acquisition has been carried out, that is, whether the acquisition has been carried out as desired, that is, if the acquisition has been carried out from overshoot to undershoot of the permissible limit in the case of FIG.
Determine whether the waveform up to the shoot has been captured. If no, the process returns to step 50; if yes, the overall maximum and minimum value detection ends. Therefore, the comparison memory stores the final maximum value BM and minimum value in each part of the changing reference signal.
Bm, that is, the limit value of the tolerance range is stored. Note that the comparison memory serves as the first storage means.

Figures 3A and 3B show a detailed flowchart of step 42. At step 84, by the action of the trigger/timing control circuit 20, a portion of the signal under test having the same timing as the reference signal portion that has been acquired is stored in the acquisition memory. At this time, the envelope detection circuit 16 does not operate, and the output signal of the A/D converter 14 is directly applied to the memory 18. Then memory 18
The contents of the storage memory in the internal memory are as shown in FIG. 6C, in which each value A0, A1, . Note that A0 and A1 in the acquisition memory correspond in timing to BM0 and Bm0 in the comparison memory, A2 and A3 correspond in timing to BM1 and Bm1, and so on. In step 86, the pointers of the acquisition memory and comparison memory are set to 0, and in step 88, an out flag (a flag indicating that the storage contents of the acquisition memory, that is, the signal under test is not included in the storage contents of the comparison memory, that is, the permissible range) is set. ) to 0.

Since the maximum value BM and the minimum value Bm are stored in the order of comparison memory, in step 90,
Comparison data of the maximum value indicated by the pointer (e.g.
The CPU 24 reads comparison data (for example, Bm0) of the next minimum value of the pointer (BM0) and the next minimum value of the pointer. In step 92, the acquired data (for example A0) is
is read by the CPU 24. CPU24 is at step 94,
It is determined whether the captured data (A0) is outside the range of the maximum value MAX (BM0) and minimum value min (Bm0) read in step 90. If yes, step 96
to set the out flag to 1 (for example, in the case of the solid line waveform in FIG. 5). Also if no and step 96
After processing, the process proceeds to step 98, where the pointer for only the acquisition memory is advanced by one. At step 100, it is determined whether the capture memory pointer is the corner number. As mentioned above, the comparison memory and the acquisition memory correspond to every two address locations, so if no, the process returns to step 92 and the next acquisition data (e.g. A1) in the acquisition memory is compared to the previous acquisition data (e.g. A1). A0) and the same comparison data (e.g.
BM0 and Bm0). If YES in step 100, the process advances to step 102, where only the comparison memory pointer is advanced by +2. If, as determined in step 104, all the acquired data has not yet been processed, proceed to step 90 and process the next data (e.g.
BM1 and Bm1 and A2 and A3) are processed in the same manner as described above. If all the processing has been completed, the process proceeds to step 106, where it is determined whether or not to measure the signal under test if it is included between the overall maximum and minimum values of the reference signal, and steps 108 and 106 are performed, respectively.
Check out flag at 110. If the desired signal to be measured has not yet been stored, the process returns to step 84; otherwise, the process ends. Therefore, finally, the signal under test to be measured is stored in the acquisition memory, that is, the second storage means. Note that if the acquisition of the signal under test is terminated when the out flag is 1, the process may be terminated at step 96.

〔Effect of the invention〕

As described above, according to the present invention, when a desired tolerance range is set using a waveform storage device and a signal under test that is included or not included in this range is measured, it is easy to set the desired tolerance range even if the tolerance range differs in each part of the waveform. Allowable values can be set for

[Brief explanation of the drawing]

FIG. 1 is a schematic flowchart explaining the present invention, FIGS. 2A to 2C and 3A to 3B are
Detailed flow chart for each step in Figures 4 and 5.
6 is a waveform diagram for explaining the present invention, FIG. 6 is a diagram showing the contents stored in a memory for explaining the present invention, and FIG. 7 is a block diagram of a waveform storage device using the present invention. In the figure, 18 is a memory serving as first and second storage means.

Claims (1)

[Claims] 1. Change the reference signal, capture the same timing part of the reference signal each time the reference signal is changed, and calculate the overall maximum and minimum values of each part of the reference signal captured multiple times. a part of the signal to be measured corresponding to the captured part of the reference signal is stored in a second storage means;
The signal under test stored in the storage means and the first
The maximum value and the minimum value stored in the storage means are compared until the signal under test is included between the maximum value and the minimum value, or the signal under test is included between the maximum value and the minimum value. A signal measuring method characterized in that the signal under test is repeatedly stored in the second storage means until the signal under test is no longer stored.