JPH0318363B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a variable gain amplifier in a semiconductor integrated circuit.

An example of a conventional circuit will be described with reference to FIG.

In FIG. 1, a resistor 9 is connected between the emitter of a transistor 1 constituting a common emitter amplifier circuit and a reference potential point 22.
A terminal 14 is connected to the base of. Further, the collector of the transistor 1 is connected to the emitters of a transistor 3 and a transistor 4 having the same conductivity type as the transistor 1. The emitter of a transistor 2 having the same conductivity type as the transistor 1 is connected to a reference potential point 22 via a resistor 9 and a resistor 10 having the same resistance value, and the base of the transistor 2 is connected to a terminal 15.
Furthermore, the emitters of a transistor 5 and a transistor 6, which have the same conductivity type as the transistor 2, are connected to the collector of the transistor 2. The base of transistor 3 is connected to transistor 6.
The base of the transistor 4 and the terminal 16 are connected to each other, and the base of the transistor 4 is connected to the base of the transistor 5 and the terminal 17. transistor 4,
The collectors of the transistors 3 and 5 are connected to the power supply voltage supply point 21, and the bases of the transistors 7, which have a different conductivity type from the transistors 3 and 5, and the power supply voltage are connected to the collectors of the transistors 3 and 5, respectively. A resistor 11 is connected to the supply point 21, and transistor 3, transistor 4, transistor 5, and transistor 6 constitute a bidifferential circuit. A constant current source 13 is connected between the emitter of the transistor 7 and the power supply voltage supply point 21 and the emitter of the transistor 8 that constitutes the differential amplifier circuit. A resistor 12 is connected to the collector of the transistor 7 between a terminal 19 and a reference potential point 22, and a resistor 12 is connected to the collector of the transistor 8.
The collector of the transistor 8 is connected to a reference potential point, and the base of the transistor 8 is connected to a terminal 18.

The circuit shown in FIG. 1 includes a grounded emitter amplifier circuit using a transistor 1 and a resistor 11 as a load resistance, and a base potential difference between transistors 3, 4, 5, and 6 that constitute a double differential circuit. A gain control circuit that is given by the DC voltage applied to terminals 16 and 17 and changes the gain of the emitter-grounded amplifier circuit, and a single-ended type that is directly connected to the output of the emitter-grounded amplifier circuit. A variable gain amplifier is shown, which is configured with a differential amplifier circuit, with terminal 14 as a signal input and terminal 19 as an output.
Here, the terminal 15 and the terminal 18 are respectively terminals for supplying bias voltage. Assume that the potential of terminal 16 is higher than the potential of terminal 17, transistor 3 and transistor 6 are in a conductive state, and transistor 4 and transistor 5 are in a non-conductive state. At this time, assuming that the gain of the grounded emitter amplifier circuit using the transistor A1 is _G1 , _G1 is given by equation (1).

G ₁ = (1/g _n1 + R ₉ ) ^-1 × R ₁₁ ...(1) However, g _n1 : Transfer conductance, R ₉ : Resistance value of resistor 9 R ₁₁ : Resistance value of resistor 11 Here, transfer conductance g _n1 is expressed by equation (2).

g _n1 = q×I ₉ /kT×h _FE1 /1+h _FE1 ...(2) However, I ₉ : Current value flowing through resistor 9, h _FE1 : h _FE of transistor 1 q: Electron charge, k: Boltzmann constant T: Absolute temperature Also, if the gain of the differential amplifier circuit composed of transistor 7 and transistor 8 is G ₂ ,
G ₂ is expressed by equation (3).

G ₂ = g _n2 × R ₁₂ = q × I ₁₃ /4kT × h _FE7 /1 + h _FE7 × R ₁₂ ... (3) However, g _n2 : transfer conductance, R ₁₂ : resistance 1
2 resistance value I ₁₃ : Current value of constant current source 13, h _FE7 : h _FE of transistor 7 and transistor 8. Therefore, from equations (1) and (3), the overall gain of the amplifier shown in FIG. If G is G, then G=G ₁ + G ₂ ...(4).

Here, if the potential of the terminal 16 is changed and made equal to the potential of the terminal 17, the transistor 3,
Since transistor 4, transistor 5, and transistor 6 all become conductive, 1/2 of the current component I9 flowing through resistor ₉ flows through resistor 11, and the gain of the amplifier decreases by 6 dB. Furthermore, the terminal 16
the potential of the terminal 17 is lower than the potential of the terminal 17, the transistor 3 and the transistor 6 become non-conductive,
Since the current component I ₉ flowing through the resistor 9 when the transistors 4 and 5 become conductive is not transmitted to the collector circuit of the transistor 3, the gain attenuation rate of the gain control circuit using the double differential circuit becomes infinite. In this way, the gain can be changed depending on the voltage applied to the terminals 16 and 17.

In the conventional variable gain amplifier shown in FIG. 1, a bias voltage must be supplied to the base of transistor 2, that is, terminal 15, and the base of transistor 8, that is, terminal 18. A circuit was needed. Furthermore, in a direct-coupled amplifier as shown in FIG. 1, a highly accurate bias voltage is required in order to suppress the offset of the transistor, and it has been difficult to realize such a direct-coupled amplifier.

The object of the present invention is to eliminate the need for bias voltage,
Another object of the present invention is to provide a variable gain amplifier that can be directly connected and can be realized with a simple configuration.

According to the present invention, a gain control circuit whose current source is the output of the differential amplifier constituted by first and second transistors and the differential amplifier constituted by third to sixth bi-differential transistors. A variable gain amplifier comprising a double-ended differential type first amplifier and a differential type second amplifier that amplifies the output of the first amplifier, the base of the first transistor being an input terminal; the output of the second amplifier is used as an output terminal, and at least one of the base connection portions of the third and sixth transistors and the base connection portions of the fourth and fifth transistors is used as a control terminal;
There is obtained a variable gain amplifier characterized in that an input terminal of the second amplifier is connected to the collector connection portions of the third and fifth transistors and to the collector connection portions of the fourth and sixth transistors.

Next, the present invention will be explained in more detail with reference to the drawings.

FIG. 2 shows an embodiment of the present invention. In FIG. 2, the same parts as in FIG. 1 are given the same reference numerals.

Next, in FIG. 2, to explain the difference from the conventional circuit example of FIG. 1, transistor 23 and transistor 24 of the same conductivity type are
A double-end type differential amplifier circuit is constructed in which a resistor 11 and a resistor 25 are connected to a power supply voltage supply point 21 through a bidifferential circuit constituted by a transistor 6 and a resistor 11 and a resistor 25 as loads. A constant current source 26 is connected between the emitter of the transistor 23 and the emitter of the transistor 24 and the reference potential point 22.
is connected. A transistor 8 is connected to the collector of each of the transistor 4 and the transistor 6.
A resistor 25 having the same low resistance value as the resistor 11 is connected between the base of the resistor 11 and the power supply voltage supply point 21.

According to this embodiment of the present invention, transistor 3, transistor 4, transistor 5, and transistor 6 constitute a double-ended differential amplifier circuit and a double differential circuit including transistor 23, transistor 24, resistor 11, and resistor 25. A gain control circuit is constructed by controlling the base potential difference of each by a voltage applied to terminals 16 and 17, and a single-ended differential amplifier circuit is connected directly to the output of a double-ended differential amplifier circuit. Consisting of an amplifier circuit, terminal 14 and terminal 20
A variable gain amplifier is configured, with the terminal 19 serving as a signal input and the terminal 19 serving as an output.

Assuming that the differential amplifier circuit including the transistor 23 and the transistor 24 is G ₃ , GG ₃ is expressed by equation (5).

G ₃ = g _n3 × R ₁₁ = q × I ₂₆ /2kT × h _FE23 /1 + h _FE23 × R ₁₁ ... (5) However, g _n3 : transfer conductance, R ₁₁ : resistance
Resistance value of R ₁₁ and resistor R ₂₅ I ₂₆ : Current value of constant current source 26, h _FE23 : Transistor 23 and transistor 24
h _FE Further, the gain G ₂ of the differential amplifier circuit composed of transistor 7 and transistor 8 is expressed by the above equation (3). Therefore, from equations (5) and (3), if the overall gain of the amplifier shown in FIG. 2 is _GT , then _GT is expressed by equation (6).

G _T =G ₃ +G ₂ ...(6) Here, the transistor 3 configuring the bi-differential circuit is connected to the collector of each of the transistor 23 and the transistor 24 configuring the differential amplifier circuit,
The collector currents of transistor 4, transistor 5, and transistor 6 are respectively I _C3 , I _CC4 ,
Assuming that I _C5 and I _C6 and the potentials of terminals 16 and 17 are V ₁₆ and V ₁₇ respectively, the collector current of each transistor in the double differential circuit is expressed by equations (7) to (10). .

I _C3 I ₂₃ /1 + exp + (V ₁₇ −V ₁₆ )・q/kT …(7) I _C4 I ₂₃ /1+exp− (V ₁₇ −V ₁₆ )・q/kT …(8) I _C5 I ₂₅ − I ₂₃ /1 + exp− (V ₁₇ −V ₁₆ )・q/kT……
(9) I _C6 I ₂₆ −I ₂₃ /1+exp+(V ₁₇ −V ₁₆ )・q/kT……
(10) However, I ₂₃ C: Collector current of transistor 23 Also, transistor 2 configuring the differential amplifier circuit
Resistor 11 and resistor 25 which serve as loads of 3 and 24
Assuming that the currents flowing in are I ₁₁ and I ₂₅ respectively, the above
From equations (7) to (10), the current is expressed by equations (11) and (12).

I ₁₁ I _C3 + I _C5 ……(11) I ₂₅ I _C4 + I _C6 ……(12) From this, if the gain attenuation due to the double differential circuit is A, then formulas (13) and (14) hold true. .

G _T1 = G _T × A = (G ₃ + G ₂ ) × A ... (13) A = I ₁₁ - I ₂₅ / J ₂₆ ... (14) In equation (13), G _T1 is the double differential The total gain is shown when considering the gain control circuit. That is, when transistors 3 and 6 are in a conductive state and transistors 4 and 5 are in a non-conductive state, collector currents I _C4 and I _C5 of transistors 4 and 5 do not flow, so from equation (13) above, this Total gain G′ _T1
is expressed by equation (15).

G' _T1 = G _T × A = (G ₃ + G ₂ ) × I _C3 − I _C6 / I ₂₆ ... (15) Also, the potentials of terminal 16 and terminal 17 V ₁₆ ,
When V ₁₇ are equal, formula (16) holds from formulas (7) to (12). I ₁₁ = I ₂₅ ...(16) Therefore, the total gain G'' _T1 in this case is calculated by formula (17). It is expressed as

G″ _T1 = G _T × A = (G ₃ + G ₂ ) × O/I ₂₆ (17) Therefore, at this time, the amount of gain attenuation of the gain control circuit using the double differential circuit becomes infinite.

The embodiment shown in FIG. 2 is characterized in that the gain attenuation factor can be made infinite when the potentials at terminals 16 and 17 become equal.

Furthermore, according to the present invention, the bias circuit that was conventionally required is no longer necessary. Furthermore, the double-end type differential amplifier circuit configuration has a higher gain and is advantageous in terms of offset than the conventional circuit, and therefore, it is possible to easily realize a direct-coupled amplifier. Furthermore, it is clear that if the present invention is constructed using a semiconductor integrated circuit, it will not only be more effective against offset in terms of element matching, but also a variable gain amplifier that can be realized directly at low cost.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a conventional example, and FIG. 2 is a circuit diagram showing an embodiment of the present invention. 1-8, 23-24...transistor, 9-1
2, 25... Resistor, 13, 26... Constant current source, 1
4-20...Terminal, 21...Power supply voltage supply point, 2
2...Reference potential point.

Claims (1)

[Claims] 1. A double-ended device comprising a differential amplifier composed of first and second transistors, and a gain control circuit whose current source is the output of the differential amplifier composed of third to sixth double differential transistors. In a variable gain amplifier comprising a differential first amplifier and a differential second amplifier that amplifies the output of the first amplifier, the base of the first transistor is an input terminal, and the second amplifier The output of the second amplifier is used as an output terminal, at least one of the base connection portions of the third and sixth transistors and the base connection portions of the fourth and fifth transistors is used as a control terminal, and the input terminal of the second amplifier is used as the control terminal. A variable gain amplifier characterized in that the variable gain amplifier is connected to the collector connection portions of the third and fifth transistors and to the collector connection portions of the fourth and sixth transistors.