JPH0318365B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Description of the Technical Field] The present invention relates to a gain control circuit in a transistor circuit.

[Description of prior art]

Conventionally, this type of circuit is known as shown in FIG. In FIG. 1, transistors 1 and 2 of the same conductivity type constitute a differential circuit, the emitter of transistor 1 and the emitter of transistor 2 are commonly connected, and this connection point and a reference potential point 3
A constant current source 4 is connected between the two. A terminal 6 and a terminal 7 are connected to the bases of each of the transistors 1 and 2, respectively. Also,
The base of a transistor 8 is connected to the collector of the transistor 1, and a resistor 10 is connected between the collector of the transistor 1 and a power supply voltage supply point 9. The base of a transistor 11 forming a differential circuit with the transistor 8 is connected to the collector of the transistor 2, and a resistor having a resistance equal to that of the resistor 10 is connected between the collector of the transistor 2 and the power supply voltage supply point 9. 12 are connected.

Resistors 14 and 15 are connected to the emitters of the transistors 8 and 11, respectively.
is connected, and the other end of this resistor 15 is connected to the resistor 14.
The other end and the collector of transistor 16 are connected. A terminal 17 is connected to the collector of the transistor 11, and a resistor 18 is connected between it and the power supply voltage supply point 9. Further, the collector of the transistor 8 is connected to the power supply voltage supply point 9.
It is connected to the. Further, the transistor 16
Terminal 19 is connected to the base of , and the emitter is connected to reference potential point 3 .

This conventional circuit has a terminal 19 as a signal input terminal, a terminal 17 as an output terminal, and a transistor 11 of a differential circuit type that constitutes a collector circuit of an emitter-grounded amplifier circuit including a transistor 16 with a resistor 18 as a load. and the base of transistor 8, transistors 1 and 2 whose control inputs are the DC voltages applied to terminals 6 and 7;
A gain control circuit is constructed by applying a potential difference using the output of the differential circuit and changing the current flowing through the resistor 18 to control the gain of the amplifier circuit of the grounded emitter.

Here, the potential of the terminal 6, that is, the base potential of the transistor 1, is _V1 , the potential of the terminal 7, that is, the base potential of the transistor 2 is _V2 , and the collector currents of the transistors 1 and 2 are I _C1 and I, respectively. Assuming _C2 , this collector current is expressed by equations (1) and (2), respectively.

I _C1 I ₄ /1 + exp + (V ₂ −V ₁ )・q/kT …(1) I _C2 I ₄ /1+exp− (V ₂ −V ₁ )・q/kT …(2) However, I ₄ : Current value of constant current source 4, q: electron charge, k: Boltzmann constant, T: absolute temperature Collector current of each of transistors 1 and 2 and resistors 10 and 12 expressed by equations (1) and (2) above The differential type transistor 11 constitutes the collector circuit of the transistor 16 which constitutes the emitter grounded amplifier circuit due to the voltage drop between the
and 8 base voltages are given. Assuming that the base potentials of transistors 11 and 8 are V ₁₁ and V ₈ respectively, the base potential is (3)
It is expressed by equation (4).

V ₁₁ = V _B −I _C2 ×R = V _B −I ₄ /1+exp−(V ₂ −V ₁ )・q/kT×R
...(3) V ₈ = V _B - I _C1 × R = V _B - I ₄ /1 + exp + (V ₂ - V ₁ )・q/kT × R
...(4) However, R: resistance value of resistor 10 and resistor 12 V _B : voltage at power supply voltage supply point 9 If the collector current of transistor 11 is I _C11 from equations (3) and (4), then this collector The current is expressed by equation (5).

I _C11 I ₁₆ /1+exp+(V ₈ -V ₁₁ )・q/kT ...(5) However, I ₁₆ : Emitter current value of transistor 16 Here, transistor 16 and resistor constituting the amplification circuit with the grounded emitter If the voltage gain due to 18 is G _V , then from equation (5), this voltage gain is (6)
It is expressed by the formula.

G _V g _n ×R ₁₈ = q × I _C11 /kT × h _FE /1 + h _FE ×R ₁₈ ... (6) However, g _n : Transfer conductance R ₁₈ : Resistance value of resistor 18 (6), that is, transistor Since the voltage gain due to G _V
is controlled by the voltage applied to terminals 6 and 7.

FIG. 2 shows the gain control circuit shown in FIG. 1 in which resistors 21 and 22 having the same resistance value are connected between the emitters of transistors 1 and 2 and constant current source 4, respectively. This improves the linearity of the transfer characteristic of the differential circuit formed by transistor 1 and transistor 2 with respect to the voltage applied to terminals 6 and 7.

However, in the conventional circuit example shown in FIGS. 1 and 2, as shown in FIG. 3, the control input versus output characteristics of the transistor 16 correspond to changes in the collector current of each of the transistors 1 and 2.
The voltage gain of the amplifier circuit according to the above has a drawback that linearity deteriorates near the point where the collector currents of transistors 1 and 2 are equal. This is because when the transistors 1 and 2 are both conductive, an offset effect occurs especially near the point where the base potentials of the transistors 1 and 2 are equal, and the transistor 1 and 2 are in a conductive state.
This is because the linearity of collector current change in No. 1 deteriorates.

[Explanation of purpose]

The present invention improves this point, and aims to provide a gain control circuit whose voltage gain change has good linearity with respect to the control voltage.

[Summary of the invention]

The present invention provides a first differential amplifier circuit including a first transistor and a second transistor connected in a common emitter configuration, with a differential input connected to each base and a differential output taken out from each collector; a second differential amplifier circuit including a third transistor and a fourth transistor connected in an emitter configuration and having a differential output of the first differential amplifier circuit connected to each base; and a signal input connected to the base. an amplifier circuit whose collector is connected to the emitter circuit of the second differential amplifier circuit, a gain control signal is connected to the differential input of the first differential amplifier circuit, and the gain control signal is connected to the differential input of the first differential amplifier circuit, and the gain control signal is connected to the differential input of the first differential amplifier circuit; In a gain control circuit whose signal output is the collector output of any transistor of the amplifier circuit, a first transistor whose collector and base are commonly connected to the collector and base of the first transistor of the first differential amplifier circuit, respectively. 5 transistor, and a sixth transistor whose collector and base are commonly connected to the collector and base of the second transistor, respectively, and includes a common emitter type third differential amplifier circuit, The differential amplifier circuit is characterized in that a resistor is connected in series to each emitter of the fifth and sixth transistors.

[Explanation based on examples]

An embodiment of the present invention will be described based on the drawings.
FIG. 4 is a block diagram of essential parts of an embodiment of the present invention. Transistor 2 with the same conductivity type as terminal 6
The bases of transistors 5 and 26 are connected to the terminal 7, and the bases of transistors 27 and 28 having the same conductivity type as the transistors 25 and 26 are connected to the terminal 7.
The transistors 25 and 27 and the transistors 26 and 28 constitute a differential circuit, respectively.

The emitters of the transistors 25 and 27 are connected to a resistor 29 and a resistor 3 having the same resistance value, respectively.
0 is connected to the other end of the resistor 29, and the resistor 3 is connected to the other end of the resistor 29.
0 and the other end of the constant current source 31 is connected between the reference potential point 3 and the reference potential point 3. Above transistor 2
The emitter of the transistor 28 is connected to the emitter of the transistor 6, and a constant current source 32 is connected between the emitter and the reference potential point 3. The base of the transistor 8 is connected to the collectors of the transistors 25 and 26, and a resistor 10 is connected between the collectors and the power supply voltage supply point 9. The transistors 27 and 2
8 is connected to the base of a transistor 11 forming a differential circuit with the transistor 8, and a resistor 12 is connected between it and a power supply voltage supply point 9.

Other points are the same as the conventional example shown in Fig. 1,
The same reference numerals indicate the same items.

This embodiment constitutes a gain control circuit in which terminals 6 and 7 are used as control input terminals, terminal 19 is used as a signal input terminal, and terminal 17 is used as an output terminal. It is characterized in that two differential circuits having a common circuit are connected in parallel.

Here, the potentials of terminals 6 and 7 are set to V ₆ and V ₇ , respectively, and the collector currents of transistors 25 to 28 are set to I _C25 , I _C26 , and V 7 , respectively.
I _C27 and I _C28 . At this time, the transistor 26
and the collector currents I _C26 and I _C28 of 28 are respectively
It is expressed by equations (7) and (8).

I _C26 I ₃₂ /1 + exp + (V ₇ −V ₆ )・q/kT …(7) I _C28 I ₃₂ /1+exp− (V ₇ −V ₆ )・q/kT …(8) However, I ₃₂ : Current value of constant current source 32 Also, regarding collector currents I _C25 and I _C27 of transistors 25 and 27, potentials V ₆ and V ₇ of terminals 6 and 7, and current value I 31 of constant current source ₃₁ , (9) , Equation (10) holds true.

V ₇ −V ₆ = (V _BE27 − V _BE25 ) + (I _C27 × R ₂₉ − I _C25 ×
R ₂₉ ) ...(9) I _C25 + I _C27 = I ₃₁ ... (10) However, V _BE25 : Base of transistor 25 ~
Emitter voltage, R ₂₉ : Resistance value of resistors 29 and 30, V _BE27 : Base of transistor 27 ~
Emitter voltage In equation (9), base-emitter voltages V _BE25 and V _BE27 of transistors 25 and 27 are expressed by equations (11) and (12), respectively.

V _BE25 kT/qlnI _C25 /I _S ...(11) V _BE27 kT/qlnI _C27 /I _S ...(12) However, I _S : Saturation current of transistors 25 and 27 (10)
When equations (12) to (12) are substituted into equation (9) and solved for the collector currents of transistors 25 and 27, equations (13) and (14) are obtained.

I _C25 I ₃₁ /1+exp+(V ₇ −V ₆ )・q/kT−exp2
I _C27 −I ₃₁ )・q/kT……(13) I _C27 I ₃₁ /1+exp+(V ₇ −V ₆ )・q/kT−exp2
I _C27 −I ₃₁ )・q/kT...(14) Here, it is assumed that equation (15) holds between the current value I 32 of the constant current source ₃₂ and the current value I ₃₁ of the constant current source 31. do.

I ₃₁ −I ₃₂ >0 ...(15) Also, if the currents flowing through resistor 10 and resistor 12 are respectively ₁₀ and I ₁₂ , these currents I ₁₀ and I ₁₂ are (16)
It is expressed by equation (17).

I ₁₀ I _C25 + I _C26 ……(16) I ₁₂ I _C27 + I _C28 ……(17) Here, the above formulas (7) to (8), (13) to (14), and (16)
From equation (17), the voltage applied to terminals 6 and 7
Difference in collector current of transistor 25 and transistor 27 with respect to voltage difference between V ₆ and V ₇ I _C25 −
I _C27 , collector current difference I _C26 −I _C28 of transistor 26 and transistor 28, and resistor 10,
Changes in the difference I ₁₀ −I ₁₂ between the currents flowing through each of the resistors 12 are shown in FIG. 5 by solid lines and broken lines, respectively.

As shown in FIG. 5, the current difference I 10 −I 12 between the currents I ₁₀ and I ₁₂ flowing through the resistor ₁₀ and the resistor ₁₂ is the difference between the transistor 25, the transistor 27, and the transistor 26.
and transistor 28 are connected in parallel to terminals 6 and 7,
Compensation occurs near the point where the potentials of terminal 6 and terminal 7 become equal.

On the other hand, if the base potentials of transistors 11 and 8 are V ₁₁ ′ and V ₈ ′, respectively, V ₁₁ ′,
V ₈ ′ is expressed by equations (18) and (19).

V ₁₁ ′=V _B −I ₁₂ ×R ……(18) V ₈ ′=V _B −I ₁₀ ×R ……(19) From equations (18) and (19), the base voltage of transistors 11 and 8 The differential voltage between is expressed by equation (20).

V ₁₁ ′−V ₈ ′=(V _B −I ₁₂ ×R) −(V _B −I ₁₀ ×R)=(I ₁₀ −I ₁₂ )×R ……(20) From this, transistor 11, transistor 8
The change in the base potential difference of each of the resistors 10 and 1
This is a compensated change similar to the difference current between the currents I ₁₀ and I ₁₂ flowing through 2.

Therefore, as shown by G' _V in FIG. 5, voltage gain is achieved by compensating for the difference in base potential of transistors 11 and 8, so that the potentials of terminals 6 and 7, which are control inputs, are equal in the conventional circuit example. The deterioration of the linearity of the voltage gain change, which was a problem in the vicinity of this point, is compensated for and the linearity is improved.

[Explanation of effects]

As described above, according to the present invention, it is possible to easily realize a gain control circuit with excellent followability to control inputs. In particular, it exhibits excellent effects in gain control circuits such as AM and FM receivers.

Furthermore, if the present invention is applied to a semiconductor integrated circuit,
It is easy to match each element, and a gain control circuit with better followability to control input can be realized at low cost.

[Brief explanation of the drawing]

FIG. 1 and FIG. 2 are main circuit configuration diagrams of a conventional example. FIG. 3 is a diagram showing control input versus output characteristics of a conventional example. FIG. 4 is a diagram showing the main circuit configuration of an embodiment of the present invention.
FIG. 5 is a control input versus output characteristic diagram of the above embodiment. 1, 2, 8, 11, 16, 25-28...transistor, 3...reference potential point, 4,31,32...constant current source, 9...power supply voltage supply point.

Claims (1)

Claims: 1. A first differential transistor comprising a first transistor 26 and a second transistor 28 connected in a common emitter configuration, with a differential input connected to each base and a differential output taken from each collector. an amplifier circuit; and a second differential amplifier circuit including a third transistor 11 and a fourth transistor 8 connected in a common emitter configuration and having differential outputs of the first differential amplifier circuit connected to respective bases. , an amplifier circuit 9 having a signal input connected to the base and a collector connected to the emitter circuit of the second differential amplifier circuit, and a gain control signal connected to the differential input of the first differential amplifier circuit. and in a gain control circuit whose signal output is the collector output of any transistor of the second differential amplifier circuit, the collector and base of the first transistor 26 of the first differential amplifier circuit are respectively connected to the collector output of the first transistor 26 of the first differential amplifier circuit. a fifth transistor 25 whose collector and base are commonly connected; and the second transistor 28
includes a sixth transistor 27 whose collector and base are commonly connected to the collector and base of the transistor, respectively, and is provided with a third differential amplifier circuit of a common emitter type; A gain control circuit characterized in that a resistor is connected in series to each emitter of the transistor No.6.