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JPH0325051B2 - - Google Patents
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JPH0325051B2 - - Google Patents

Info

Publication number
JPH0325051B2
JPH0325051B2 JP8964284A JP8964284A JPH0325051B2 JP H0325051 B2 JPH0325051 B2 JP H0325051B2 JP 8964284 A JP8964284 A JP 8964284A JP 8964284 A JP8964284 A JP 8964284A JP H0325051 B2 JPH0325051 B2 JP H0325051B2
Authority
JP
Japan
Prior art keywords
circuit
level
agc
signal
pilot signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP8964284A
Other languages
Japanese (ja)
Other versions
JPS60233916A (en
Inventor
Toshiharu Yasuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP8964284A priority Critical patent/JPS60233916A/en
Publication of JPS60233916A publication Critical patent/JPS60233916A/en
Publication of JPH0325051B2 publication Critical patent/JPH0325051B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control

Landscapes

  • Control Of Amplification And Gain Control (AREA)

Description

【発明の詳細な説明】 (発明の技術分野) 本発明は信号伝送システムの受信部で使用する
自動利得制御回路(以下「AGC回路」という)
さらに詳しくいえば、入力信号の低レベル域にお
けるAGC特性(入力信号のレベル変化に対する
る出力信号レベルの安定化特性)の改善を考慮し
たAGC回路に関する。
[Detailed Description of the Invention] (Technical Field of the Invention) The present invention relates to an automatic gain control circuit (hereinafter referred to as "AGC circuit") used in a receiving section of a signal transmission system.
More specifically, the present invention relates to an AGC circuit that takes into consideration the improvement of AGC characteristics (stabilizing characteristics of the output signal level with respect to changes in the level of the input signal) in the low level range of the input signal.

(従来技術) 第5図に従来より広く用いられているAGC回
路の構成を示す。従来の回路は、利得制御回路1
0,パイロツト信号検出回路11および比較増幅
回路12よりなるループ系で構成され、パイロツ
ト信号検出回路11により出力信号e2よりパイロ
ツトレベルを検出し、基準レベルe4と比較してe3
がe4と一致するべく制御を行なつている。
(Prior Art) Figure 5 shows the configuration of an AGC circuit that has been widely used in the past. The conventional circuit has a gain control circuit 1
0, consists of a loop system consisting of a pilot signal detection circuit 11 and a comparison amplifier circuit 12, the pilot signal detection circuit 11 detects the pilot level from the output signal e2 , compares it with the reference level e4 , and calculates e3.
is controlled so that it matches e 4 .

第6図は従来のAGC回路における入力信号レ
ベル対出力信号レベル特性、すなわちAGC特性
の典型例を示す図である。本図から明らかなよう
に、第5図ではAGCループの安定性の点よりル
ープ特性を大小方向にむやみに大きく設定できな
いため、AGC範囲の両端(入力信号の高レベル
域および低レベル域)で出力信号レベルの変化は
大きくならざるを得ないという現状であつた。
FIG. 6 is a diagram showing a typical example of input signal level versus output signal level characteristics, ie, AGC characteristics, in a conventional AGC circuit. As is clear from this figure, in Figure 5, the loop characteristics cannot be set unnecessarily large in the direction of magnitude due to the stability of the AGC loop. The current situation was that the change in output signal level had to be large.

(発明の目的) 本発明の目的は、AGC回路の入力点で、AGC
用のパイロツト信号レベルにオフセツトレベルを
付加することにより、従来のAGC回路と同じル
ープ利得で入力信号の低レベル域におけるAGC
特性を改善できるAGC回路を提供することにあ
る。
(Object of the invention) The object of the invention is to
By adding an offset level to the pilot signal level for the input signal, AGC in the low level range of the input signal can be achieved with the same loop gain as the conventional AGC circuit.
The objective is to provide an AGC circuit whose characteristics can be improved.

(発明の構成) 前記目的を達成するために本発明による自動利
得制御回路はパイロツト信号検出回路により自動
利得制御用のパイロツト信号を検出し、このパイ
ロツト信号と基準レベルとを比較増幅回路で比較
し、その出力によつて利得制御回路を制御するこ
とにより前記パイロツト信号のレベルが一定にな
るように利得制御する自動利得制御回路におい
て、前記利得制御回路の前段にて入力信号にオフ
セツトレベルを付加する手段を設け、このオフセ
ツトレベルの値を入力信号のレベル変化に対する
出力信号のレベル変化が最小になるように設定し
てある。
(Structure of the Invention) In order to achieve the above object, the automatic gain control circuit according to the present invention detects a pilot signal for automatic gain control using a pilot signal detection circuit, and compares this pilot signal with a reference level using a comparison amplifier circuit. , in an automatic gain control circuit that performs gain control so that the level of the pilot signal is constant by controlling a gain control circuit using its output, an offset level is added to the input signal at a stage before the gain control circuit. The value of the offset level is set so that the level change of the output signal with respect to the level change of the input signal is minimized.

前記構成によれば本発明の目的は完全に達成さ
れる。
According to the above configuration, the object of the present invention is completely achieved.

(実施例) 以下、図面を参照して本発明をさらに詳しく説
明する。
(Example) Hereinafter, the present invention will be described in more detail with reference to the drawings.

第1図は本発明によるAGC回路の基本構成を
示す回路図である。オフセツト付加回路4はオフ
セツトレベルを付加する手段であり、このオフセ
ツト付加回路4において入力信号に含まれるレベ
ルepのパイロツト信号にオフセツトレベル△ep
が減算の形で付加される。これにより利得制御回
路1へ入力されるパイロツト信号のレベルはep
−△epとなる。オフセツトレベル△epの効果は
ep≫△epなる範囲、すなわち入力信号レベルの
大きい範囲では無視され、従来と同様のAGC特
性が得られる。しかし、入力信号レベルが低下し
ていき、パイロツト信号レベルepがオフセツト
レベル△epに近づくにしたがつて△epの効果が
表われ、AGC回路は実際の入力レベルよりも△
epだけ低いレベルが入力されていると判別し、
この分だけ利得を上げるように利得制御回路1を
制御する。したがつて、出力信号のレベルは従来
の方法に比べてep/(ep−△ep)倍されたもの
となり、入力信号の低レベル域でのAGC特性が
改善されたAGC回路を実現できる。ここで、オ
フセツトレベル△epの値によつてAGC特性が変
わることは明らかであり、第2図の測定例に示す
ように最適値が存在するので、この値に設定する
必要がある。
FIG. 1 is a circuit diagram showing the basic configuration of an AGC circuit according to the present invention. The offset adding circuit 4 is a means for adding an offset level, and this offset adding circuit 4 adds an offset level Δep to the pilot signal of the level ep included in the input signal.
is added in the form of subtraction. As a result, the level of the pilot signal input to the gain control circuit 1 is ep
−△ep. The effect of offset level △ep is
In the range ep≫△ep, that is, in the range where the input signal level is large, it is ignored, and the same AGC characteristics as the conventional one can be obtained. However, as the input signal level decreases and the pilot signal level ep approaches the offset level △ep, the effect of △ep appears, and the AGC circuit becomes △lower than the actual input level.
It is determined that a level lower than ep is input,
The gain control circuit 1 is controlled to increase the gain by this amount. Therefore, the level of the output signal is multiplied by ep/(ep-Δep) compared to the conventional method, and it is possible to realize an AGC circuit with improved AGC characteristics in the low level region of the input signal. Here, it is clear that the AGC characteristics change depending on the value of the offset level Δep, and since an optimum value exists as shown in the measurement example of FIG. 2, it is necessary to set it to this value.

第3図は本発明によるAGC回路の実施例を示
す回路図で、伝送信号の帯域外に重畳された正弦
波信号をAGC用パイロツト信号にする場合の例
である。発振回路5はパイロツト信号として用い
ている正弦波信号と同一の周波数を有する正弦波
を発生し、オフセツト付加回路9にオフセツトレ
ベルを供給するものである。オフセツトレベルを
付加する手段は、これら回路,オフセツト付加回
路9と発振回路5よりなる。他の構成は第1図の
場合と同様である。前述のようにオフセツトレベ
ルを最適値に設定することにより、入力信号の低
レベル域でのAGC特性が改善される。なお、発
振回路5の出力信号は入力パイロツト信号に対し
周波数のみでなく、位相も一致させておく必要が
ある。これは発振回路5に位相同期機能を設け、
入力信号からバンドパスフイルタにより分離した
パイロツト信号を入力して位相同期発振回路とす
ることにより解決できる。
FIG. 3 is a circuit diagram showing an embodiment of an AGC circuit according to the present invention, in which a sine wave signal superimposed outside the band of a transmission signal is used as an AGC pilot signal. The oscillation circuit 5 generates a sine wave having the same frequency as the sine wave signal used as the pilot signal, and supplies an offset level to the offset adding circuit 9. The means for adding an offset level consists of these circuits, the offset adding circuit 9 and the oscillation circuit 5. The other configurations are the same as in the case of FIG. By setting the offset level to the optimum value as described above, the AGC characteristics in the low level range of the input signal are improved. Note that the output signal of the oscillation circuit 5 must match the input pilot signal not only in frequency but also in phase. This is done by providing a phase synchronization function in the oscillation circuit 5,
This problem can be solved by inputting a pilot signal separated from the input signal by a bandpass filter to form a phase-locked oscillator circuit.

第4図は本発明の他の実施例を示す図で、光通
信装置の受信部に適用した場合である。入力光信
号の平均レベルをAGC用のパイロツト信号とし
ており、オフセツトレベルを付加する手段は初段
増幅回路8と可変抵抗器7よりなる。入力光信号
は受光素子6により電気信号に変換された後、初
段増幅回路8で増幅されてAGC回路へ供給され
る。この実施例では付加するオフセツトレベルが
直流電圧で良いので、適当な電圧点に接続された
可変抵抗器7を初段増幅回路8のオフセツト電圧
調整端子に接続し、これを調整することにより初
段増幅回路8の出力にオフセツトレベルを付加し
ている。
FIG. 4 is a diagram showing another embodiment of the present invention, in which the present invention is applied to a receiving section of an optical communication device. The average level of the input optical signal is used as a pilot signal for AGC, and means for adding an offset level consists of a first stage amplifier circuit 8 and a variable resistor 7. The input optical signal is converted into an electrical signal by the light receiving element 6, and then amplified by the first stage amplifier circuit 8 and supplied to the AGC circuit. In this embodiment, the offset level to be added can be a DC voltage, so the variable resistor 7 connected to an appropriate voltage point is connected to the offset voltage adjustment terminal of the first stage amplifier circuit 8, and by adjusting this, the first stage amplifier An offset level is added to the output of the circuit 8.

(発明の効果) 以上、詳しく説明したように本発明によれば、
AGCループのループ利得を変えることなく入力
信号の低レベル域におけるAGC特性を改善でき
るAGC回路を実現できる。
(Effects of the Invention) As described above in detail, according to the present invention,
It is possible to realize an AGC circuit that can improve AGC characteristics in the low level range of input signals without changing the loop gain of the AGC loop.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明によるAGC回路の基本回路図、
第2図は本発明によるAGC回路のAGC特性を説
明するための図、第3図,第4図は本発明の第
1,第2の実施例を示す回路図、第5図は従来の
AGC回路の基本回路図、第6図は第5図のAGC
回路の特性を示す図である。 1……利得制御回路、2……パイロツト信号検
出回路、3……比較増幅回路、4,9……オフセ
ツト付加回路、5……発振回路、6……受光素
子、7……可変抵抗器、8……初段増幅回路。
Figure 1 is a basic circuit diagram of the AGC circuit according to the present invention.
Figure 2 is a diagram for explaining the AGC characteristics of the AGC circuit according to the present invention, Figures 3 and 4 are circuit diagrams showing the first and second embodiments of the present invention, and Figure 5 is a diagram for explaining the AGC characteristics of the AGC circuit according to the present invention.
The basic circuit diagram of the AGC circuit, Figure 6 is the AGC shown in Figure 5.
FIG. 3 is a diagram showing characteristics of a circuit. DESCRIPTION OF SYMBOLS 1... Gain control circuit, 2... Pilot signal detection circuit, 3... Comparison amplifier circuit, 4, 9... Offset addition circuit, 5... Oscillation circuit, 6... Light receiving element, 7... Variable resistor, 8...First stage amplifier circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 パイロツト信号検出回路により自動利得制御
用のパイロツト信号を検出し、このパイロツト信
号と基準レベルとを比較増幅回路で比較し、その
出力によつて利得制御回路を制御することにより
前記パイロツト信号のレベルが一定になるように
利得制御する自動利得制御回路において、前記利
得制御回路の前段にて入力信号にオフセツトレベ
ルを付加する手段を設け、このオフセツトレベル
の値を入力信号のレベル変化に対する出力信号の
レベル変化が最小になるように設定したことを特
徴とする自動利得制御回路。
1 A pilot signal for automatic gain control is detected by a pilot signal detection circuit, this pilot signal is compared with a reference level by a comparison amplifier circuit, and the level of the pilot signal is determined by controlling a gain control circuit using the output of the comparison amplifier circuit. In an automatic gain control circuit that controls the gain so that An automatic gain control circuit characterized by being set so that signal level changes are minimized.
JP8964284A 1984-05-04 1984-05-04 Automatic gain control circuit Granted JPS60233916A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8964284A JPS60233916A (en) 1984-05-04 1984-05-04 Automatic gain control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8964284A JPS60233916A (en) 1984-05-04 1984-05-04 Automatic gain control circuit

Publications (2)

Publication Number Publication Date
JPS60233916A JPS60233916A (en) 1985-11-20
JPH0325051B2 true JPH0325051B2 (en) 1991-04-04

Family

ID=13976421

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8964284A Granted JPS60233916A (en) 1984-05-04 1984-05-04 Automatic gain control circuit

Country Status (1)

Country Link
JP (1) JPS60233916A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4875045A (en) * 1988-03-09 1989-10-17 Northern Telecom Limited Variable gain encoder apparatus and method

Also Published As

Publication number Publication date
JPS60233916A (en) 1985-11-20

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