JPH0331288B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a voltage detection circuit in a noise reduction device for removing pulse noise contained in audio signals and the like.

Generally, in an FM receiver or the like, the audio signal obtained on the output side contains pulse noise, and a noise reduction device is used to remove this noise. Conventional noise reduction devices of this type have a first
As shown in the figure, a low-pass filter 2, a gate circuit 3, a buffer circuit 4, a high-pass filter 5, an amplifier 6 (hereinafter simply referred to as amplifier 6) having a rectification function and variable gain function for smoothing pulse signals, and automatic gain control. (AGC circuit) 7, a trigger pulse generation circuit 8, and a constant voltage circuit 10. T ₁ to T ₆ indicate terminals of the voltage detection section 12 surrounded by dotted lines. According to this example, if pulse noise is mixed in the audio input signal added from input terminal 1, the audio signal passes through low-pass filter 2 together with the noise, but the high-frequency components of the noise pass through high-pass filter 5. through amplifier 6
is amplified. This amplified output is applied to the trigger pulse generation circuit 8, and the trigger pulse generated here turns off the gate circuit 3, so that the audio signal containing pulse noise is blocked by the gate circuit 3. ing.

By the way, if pulse noise is included in the audio signal and is continuously applied from the input terminal 1, the gate circuit 3 remains off, causing the audio output to stop for a long time. In order to avoid such problems, an AGC circuit 7 is provided. Now, when the amplifier 6 continuously amplifies the high frequency component of the noise,
The AGC circuit 7 operates to lower the gain of the amplifier 6 and lower the input to the trigger pulse generation circuit 8, so that trigger pulses are not generated continuously. However, in order to perform this function properly, the detection level of the trigger pulse generation circuit 8 and
The issue of the setting ratio with the AGC detection level is very important. Figure 2 shows the trigger pulse detection level V _TRG
This shows the relationship between AGC detection level V _AGC , and normally V _TRG /V _AGC is set to a value of 3 to 5.

FIG. 3 shows a specific circuit diagram of the voltage detection circuit constituted by the AGC circuit 7 and the trigger pulse generation circuit 8 in FIG. 1.
In this figure, the AGC circuit 7 and the trigger pulse generation circuit 8 are connected by transistor circuits shown in broken lines, and the constant voltage circuit 1
0 is added. According to this circuit, the voltages V ₁ to _{V 6} of each part that determine the trigger pulse detection level and the AGC detection level are obtained by dividing the constant voltage V ₀ by resistors, respectively, using the following formula: V ₁ = V ₀ · R ₃ / R ₂ +R ₃ …(1) V ₂ =V ₀・R ₅ +R ₆ /R ₄ +R ₅ +R ₆ …(2) V ₃ =V ₀・R ₆ /R ₄ +R ₅ +R ₆ …(3 ) V ₄ =V ₀・R ₉ /R ₈ +R ₉ …(4) V ₅ =V ₀・R ₁₁ +R ₁₂ /R ₁₀ +R ₁₁ +R ₁₂ …(5) V ₆ =V ₀・R ₁₂ / R ₁₀ + R ₁₁ + R ₁₂ ...(6) is given. Therefore, the trigger pulse detection level V _TRG and AGC detection level V _AGC are calculated by the following formula: V _TRG = V ₂ − _{V 1} and V ₁ − V ₃ ...(7) V _AGC = V ₅ − V ₄ and V ₄ − V ₆ ......(8) can be expressed. Now, when a voltage higher than V _TRG (therefore a voltage higher than V _AGC ) is input from the output side of amplifier 6 via terminals T ₁ and T ₃ , transistors Q ₂ , Q ₄ and Q ₆ , Q ₈ are turned on. Q ₁ , Q ₃ ,
With Q ₅ and Q ₇ turned off, the trigger pulse voltage and the gain control voltage of the amplifier 6 appear at terminals T ₂ and T ₄ , respectively. The trigger pulse voltage appearing at terminal T ₂ is sent to gate circuit 3 to turn it off and to terminal T ₄
The gain control voltage appearing at reduces the voltage gain of the amplifier 6. Also, when there is no noise input or a small voltage that is less than V _AGC (therefore, less than V _TRG ), transistors Q ₁ , Q ₃ , Q ₅ , Q ₇
is turned on, Q ₂ , Q ₄ , Q ₆ , and Q ₈ are turned off and are not output to terminals 2 and 4, so that the operations of gate circuit 3 and amplifier 6 do not change. Furthermore, when the noise input is greater than V _AGC but less than V _TRG , transistors Q ₂ , Q ₄ , Q ₅ , and Q ₇ are turned on, and Q ₁ ,
Q ₃ , Q ₆ , and Q ₈ are turned off. Therefore, an output is generated at terminal _T2 and turns off the gate circuit 3, but the terminal
No output is produced at T ₄ and amplifier 6 operates normally.

However, in such a conventional voltage detection circuit, firstly, the reference voltages V ₁ and V ₄ are determined by resistor division, so they cannot be directly connected to the amplifier 6 and require capacitors C ₁ and C ₂ . When making an IC multi-functional, the number of terminals increases. Second, resistors R ₂ and R ₃ .
Since R ₈ and R ₉ determine the reference voltage and at the same time serve as input resistances, they must have high resistances of 50 kΩ to 100 kΩ, which imposes restrictions on circuit design. Furthermore, thirdly, there were many drawbacks in that it was difficult to vary the potentials of V ₁ to V ₆ .

The purpose of the present invention is to eliminate the above-mentioned conventional drawbacks, make it possible to vary the detection level, increase the input impedance regardless of the level setting, and reduce the number of terminals, thereby making it easier to standardize the circuit and integrate it into an IC. An object of the present invention is to provide a voltage detection circuit in a noise reduction device that can be used to reduce noise.

According to the present invention, the first transistor has at least three collectors and allows a reference current to flow through the first collector; The first resistor causes current to flow into the collector through the resistor.
a second transistor of a conductivity type opposite to that of the transistor; and a second transistor of a conductivity type opposite to that of the first transistor; an input distribution circuit including a third transistor; and fourth to seventh transistors constituting the first differential pair, the bases of the fifth and sixth transistors are commonly connected; a trigger pulse generation circuit in which the collectors of the fifth and seventh transistors are commonly connected to serve as an output terminal; the ninth to eleventh transistors forming a second differential pair;
the first resistor of the input distribution circuit and the first resistor of the input distribution circuit; The connection point between the collector of the first transistor and the connection point between the second resistor and the collector of the second transistor are connected to the fourth transistor of the trigger pulse generation circuit, respectively.
and a base of the seventh transistor, a connection point between the third resistor and the collector of the first transistor, and a connection between the fourth resistor and the collector of the third transistor. The points are connected to the base of the eighth transistor and the base of the eleventh transistor of the AGC circuit, respectively, and the connection point of the first and second resistors of the input distribution circuit and the third
A reference voltage obtained from a noise input is applied to the connection point of the
A voltage detection circuit for a noise reduction device is obtained, characterized in that a noise input voltage is applied to the bases of the ninth and tenth transistors of the AGC circuit.

Next, examples of the voltage detection circuit of the noise reduction device according to the present invention will be described with reference to the drawings.

FIG. 4 shows a circuit diagram of an embodiment according to the present invention. Note that this voltage detection circuit is applied to the noise reduction device shown in FIG. 1 in the same way as the conventional example, but
The difference is that a circuit 7 is used in place of the AGC circuit 7, a circuit 8' is used in place of the trigger pulse generation circuit 8, and an input distribution circuit 11 is added between the circuit and the amplifier 6. First, to explain the right half of this input distribution circuit, constant current _I0 is taken out from multi-collector transistor _Q15 via transistor _Q16 . The first collector current of the multi-collector transistor Q ₁₅ flows into a transistor Q ₁₄ having a conductivity type opposite to that of this transistor Q ₁₅ .
The second collector current passes through resistors R ₂₁ and R ₂₂ to Q ₁₄
flows into the transistor _Q13 of the same conductivity type as the third
The collector current flows through resistors R ₁₈ and R ₁₉ into transistor Q ₁₂ which has a conductivity type opposite to that of Q ₁₅ . The bases of transistors Q ₁₂ to Q ₁₄ are commonly connected. In this way, due to the current mirror of multi-collector transistor Q ₁₅ and transistor Q ₁₆ , I ₀ /3 flows through each of the three collector circuits of Q ₁₅ , so that the voltage at the upper end of resistor R21, that is, the base voltage of transistor Q ₁ V ₁₀ , the voltage at the lower end of the resistor R ₂₂ ie V ₁₁ , the voltage at the upper end of the resistor R ₁₈ ie V ₁₂ , and the voltage at the lower end of the resistor R ₁₉ ie V ₁₃ are V ₁₀ = V ₈ + I ₀ /3·R ₂₁ ... …(9) V ₁₁ =V ₈ −I ₀ /3・R ₂₂ …(10) V ₁₂ =V ₈ +I ₀ /3・R ₁₈ …(11) V ₁₃ =V ₈ −I ₀ /3・R ₁₉ ...(12) becomes. As will be explained later, V ₈ is constant regardless of the presence or absence of noise, and none of V ₁₀ to _{V 13} fluctuate.
These voltages are V ₂ , V 3 , and V ₃ in Figure 3, respectively.
Corresponds to V ₅ and V ₆ .

Next, the left half of the input distribution circuit 11 will be described. The output potential V ₇ of the amplifier 6 is directly connected to the base of the transistor Q ₉ of the input distribution circuit 11 and applied. One of the emitter potentials of transistor Q ₉ is rectified by resistor R ₁₅ and capacitor C ₃ connected via terminal T ₇ , and then applied to the base of transistor Q ₁₀ . transistor Q ₁₀
The emitter potential V ₈ is applied to the series connection point of resistors R ₁₈ and R ₁₉ and the series connection point of R ₂₁ and R ₂₂ , respectively. The other emitter potential of transistor _Q9 is
It is applied to transistor _Q11 via resistor _R27 .
The emitter potential V ₉ of the transistor Q ₁₁ is the common base terminal of the transistors Q ₂ and Q ₃ of the trigger pulse generation circuit 8' and the transistors Q ₆ and Q ₇ of the AGC circuit 7'.
applied to the common base terminal of Here resistance R ₁₅
If the constants of R ₂₇ , R ₁₆ and R ₁₇ and transistors Q ₁₀ and Q ₁₁ are selected to be the same and matched, then when no noise input is applied to amplifier 6, V ₈ and V ₉
The potentials of will be equal. On the other hand, when a noise input is applied to amplifier 6 and the potential of V ₇ changes, V ₉
The potential of V ₇ fluctuates following the potential of V 7 , but the fluctuations in the potential of V ₈ are rectified by the filtering action of resistor R ₁₅ and capacitor C ₃ , and the DC potential does not change. The above is what is meant by the explanation that V ₈ is constant in the explanation of equations (9) to (12). Therefore, corresponding to equations (7) and (8) applied to the conventional circuit, the trigger pulse detection level V' _TRG and AGC detection level V' _AGC in this embodiment are expressed by equations (9) to ( 12), the following two equations V′ _TRG = I ₀ /3・R ₂₁ = I ₀ /3・R ₂₂ ...(13) V′ _AGC = I ₀ /3・R ₁₈ = It can be expressed as I ₀ /3·R ₁₉ (14). In addition, (13) above
And in equation (14), R ₂₁ = R ₂₂ , R ₁₈ = R ₁₉
shall be. And normally, V' _TRG /V' _AGC is set to a value of 3 to 5.

Next, the operations of the trigger pulse generating circuit 8' and the AGC circuit 7' will be explained. Now, when pulsed noise with a voltage _V7 is input from the output side of the amplifier 6, the emitter voltage _V8 of the transistor _Q10 is constant regardless of the presence or absence of the pulsed noise, and the emitter voltage V of the transistor _Q11 is ₉ is output with a magnitude according to V ₇ and is added to the common base of transistors Q ₂ and Q ₃ and to the common base of transistors Q ₆ and Q ₇ .

The noise output V ₇ of the amplifier 6 is outputted as a voltage V 9 to the emitter of the transistor Q 11 via the transistor Q ₉ and the resistor R ₂₇ , and the noise output V 7 is outputted as a voltage V ₉ to the emitter of the transistor Q ₁₁ through the transistor Q ₉ and the resistor R _27.
and the common base of transistor Q ₆ and transistor Q ₇ . If voltage V ₉ is greater than pulse detection level V _TRG , transistors Q ₂ , Q ₄ and Q ₆ , Q ₈ are turned on, Q ₁ , Q ₃ and Q ₅ , Q ₇ are turned off, and terminals T ₂ and T ₄ are turned on. produces an output. The trigger pulse voltage appearing at terminal T ₂ is sent to gate circuit 3 to turn it off, and the gain control voltage appearing at terminal T ₄ reduces the voltage gain of amplifier 6. Also, there is no noise input or it is small.
When a voltage lower than V _AGC is input, transistors Q ₁ , Q ₃ , Q ₅ , Q ₇ are turned on, and Q ₂ , Q ₄ , Q ₆ ,
_Q8 is turned off and is not output to terminals 2 and 4, and the operations of gate circuit 3 and amplifier 6 are not changed. Additionally, voltage 9 is greater than V _AGC but V _TRG
When the transistors Q ₂ , Q ₄ , Q ₅ ,
Q ₇ is turned on, and Q ₁ , Q ₃ , Q ₆ , and Q ₈ are turned off. Therefore, an output is generated at the terminal T ₂ and turns off the gate circuit 3, but no output is generated at the terminal T ₄ , and the gate circuit 3 is turned off.
Amplifier 6 operates normally.

In this embodiment, the trigger pulse detection level _V'TRG and the AGC detection level _V'AGC are obtained by directly connecting the output potential of the amplifier 6, so that the DC cutoff capacitors _C1 and _C2 , which were necessary in the conventional circuit, are used. is no longer needed, and only the rectifier capacitor C ₃ connected to terminal T ₇ is used. Also, according to the above example, V′ _TRG and V′ _AGC are determined by equations (13) and (14), respectively, and the resistance
R ₁₈ , R ₁₉ , R ₂₁ , and R ₂₂ constitute emitter follower type emitter resistors, so they are all 10k.
Sufficient input impedance can be obtained with a value of Ω or less, so 50k, which was required in conventional circuits, is
A high resistance of Ω to 100kΩ is no longer necessary. Furthermore, (13)
As can be seen from equation (14), V′ _TRG and V′ _AGC can be varied by changing the value of constant current I ₀ .

As is clear from the above description, according to the present invention, it is possible to vary the detection level, and also to increase the input impedance regardless of the level setting.
In addition, it is possible to reduce the number of terminals, and the standardization and ICization of circuits can be further improved, and when applied to a noise reduction device, it has great effects in improving its economic efficiency and productivity.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of the configuration of a conventional pulse noise reduction device, FIG. 2 is a graph showing the relationship between the trigger pulse detection level and the AGC detection level applied to the device in FIG. 1, and FIG. 1 is a circuit diagram showing an example of a conventional voltage detection circuit in the apparatus shown in FIG. 1, and FIG. 4 is a circuit diagram showing a voltage detection circuit according to an embodiment of the present invention. In the figure, 2 is a low-pass filter, 3 is a gate circuit, 4 is a buffer circuit, 5 is a high-pass filter, 6 is an amplifier, 7 and 7' are automatic gain control circuits (AGC circuits), and 8 and 8' are trigger pulse generation circuits. ,
11 is an input distribution circuit, Q ₁ to Q ₁₆ are transistors,
_C3 is a capacitor, and _R1 , _R7 , _R14 to _R26 are resistors.

Claims (1)

[Claims] 1. A first transistor having at least three collectors, in which a reference current flows through the first collector, and a second collector of the first transistor passing through first and second resistors to the collector. a second transistor of a conductivity type opposite to that of the first transistor, into which a current flows;
an input distribution circuit including a third transistor of a conductivity type opposite to that of the first transistor, which causes a current to flow into the collector from the third collector of the transistor through the third and fourth resistors; It has fourth to seventh transistors constituting a dynamic pair, the bases of the fifth and sixth transistors are connected in common, the collectors of the fifth and seventh transistors are connected in common, and an output terminal is connected. a trigger pulse generation circuit;
an AGC circuit having a transistor, the bases of the ninth and tenth transistors are commonly connected, and the collectors of the ninth and eleventh transistors are commonly connected as an output terminal, and the input The connection point between the first resistor and the collector of the first transistor of the distribution circuit and the connection point between the second resistor and the collector of the second transistor are respectively connected to the fourth connection point of the trigger pulse generation circuit. connected to the base of the transistor and the base of the seventh transistor, a connection point between the third resistor and the collector of the first transistor, and a connection point between the fourth resistor and the collector of the third transistor; are connected to the base of the eighth transistor and the base of the eleventh transistor of the AGC circuit, respectively, and the connection point of the first and second resistors and the third and fourth resistors of the input distribution circuit. A reference voltage obtained from the noise input is applied to the connection point of the fifth and sixth trigger pulse generating circuits.
A voltage detection circuit for a noise reduction device, characterized in that a noise input voltage is applied to the base of the transistor and the bases of the ninth and tenth transistors of the AGC circuit.