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JPH0332209B2 - - Google Patents
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JPH0332209B2 - - Google Patents

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Publication number
JPH0332209B2
JPH0332209B2 JP15542581A JP15542581A JPH0332209B2 JP H0332209 B2 JPH0332209 B2 JP H0332209B2 JP 15542581 A JP15542581 A JP 15542581A JP 15542581 A JP15542581 A JP 15542581A JP H0332209 B2 JPH0332209 B2 JP H0332209B2
Authority
JP
Japan
Prior art keywords
film
silicon carbide
layer
silicon
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP15542581A
Other languages
Japanese (ja)
Other versions
JPS5856414A (en
Inventor
Shunpei Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP56155425A priority Critical patent/JPS5856414A/en
Publication of JPS5856414A publication Critical patent/JPS5856414A/en
Publication of JPH0332209B2 publication Critical patent/JPH0332209B2/ja
Granted legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24Deposition of silicon only
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901Materials
    • H10P14/2923Materials being conductive materials, e.g. metallic silicides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202Materials thereof
    • H10P14/3204Materials thereof being Group IVA semiconducting materials
    • H10P14/3208Silicon carbide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3408Silicon carbide

Landscapes

  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Photovoltaic Devices (AREA)
  • Led Devices (AREA)

Description

【発明の詳細な説明】 本発明は炭素−珪素結合を有する水素化物また
はハロゲン化物よりなる反応性気体を用いて被形
成面上に非単結晶の炭化珪素を形成せしめるプラ
ズマ気相法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a plasma vapor phase method for forming non-single crystal silicon carbide on a formation surface using a reactive gas made of a hydride or halide having a carbon-silicon bond.

本発明はかかる反応性気体を水素、窒素、アル
ゴンではなく特にヘリユームにより希釈すること
により、被形成面上に損傷の少ない、膜厚の均一
性にすぐれ、さらに被膜成長速度の速い光学的エ
ネルギバンド巾(以下Egという)が2.3eV以上を
有する炭化珪素被膜を100〜500℃の低温で形成せ
しめることを目的としている。
By diluting such a reactive gas with helium instead of hydrogen, nitrogen, or argon, the present invention achieves an optical energy band that causes less damage to the surface to be formed, has excellent film thickness uniformity, and has a faster film growth rate. The purpose is to form a silicon carbide film having a width (hereinafter referred to as Eg) of 2.3 eV or more at a low temperature of 100 to 500°C.

本発明はさらにかかる反応性気体に価の不純
物であるB、Al、Ca、Inを含む不純物気体例え
ばジボラン(B2H6)、V価の不純物を含む不純物
気体例えばフオスヒン(PH3)またはアルシン
(AsH3)を漸次添加して被形成面を有する基板
上に密接してP型層、さらにI型層およびN層を
PINの順序にて積層形成せしめることを目的とし
ている。
The present invention further provides an impurity gas containing valent impurities such as B, Al, Ca, and In, such as diborane (B 2 H 6 ), and an impurity gas containing V-valent impurities, such as phosphin (PH 3 ) or arsine. (AsH 3 ) is gradually added to form a P-type layer, then an I-type layer and an N-layer closely on the substrate having the surface to be formed.
The purpose is to form layers in the order of PIN.

従来非単結晶半導体として非晶質(以下単に
ASという)の珪素がプラズマ気相法で作られる
代表的な例として知られている。これは太陽電池
等の光電変換装置への応用が期待されている。し
かしかかる装置を作ろうとしたり、また可視光の
発光素子を半単結晶半導体を用いて得ようとする
時、同時に2.3〜3.5eVという広いEgを有する窓
材料の開発が求められていた。
Traditionally, non-single crystal semiconductors were called amorphous (hereinafter simply referred to as
It is known as a typical example of silicon (AS) produced using the plasma vapor phase method. This is expected to be applied to photoelectric conversion devices such as solar cells. However, when attempting to make such a device or to obtain a visible light emitting element using a semi-single crystal semiconductor, there was a need to develop a window material having a wide Eg of 2.3 to 3.5 eV.

この材料として炭化珪素(SixC1-x(0<x<
1))が代表的なものである。しかしこの炭化珪
素を実際炭化物気体であるメタン(CH4)等と珪
化物気体であるシラン(SiH4)とをプラズマ雰
囲気中で分解、反応せしめることにより作ろうと
する試みがある。しかしかかる方法によつて得ら
れた炭化珪素はマクロにはSixC1-x(0<x<1)
であるが、その中には珪素のクラスタと炭素のク
ラスタ多数存在してしまい、均質な炭化珪素を作
るのは不可能であつた。このため光学的なEgを
2.0eV以上にすることは不可能であり、一般には
珪素と全く同じ1.6〜1.8eVしか得られなかつた。
さらにかかるせまいEgではなく2.0eV以上をどう
しても得ようとするとその放電電力は200〜500W
ときわめて大きくなり、これらの反応の結果被形
成面を反応スピーシスがスパツタ(損傷)になつ
てしまい、電気的にPIN接合を有せしめ好ましい
ダイオード特性を得ることが全く不可能であつ
た。
This material is silicon carbide (SixC 1-x (0<x<
1)) is a typical example. However, there have been attempts to make silicon carbide by decomposing and reacting a carbide gas such as methane (CH 4 ) with a silicide gas silane (SiH 4 ) in a plasma atmosphere. However, silicon carbide obtained by such a method has a macroscopic value of SixC 1-x (0<x<1).
However, there are many silicon clusters and many carbon clusters, making it impossible to create homogeneous silicon carbide. For this reason, the optical Eg
It is impossible to achieve a voltage higher than 2.0 eV, and generally only 1.6 to 1.8 eV, which is exactly the same as silicon, can be obtained.
Furthermore, if you try to obtain more than 2.0eV instead of the narrow Eg, the discharge power will be 200 to 500W.
As a result of these reactions, the reaction spuds caused spatter (damage) on the formed surface, making it completely impossible to electrically form a PIN junction and obtain desirable diode characteristics.

このため本発明においてはかかる欠点を除くた
め、その出発物質である反応性気体に炭素−珪素
結合を有する材料を用いた。すなわち炭素−珪素
結合を有する水素化物またはハロゲン化物例えば
テトラメチルシラン(Si(CH34)(単にTMSと
いう)、テトラエチルシラン(Si(C2H54)Si
((CH33Ci、Si(CH32C12、Si(CH3)、C13等の
反応性気体を用いたことを第1の特徴としてい
る。
Therefore, in the present invention, in order to eliminate this drawback, a material having a carbon-silicon bond is used as the starting material, ie, a reactive gas. That is, hydrides or halides having a carbon-silicon bond, such as tetramethylsilane (Si(CH 3 ) 4 ) (simply referred to as TMS), tetraethylsilane (Si(C 2 H 5 ) 4 )Si
(The first feature is that reactive gases such as (CH 3 ) 3 Ci, Si(CH 3 ) 2 C1 2 , Si(CH 3 ), and C1 3 are used.

さらに本発明において、かかる反応性気体が電
磁エネルギが加えられてプラズマ状態が発生した
雰囲気に導入され、C−H結合、Si−C1結合、
Si−C結合が切断されるため、そのC、Siの不対
結合手に水素が再結合し、再びC−H結合、Si−
H結合を作つてしまうことを防ぐため、キヤリア
ガスとして、水素ではなくヘリユームを用いてい
る。その場合他の条件を同じにすると、TMS/H
e=1/1〜30の場合と、TMS/H2=1/1〜30におい
て、その被膜の成長速度を3〜9倍にまで高める
ことができ、かつ形成された被膜の均一性が水素
の場合その膜厚のバラツキが±6%であつたの
に、±3%にまで下げることができ、きわめて均
一な被膜とすることができた。このHeはAr等の
活性気体と異なり、その分子率が小さいためとイ
オン化エネルギが2.5eVと最も大きいため、プラ
ズマ化されても被形成面をスパツタすることが少
なく、PIN接合を設けた膜においてもその効果が
大きかつた。
Furthermore, in the present invention, such a reactive gas is introduced into an atmosphere in which electromagnetic energy is applied and a plasma state is generated, and C-H bonds, Si-C1 bonds,
As the Si-C bond is broken, hydrogen recombines to the dangling bonds of C and Si, creating a C-H bond and Si-
To prevent the formation of H bonds, helium is used as the carrier gas instead of hydrogen. In that case, other things being the same, TMS/H
When e = 1/1 to 30 and TMS/H 2 = 1/1 to 30, the growth rate of the film can be increased by 3 to 9 times, and the uniformity of the formed film is better than that of hydrogen. In the case of , the variation in film thickness was ±6%, but it was possible to reduce it to ±3%, resulting in an extremely uniform film. Unlike active gases such as Ar, He has a small molecular ratio and has the highest ionization energy of 2.5 eV, so even if it is turned into plasma, it does not sputter on the surface on which it is formed, and it can be used in films with PIN junctions. The effect was also large.

さらにかかる反応性気体を用いると、反応炉を
1気圧以下特に0.01〜10torr、代表的には0.3〜
0.6torrの圧力下にて50W以下の電磁エネルギに
おいても、例えば0.1〜100MHz特に13.56MHz、
または1〜4GHz特に2.45GHzにおいて被膜を形成
することが可能である。即ち低エネルギプラズマ
CVD装置とすることができた。
Furthermore, when such a reactive gas is used, the reactor can be heated to 1 atm or less, particularly 0.01 to 10 torr, typically 0.3 to 10 torr.
Even with electromagnetic energy of 50W or less under a pressure of 0.6torr, for example, 0.1 to 100MHz, especially 13.56MHz,
Alternatively, it is possible to form a coating at 1 to 4 GHz, especially 2.45 GHz. i.e. low energy plasma
It could be used as a CVD device.

さらに50〜500Wという高エネルギプラズマ雰
囲気とすると、形成された炭化珪素は微結晶化
し、その結果P型またはN型において、ホウ素ま
たはリンを0.5〜10%(ここでは(B2H6または
PH3)/(炭化珪化物気体+珪化物気体)の比を
パーセントで示す)添加した場合、低エネルギで
は電気伝導度は10-9〜10-6(Ωcm)-1であつたもの
が10-6〜10-3(Ωcm)-1と約1000倍にまで高めるこ
とができた。
Furthermore, if a high-energy plasma atmosphere of 50 to 500 W is applied, the formed silicon carbide becomes microcrystalline, and as a result, in the P type or N type, boron or phosphorus is added by 0.5 to 10% (here, (B 2 H 6 or
When the ratio of PH 3 )/(carbide silicide gas + silicide gas) is added, the electrical conductivity at low energy is 10 -9 to 10 -6 (Ωcm) -1 to 10 -6 to 10 -3 (Ωcm) -1 , which was approximately 1000 times higher.

そしてその光学的Egは珪素のような1.6〜
1.8eVではなく2.3〜3.5eV代表的には2.5〜3.2eV
を有することが可能であつた。加えてこの中にジ
ボランまたはフオスヒンを0.01〜5モル%添加す
ると、その炭化珪素(SixC1-x0<x<0.5)は低
エネルギ法ではAS構造を有し活性化エネルギ0.3
〜0.6eVを有する。また高エネルギ法では0.01〜
0.1eVを有するPまたはN型の半導体とすること
ができた。さらにこの高エネルギ法を用いて得ら
れた炭化珪素は5〜200Aの大きさの微結晶構造
を有するいわゆるセミアモルフアス(以下単に
SASという)構造を有せしめることができた。
かかるSASにおいて、そのPまたはN型の不純
物のアクセプタまたはドナーとなるイオン化率を
97〜100%を有し、添加した不純物のすべてを活
性化することができた。
And its optical Eg is 1.6 ~ like silicon
2.3-3.5eV instead of 1.8eV typically 2.5-3.2eV
It was possible to have In addition, when 0.01 to 5 mol% of diborane or phosphine is added to this, the silicon carbide (SixC 1-x 0<x<0.5) has an AS structure and an activation energy of 0.3 in the low energy method.
~0.6eV. In addition, in the high energy method, 0.01~
It was possible to make it a P- or N-type semiconductor with a voltage of 0.1 eV. Furthermore, silicon carbide obtained using this high-energy method has a microcrystalline structure with a size of 5 to 200 A.
We were able to create a structure called SAS.
In such SAS, the ionization rate of the acceptor or donor of the P or N type impurity is determined.
It had 97-100% and was able to activate all of the added impurities.

以下に図面に従つて本発明のプラズマ気相法を
説明する。
The plasma vapor phase method of the present invention will be explained below with reference to the drawings.

第1図は本発明を用いたプラズマCVD装置の
概要を示す。
FIG. 1 shows an outline of a plasma CVD apparatus using the present invention.

第1図において被形成面を有する基板1は石英
ジグにて保持され、図面では7段、2列計14まい
の構成をさせている。各基板は10〜40mm代表的に
は20〜25mmの間かくをおいて配列されており、こ
のジグによる反応性気体は基板の間の空隙に均一
に注入するように設けてある。被形成面は基板の
下面であり、上面は被形成面とならないようおお
われている。これは反応性気体の分解、反応によ
り反応生成物が均一に付着、被膜化せしめるとと
もに、この被膜形成の際反応管壁より遊離したフ
レイク(細片)等が飛しようして重力により上面
に多数落下し、このフレイクがピンホールの発生
を誘発してしまうためである。このため被形成面
を下面にすることは量産歩留りを考慮するときわ
めて重要である。さらにこの基板1を折入させた
反応炉25には、この基板に垂直に電磁エネルギ
の電界が加わるように電極9,10を上下に設け
る。この電極の外側に電気炉5が設けられてお
り、基板1が100〜500℃代表的には300℃に加熱
されている。
In FIG. 1, a substrate 1 having a surface to be formed is held by a quartz jig, and as shown in the drawing, there are seven stages and two rows, 14 in total. The substrates are spaced apart by 10 to 40 mm, typically 20 to 25 mm, and the jig is arranged so that the reactive gas is evenly injected into the gaps between the substrates. The surface to be formed is the lower surface of the substrate, and the upper surface is covered so that it does not become the surface to be formed. This is due to the decomposition and reaction of reactive gases, which cause the reaction products to adhere uniformly and form a film, and during the formation of this film, flakes, etc., released from the reaction tube wall fly off and are deposited on the top surface in large numbers due to gravity. This is because the flakes fall and cause pinholes to occur. For this reason, it is extremely important to set the surface to be formed on the bottom surface in consideration of mass production yield. Further, in the reactor 25 into which the substrate 1 is inserted, electrodes 9 and 10 are provided above and below so that an electric field of electromagnetic energy is applied perpendicularly to the substrate. An electric furnace 5 is provided outside this electrode, and the substrate 1 is heated to 100 to 500°C, typically 300°C.

反応性気体はキヤリアガスのヘリユームを13
より、価の不純物であるジボランを14より、
価の不純物であるフオスヒンを15より、価
の添加物である珪化物気体のシランを16より導
入した。
The reactive gas is carrier gas helium.
From 14, diborane, which is a valent impurity,
Phosphine, which is a valence impurity, was introduced from point 15, and silane, which is a silicide gas, which is a valence additive, was introduced from point 16.

また炭素−珪素結合を有する反応性気体TMS
20を用いると、初期状態で液体であるためステ
ンレス容器21保存される。この容器は電子恒温
層22により所定の温度に制御されている。
Also, reactive gas TMS with carbon-silicon bonds
20, it is stored in a stainless steel container 21 because it is liquid in the initial state. This container is controlled at a predetermined temperature by an electronic constant temperature layer 22.

このTMSは沸点が25℃であり、ロータリーポ
ンプ12をバルブ11をへて排気させ、反応炉内
を0.01〜10torrに保持させた。こうすることによ
り1気圧より低い圧力により、結果として特に加
熱しなくてもTMSを気化させることができる。
この気化したTMSを100%の濃度で流量計を介し
て反応炉に導入することは、従来の如く容器21
をバブルして反応性気体を放出するやり方に比較
して、その流量制御が精度よく可能であり、技術
上重要である。
This TMS has a boiling point of 25° C., and the rotary pump 12 was evacuated through the valve 11 to maintain the inside of the reactor at 0.01 to 10 torr. In this way, TMS can be vaporized at a pressure lower than 1 atmosphere without any particular heating.
Introducing this vaporized TMS at 100% concentration into the reactor via a flow meter is carried out in the container 21 as in the conventional method.
Compared to the method of emitting reactive gases by bubbling them, the flow rate can be controlled with high precision, which is technically important.

実用上流量計がつまつた場合、図面において1
7よりヘリユームを導入した。
In practice, if the flow meter is clogged, 1 in the drawing
Helium was introduced from 7.

これらの反応性気体はキヤリヤガスであるヘリ
ユームを所定の割合で混合して反応炉25に導入
した。電磁エネルギは電極9,10の間に加え例
えば高周波(13.56MHz)を加えて、これにより
被形成面上に蓄積された被膜をふみ固めるような
方向の電界を加えている。こうすることにより電
界により動かされる反応性気体の飛しようを利用
して、形成された炭化珪素または珪素中にボイド
等の存在を少くせしめた。さらにこのプラズマ放
電においては、反応性気体が混合室8をへて混合
された後励起室26において分解または反応をお
こさしめ、反応生成物を基板上に形成する空間反
応を主として用いた。電磁エネルギは電源4より
直流高周波を主として用いた。もちろんマイクロ
波(1〜4GHz)を用いてもよい。このようにし
て被形成面上に炭化珪素被膜を形成した。例えば
基板温度300℃、高周波エネルギの出力25W、
TMS 5c.c./分、キヤリアガスとしてのHe 100
c.c./分とした。TMS/He=20において160A/分
の被膜成長速度を得ることができた。これを第1
図のキヤリアガス13を水素に変えると、TMS/
=20とし他の条件を全く同じにしても25A/
分と被膜成長速度しか得られず、その成長速度は
約1/6にしかならない。これはキヤリアガスをヘ
リユームにした時、TMSより炭化珪素(C/Si4/
1)という炭素過剰の炭化珪素を作る場合のみな
らず、いわゆるSixC1-x(0<x<1)におけるす
べての領域においても共通に水素希釈の5〜8倍
の成長速度を得ることができる。これは使用材料
の収集効率においてきわめて大きな影響を与え、
形成された半導体装置の低価格化のためには必要
不可欠である。
These reactive gases were mixed with helium as a carrier gas at a predetermined ratio and introduced into the reactor 25. Electromagnetic energy is applied between the electrodes 9 and 10 by, for example, high frequency (13.56 MHz), thereby applying an electric field in a direction that compacts the film accumulated on the surface to be formed. By doing this, the presence of voids etc. in the formed silicon carbide or silicon was reduced by utilizing the flight of the reactive gas moved by the electric field. Further, in this plasma discharge, a spatial reaction is mainly used in which reactive gases are mixed through the mixing chamber 8 and then decomposed or reacted in the excitation chamber 26 to form reaction products on the substrate. As electromagnetic energy, DC high frequency was mainly used from the power source 4. Of course, microwaves (1 to 4 GHz) may also be used. In this way, a silicon carbide film was formed on the surface to be formed. For example, the substrate temperature is 300℃, the high frequency energy output is 25W,
TMS 5 c.c./min, He 100 as carrier gas
cc/min. At TMS/He=20, a film growth rate of 160 A/min could be obtained. This is the first
If carrier gas 13 in the figure is changed to hydrogen, TMS/
Even if H 2 = 20 and all other conditions are the same, 25A/
The growth rate is only about 1/6th of that of the previous film. When the carrier gas is helium, silicon carbide (C/Si4/
A growth rate 5 to 8 times faster than hydrogen dilution can be obtained not only when producing carbon-excess silicon carbide (1), but also in all areas of so-called SixC 1-x (0<x<1). . This has a huge impact on the efficiency of collecting the materials used,
This is essential for reducing the cost of the formed semiconductor device.

電磁エネルギを25Wではなく10〜200Wと10、
25、50、100、200Wと変えても同様で、ヘリユー
ムを用いた方が著しく高い被膜成長速度を得るこ
とができた。
Electromagnetic energy 10~200W instead of 25W and 10,
The results were the same even when the power was changed to 25, 50, 100, and 200W, and a significantly higher film growth rate was obtained using helium.

加えて形成された被膜の均一度も水素希釈が±
5%を得るに対し、±2%以下を得ることができ、
半導体装置として用いる時の寄与大であつた。
In addition, the uniformity of the formed film also varies with hydrogen dilution.
5%, you can get less than ±2%,
This made a large contribution when used as a semiconductor device.

またキヤリアガスをヘリユームのみとするので
はなく、水素をHeと比較してH2/He=1/1に到
るまで同時混合すると、これに従つて被膜成長速
度も小さくなつた。
Furthermore, instead of using only helium as the carrier gas, when hydrogen was simultaneously mixed with He until the ratio of H 2 /He reached 1/1, the film growth rate also decreased accordingly.

本発明はさらにかかる炭化珪素に対しさらに基
板上にPIN接合を設けた。
The present invention further provides a PIN junction on the substrate for such silicon carbide.

すなわち第2図Aにそのたて断面図を示してい
るが、基板例えば金属電極を形成するステンレス
基板上にP型炭化珪素(SixC1-x0<x<1)2
8、I型炭化珪素または珪素29、N型炭化珪素
(SixC1-x0<x<1)30を設け、さらにこの上
面にITO等の金属酸化物または重化物の透明導電
膜32を形成させたものである。このPIN構造を
有する半導体31は被形成面上より第1図におい
てTMSとジボランをB2H6/TMS=1〜5%とし
て添加した。するとそのエネルギバンド巾は2.7
〜3.0eVを有し、シランにジボランを1%以上添
加した如くにバンド巾は小さくならなかつた。か
くの如くにしてP型層28を形成した後、真性ま
たは実質的に真性の珪素またはこの珪素中に厚さ
方向にTMSを添加してエネルギ巾を漸減せしめ、
真性または実質的真性の半導体としての炭化珪素
または珪素を作つた。これは第1図において
TMSを導入するとともにシランを16より導入
し、SiH4/TMS・0〜∞に変化させることによ
りEgを3.5eVより1.8eVにまで変化させることが
できる。
That is, as shown in FIG. 2A, which is a vertical cross-sectional view, P-type silicon carbide (SixC 1-x 0<x<1) 2 is deposited on a substrate such as a stainless steel substrate on which a metal electrode is formed.
8. I-type silicon carbide or silicon 29 and N-type silicon carbide (SixC 1-x 0<x<1) 30 are provided, and a transparent conductive film 32 of metal oxide or heavy compound such as ITO is further formed on the upper surface thereof. It is something that In the semiconductor 31 having the PIN structure, TMS and diborane were added as B 2 H 6 /TMS=1 to 5% as shown in FIG. 1 from above the surface to be formed. Then, the energy band width is 2.7
~3.0 eV, and the band width did not become smaller as when diborane was added to silane in an amount of 1% or more. After forming the P-type layer 28 in this manner, TMS is added to intrinsic or substantially intrinsic silicon or to this silicon in the thickness direction to gradually reduce the energy width,
Created silicon carbide or silicon as an intrinsic or substantially intrinsic semiconductor. This is shown in Figure 1.
Eg can be changed from 3.5 eV to 1.8 eV by introducing TMS and introducing silane from 16 to change SiH 4 /TMS from 0 to ∞.

例えば太陽電池等の光電変換装置においてはこ
の真性半導体層29を0.4〜1μに形成させ、Egを
P層(2.0e以上特に2.3〜3.3eV)28−I層(1.5
〜2.0eV)29−N層(2.0eV以上特に2.3〜
3.3eV)30となるように、29上にさらに上面
に再度TMSを主成分としてPH3を0.5〜5モル%
添加し、N型のSixC1-x30を100〜500Aの厚さ
に形成させた。
For example, in a photoelectric conversion device such as a solar cell, the intrinsic semiconductor layer 29 is formed to a thickness of 0.4 to 1μ, and the Eg is a P layer (more than 2.0e, especially 2.3 to 3.3eV), 28-I layer (1.5
~2.0eV) 29-N layer (more than 2.0eV, especially 2.3~
3.3eV) 30, add 0.5 to 5 mol% of PH 3 with TMS as the main component again on the top surface of 29.
was added to form N-type SixC 1- x30 to a thickness of 100 to 500A.

第2図Aにおいて32は光の入射用の透明導電
膜である。かかる構造にすると、光をN層30で
不純物により吸収されることがないため、そのす
べてをI層に導入でき、さらにこの29のせまい
Egに対しそれをはさむP層28、N層30が広
いEgを有し、この間に発生する空乏層により電
子・ホールの対の電極方向への分離をさせること
ができた。その結果AM1(100mW/cm2)におい
て、10〜12%の変換効率を1cm2のセルで得ること
ができた。
In FIG. 2A, 32 is a transparent conductive film for light incidence. With such a structure, since light is not absorbed by impurities in the N layer 30, all of the light can be introduced into the I layer.
The P layer 28 and the N layer 30 sandwiching the Eg have a wide Eg, and the depletion layer generated between them makes it possible to separate pairs of electrons and holes toward the electrodes. As a result, at AM1 (100 mW/cm 2 ), a conversion efficiency of 10 to 12% could be obtained with a 1 cm 2 cell.

しかしこの積層の順序を層28をN層、層30
をP層とすると、1〜2%程度しか得られず、最
初に形成される被膜がP型の炭化珪素であること
はきわめて重要なことであつた。
However, this stacking order is changed from layer 28 to N layers to layer 30.
If it is made into a P layer, only about 1 to 2% can be obtained, and it is extremely important that the first coating formed is P-type silicon carbide.

第2図Bは透光性基板37であり、その上面に
透明導電膜32が設けられている。この面に接し
て最初15と同様にP型炭化珪素28、I型炭化
珪素または珪素29、N型炭化珪素30が形成さ
れている。I層はその厚さが20〜1000A特に50〜
200Aときわめて薄く、このI層を薄くすること
は電極32,33に加えて得られるダイオード特
性に好ましく、すなわちリークが逆方向でない特
性とすることは重要であつた。このPIN接合にお
いて、P層はI層と同様にEgの窓を小さくした
いわゆるシングルヘテロ接合としてもよい。かく
することにより特にライフタイムの短いホールに
対してバリヤを発生できるため、これでも十分発
光が可能であつた。またこのI層はP28−I2
9−N30において、Egは一般にW−N−Wの
関係にあり、ダブルヘテロ接合を有する。このた
め順方向に電流を流すとこのI層に電子ホールが
集まり、互いに再結合をして発光させることがで
きた。この発光の効率を高めるためには、本発明
の被形成面上での積層の順序をP−I−Nとする
ことが重要であり、逆にN−I−Pとすると、N
型不純物の一部がI層に混入し、実質的にN型化
してしまう。このためダイオード特性がよく得ら
れなかつた。
FIG. 2B shows a transparent substrate 37, on which a transparent conductive film 32 is provided. In contact with this surface, P-type silicon carbide 28, I-type silicon carbide or silicon 29, and N-type silicon carbide 30 are initially formed as in 15. The thickness of the I layer is 20~1000A, especially 50~
The thickness of this I layer, which is extremely thin at 200 A, is favorable for the diode characteristics obtained in addition to the electrodes 32 and 33. In other words, it is important that the leakage does not occur in the opposite direction. In this PIN junction, the P layer may be a so-called single heterojunction with a small Eg window like the I layer. In this way, a barrier could be created especially for holes with a short lifetime, so that sufficient light emission was still possible. Also, this I layer is P28-I2
In 9-N30, Eg is generally in a W-N-W relationship and has a double heterojunction. Therefore, when current was passed in the forward direction, electron holes gathered in this I layer, recombined with each other, and emitted light. In order to increase the efficiency of this light emission, it is important to set the stacking order on the surface to be formed in the present invention as P-I-N; conversely, if it is set as N-I-P, then
Part of the type impurity mixes into the I layer, making it substantially N-type. For this reason, good diode characteristics could not be obtained.

これは本発明方法により炭化珪素が通常真性と
いつてもN型を有していること、さらにI層にお
けるホールの移動度が電子に比べて1/100〜1/100
0であることによるものと推定される。
This is due to the fact that silicon carbide usually has an N type even though it is considered to be intrinsic due to the method of the present invention, and furthermore, the mobility of holes in the I layer is 1/100 to 1/100 of that of electrons.
This is presumed to be due to the fact that it is 0.

さらに本発明の如く、プラズマCVD法におい
て、TMS等の炭化珪化物気体を用いるのではな
く、炭化物気体と珪化物気体とを反応させても第
2図Bの構造においてはダイオード特性がみられ
ず、発光もみられなかつた。
Furthermore, even if a carbide gas and a silicide gas are reacted instead of using a carbide silicide gas such as TMS in the plasma CVD method as in the present invention, the structure shown in FIG. 2B does not exhibit diode characteristics. , no luminescence was observed.

このことより化学量論的に炭素と珪素とを混合
したものであることは十分な条件とならず、炭素
と珪素とが十分に結合していることがきわめて重
要である。これは赤外線吸収スペクトルを調べる
と、約800cm-1をピークとして、600〜1000cm-1
広い吸収が本発明方法においては得られ、その他
の結合がきわめて少ないことからもSi−C結合が
十分生成していることが十分証明できた。
From this, it is not a sufficient condition that the material is a stoichiometric mixture of carbon and silicon, and it is extremely important that carbon and silicon are sufficiently bonded. When examining the infrared absorption spectrum, the method of the present invention shows that the method of the present invention has a broad absorption range of 600 to 1000 cm -1 with a peak at about 800 cm -1 , and that Si-C bonds are sufficiently generated because other bonds are extremely rare. I have been able to prove that I am doing so.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明のプラズマ気相法を用いた炭化
珪素の製造装置である。第2図は本発明方法によ
つて得られた半導体装置のたて断面図である。
FIG. 1 shows an apparatus for producing silicon carbide using the plasma vapor phase method of the present invention. FIG. 2 is a vertical sectional view of a semiconductor device obtained by the method of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 1 基板上に電極が設けられた被形成面上に、P
型の導電型を有する炭化珪素被膜を形成した後、
該被膜上に真性または実質的に真性の半導体層を
形成する工程と、該工程の後上記真性の半導体層
上にN型の導電型を有する半導体層を形成する工
程とによりPIN構造を有する被膜を形成するに際
し、P型の導電型を有する炭化珪素被膜を炭素−
珪素結合を有する水素化物またはハロゲン化物の
炭化珪化物気体とシラン(SiH4)とを反応性気
体として用い、1気圧以下に保持されたプラズマ
雰囲気内に導入して分解反応せしめるとともに、
価の不純物を有する不純物気体を同時に該雰囲
気内に導入することにより形成することを特徴と
するP型炭化珪素被膜作製方法。
1. P is placed on the formation surface on which the electrode is provided on the substrate.
After forming a silicon carbide film having a conductivity type of
A film having a PIN structure is obtained by forming an intrinsic or substantially intrinsic semiconductor layer on the film and, after the step, forming a semiconductor layer having an N-type conductivity on the intrinsic semiconductor layer. When forming a silicon carbide film having P-type conductivity, carbon-
A silicide carbide gas of a hydride or halide having a silicon bond and silane (SiH 4 ) are used as reactive gases, and are introduced into a plasma atmosphere maintained at 1 atmosphere or less to cause a decomposition reaction,
1. A method for producing a P-type silicon carbide film, characterized in that the film is formed by simultaneously introducing an impurity gas containing a valent impurity into the atmosphere.
JP56155425A 1981-09-30 1981-09-30 Plasma vapor growth method Granted JPS5856414A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56155425A JPS5856414A (en) 1981-09-30 1981-09-30 Plasma vapor growth method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56155425A JPS5856414A (en) 1981-09-30 1981-09-30 Plasma vapor growth method

Publications (2)

Publication Number Publication Date
JPS5856414A JPS5856414A (en) 1983-04-04
JPH0332209B2 true JPH0332209B2 (en) 1991-05-10

Family

ID=15605720

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56155425A Granted JPS5856414A (en) 1981-09-30 1981-09-30 Plasma vapor growth method

Country Status (1)

Country Link
JP (1) JPS5856414A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH081962B2 (en) * 1991-07-19 1996-01-10 ティーディーケイ株式会社 Method for manufacturing blue light emitting device
CN102891073B (en) * 2012-09-28 2015-01-14 南京航空航天大学 Preparation method of low-temperature plasma auxiliary aluminum induced polycrystalline silicon carbide film

Also Published As

Publication number Publication date
JPS5856414A (en) 1983-04-04

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