JPH0334027B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an apparatus for measuring impedance at high speed. More specifically, the present invention relates to an apparatus for rapidly measuring the unknown impedance of an element to be measured by comparing the phase of a current flowing through the element to be measured and the phase of a voltage applied to the element. In order to measure the magnitude and phase angle of unknown impedance, it has been conventional practice to apply a known reference signal to a device under test, and then detect a phase change in the reference signal using a phase detector. However, various methods are known for accurately measuring the above phase change. One method is the patent application No. 55-30740 "Impedance meter" by the present applicant.
The described method attempts to digitally obtain the amount of phase change. However, since error correction is performed digitally, a plurality of operation steps are required, and the measurement time cannot be shortened. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an impedance measuring device that reduces the number of operational steps required when digitally measuring impedance, thereby enabling high-speed measurement. Hereinafter, the present invention will be explained in detail using the drawings. First, the conventional technology of the impedance measuring device, which is the basis of the present invention, will be explained using FIGS. 1 to 4, and then the improvements of the present invention will be explained using FIG. 5. FIG. 1 is a block diagram showing an example of an impedance measuring device according to the prior art, and FIG. 2 is a vector diagram for explaining the operation of FIG. 1. In FIG. 1, the output end of a reference oscillator (output voltage E ₁ , oscillation frequency 8f) 6 is connected to a first input end 8 and one end of the device under test 2 via a 1/8 frequency divider 4 . The other end of the device under test 2 is an operational amplifier 10.
connected to the inverting input terminal of The inverting input terminal is connected to the output terminal of the operational amplifier 10 via a resistor 12. Therefore, the operational amplifier 10 and the resistor 12
acts as an IV converter that converts the current flowing through the device under test 2 into voltage. The output terminal of the operational amplifier 10 is connected to the second input terminal 14 (output voltage E ₂ ). The first switch SW1 is connected to the first input terminal 8 or the second input terminal 8.
By selecting one of the input terminals 14, the phase detector 16
Connect to one input end of the A phase shifter 1 is connected between the other input terminal of the phase detector 16 and the reference oscillator 6.
8 is connected. Here, the phase shifter 18 is a circuit that divides the input signal 8f into 1/8, shifts its phase (0, π/2, π, 3π/2), shapes it into a square wave, and sends it out. It can be constructed using conventional technology (for example, an 8-bit circular shift register). An integrating voltmeter 20 is connected to the output end of the phase detector 16 and measures its output voltage. The voltage type 20 includes a filter 30 for smoothing the output signal of the phase detector 16, a second switch SW2 for adjusting the integration time, an integrator 40 consisting of an operational amplifier 36 and an integrating capacitor 38 ; A zero output detector and counter 50 connected to the output end are included. Note that in order to obtain the impedance of the element to be measured 2, it is necessary to perform certain calculations on the measured value of the voltmeter 20, and these are performed by a microprocessor (not shown). In FIG. 2, the vector E ₁ is the first input terminal 8
The voltage E ₁ applied to the vector E ₂ represents the voltage E ₂ applied to the second input terminal 14 . Here, the vector E ₂ corresponds to the magnitude and phase of the current flowing through the device under test 2. Furthermore, when the phase shift amount of the phase shifter 18 is set to zero, an equivalent phase difference of θ ₁ occurs between the voltage E ₁ applied to the phase detector 16 and the output voltage of the phase shifter 18. shall be. That is, this phase difference θ ₁ can be considered to be caused by the signal path including the phase shifter 18, assuming that the operation of the phase detector 16 is ideal. Therefore, the illustrated reference vector X is drawn so as to have a phase difference θ ₁ with the vector E ₁ . Vector E _Y has a phase difference of 90° with respect to vector E ₁ . Assuming that the element to be measured 2 is a capacitor, the vector E ₂ represents the current flowing through the capacitor. When the loss of the capacitor under test is zero (in the case of an ideal capacitor), vector E ₂ overlaps vector E _Y (because a 90° lead current flows). Therefore, the phase difference θ ₄ between the vectors E ₂ and E _Y is the dielectric loss angle δ (tan δ
= tanθ ₄ ). The same applies when the device to be measured is a coil, and tan θ ₄ represents the loss coefficient D. Here, the loss coefficient D has the following value based on an equivalent circuit representing the device under test (an example of a calculated value is shown). (1) Assuming that the device to be measured consists of a parallel equivalent circuit of a capacitor C _p and a resistor R _p , D=1/ωC _p R _p =1/Q ω=2πf. (2) Assuming that the device to be measured consists of a series equivalent circuit of an inductor L _s and a resistor R _s , D=R _s /ωL _s =1/Q. FIG. 3 is a voltage waveform diagram illustrating the operations of the phase shifter 18 and phase detector 16 shown in FIG. 1.
The illustrated signal A indicates the voltage _E1 , and the signal B indicates the phase shifter output signal when the phase shift amount of the phase shifter 18 is set to zero. As explained in FIG. 2, a phase difference θ ₁ occurs between these signals A and B. When the first switch SW1 is turned to the first input end side 8, the phase detector 16 outputs a detection signal C. Applying this to the vector diagram shown in FIG. 2, the phase shifter output signal B corresponds to the reference vector X, and the detection signal C corresponds to the point a (a volt) of the reference vector X. When the phase shift amount of the phase shifter 18 is set to π/2, a phase shifter output signal d is obtained. And a phase detector 16 into which signal A and phase shifter output signal D are introduced.
sends out a detection signal H. Applying this to the vector diagram shown in FIG. 2, the phase shifter output signal D corresponds to the quadrature reference vector Y, and the detection signal E corresponds to point b (b volts) of the quadrature reference vector Y. The vector E ₂ shown in FIG. 2 can be considered in the same way. That is, the component c that is in phase with the reference vector X is; The first switch SW1 is turned to the second input end side 14. The amount of phase shift of the phase shifter 18 is set to zero. It is detected by Also, the component d that is in phase with the orthogonal reference vector Y is; The first switch SW1 is moved to the second input end side 14. The amount of phase shift of the phase shifter 18 is assumed to be π/2. It is detected by Next, the principle of impedance measurement will be explained with reference to FIGS. 1 and 2. Now let b/a=α d/c=β d/a=γ. Here, a, b, c, d are reference vectors
or each point of the orthogonal reference vector Y, measured as described above. Then, the loss coefficient D of the device under test is: D=tanδ=tanθ ₄ =tan(π/2−θ ₃ )=1/tanθ ₃ and tanθ ₃ =tan(θ ₂ −θ ₁ )=(tanθ ₂ −tanθ ₁ )/(1+ _tanθ2・_tanθ1 )=(β−α)/(1+α・β)...(1) Therefore, D=(1+α・β)/(β−α)...(2). Next, the capacitance (or inductance) X of the device to be measured can be expressed as: X=|E ₂ |/|E ₁ |sinθ ₃ (3). here Also Here, tan θ ₃ is given by equation (1). Therefore, by substituting equations (4) and (5) into equation (3), X=γ/β・β−α/1+α ² ...(6). In this way, the impedance of the device to be measured can be determined using equations (2) and (6). These operations are performed by a microprocessor (not shown).
This is done by FIG. 4 is a graph for explaining the operation of the impedance measuring device shown in FIG. 1. In this figure, the vertical axis represents the output voltage of the integrator 40 , and the horizontal axis represents the integration time (seconds). The apparatus is then operated according to a sequence consisting of the steps [ ] [ ] [ ] described below. The operation of each step is as follows. []Step: Turn the first switch SW1 to the first input end side 8. The phase shift amount of the phase shifter 18 is set to π/2. Turn on the second switch SW2 and perform integration for a certain period of time (T _c seconds). That is, integration is performed by applying b volts (see FIG. 2). Immediately thereafter, the phase shift amount of the phase shifter 18 is set to π. This results in a subsequent integration with -a volts (see FIG. 2). When the output voltage of the integrator 40 drops to a predetermined level, turn off the second switch SW2 (T ₁
seconds later). Then, by calculating T ₁ /T _c , b/a=
α can be found (∵b/a=T ₁ /T _c ). [Step] Move the first switch SW1 to the second input end side 14. The phase shift amount of the phase shifter 18 is set to π/2. Turn on the second switch SW2 and perform integration for a certain period of time ( _Tc seconds). That is, integration is performed by applying d volts (see FIG. 2). Immediately thereafter, the phase shift amount of the phase shifter 18 is set to π. This results in a subsequent integration by -c volts (see FIG. 2). When the output voltage of the integrator 40 drops to a predetermined level, turn off the second switch SW2 (T ₂
seconds later). Then, by calculating T ₂ /T _c , d/c=
β can be found (∵d/c=T ₂ /T _c ). [Step] Move the first switch SW1 to the second input end side 14. The phase shift amount of the phase shifter 18 is set to π/2. Turn on the second switch SW2 and perform integration for a certain period of time ( _Tc seconds). That is, integration is performed by applying d volts (see FIG. 2). Immediately thereafter, the first switch SW1 is turned to the first input end side 8, and at the same time, the phase shift amount of the phase shifter 18 is set to π. Due to this-
Integration by a volts (see FIG. 2) is subsequently carried out. When the output voltage of the integrator 40 drops to a predetermined level, turn off the second switch SW2 (T ₃
seconds later). Then, by calculating T ₃ /T _c , d/a=
γ can be found (∵d/a=T ₃ /T _c ). Since α, β, and γ are determined by the above three steps, it becomes possible to calculate the loss coefficient and impedance using the above equations (2) and (6) (using a microprocessor). The above-mentioned step [] is θ ₁ (see Figure 2)
This is an unavoidable operation step because θ 1 has a finite value, but if θ ₁ =0, this step becomes unnecessary. This is because α=b/a=0. Therefore, by omitting step [], faster impedance measurement becomes possible. _{Also , equation} ( ₆ ) can _be transformed into = γ. Therefore, by setting θ ₁ =0, X=γ=d/a. This means that only the above step [] is required when measuring reactance;
This means that step and step [] can be omitted. If a circuit in which θ ₁ =0 is realized in this way, impedance measurement will become faster.
The impedance measuring device according to the present invention substantially achieves θ ₁ =0, thereby increasing the speed of measurement. FIG. 5 is a block diagram showing an entire impedance measuring device according to an embodiment of the present invention. In this figure, a 1600 kHz reference oscillator 52 is connected to a first input of an AND gate 54 and to a frequency dividing/shaping circuit 56. Here, since the frequency division ratio is 1600, a 1kHz sine wave is obtained from the frequency division/shaping circuit 56. The output end of the frequency dividing/shaping circuit 56 is connected to the first input end of a phase detector 60 via an element under test 58, an IV converter 57 , and a switch 59. The output of the frequency dividing/shaping circuit 56 is also connected via a limiter 62 and a flip-flop 64.
It is connected to the second input terminal of AND gate 54. Here, the limiter 62 and flip-flop 64 are
A gate opening/closing signal 66 is sent out in synchronization with the sine wave signal obtained from the frequency dividing/shaping circuit 56. Note that when the switch 59 is turned to the a side, the output end of the waveform/shaping circuit 56 is directly connected to the phase detector 60. The output terminal of AND gate 54 is a frequency divider (÷200)
It is connected to phase shifter 70 via 68. Phase shifter 7
Similarly to the phase shifter 18 shown in FIG. 1, 0 is a circuit that divides the input frequency into 1/8, shifts its phase, shapes it into a square wave, and sends it out (for example, an 8-bit circular shift register). , patent application 1982-114285
). The output terminal of the phase shifter 70 is connected to the second input terminal of the phase detector 60. The output end of the phase detector 60 is connected to a dual slope integrating voltmeter 72. Voltmeter 72 has a similar configuration to voltmeter 20 shown in FIG. In this device, the voltage applied to the device under test 58 is
1kHz sine wave signal has a certain time delay (or advance)
is applied to the phase detector 60. Assuming that the phase shift amount of the phase shifter 70 is set to zero, θ ₁ (see FIG. 2) is a maximum of 0.225 degrees, which can be considered to be approximately zero. Because 1kHz
This is because a 1600 kHz reference signal is used to obtain the measurement signal, and the frequency is divided after passing through an AND gate 54 that is opened in synchronization with the signal applied to the device under test. In other words, the 1kHz signal applied to the device under test 58 is the vector E ₁ (second
(see figure), and the difference θ ₁ from the reference vector X is at most 360 x 1/1600 = 0.225 (degrees), so it can be considered that the vector E ₁ and the reference vector X substantially match. Can be done. Therefore, the operation of this device is performed as follows (see step [ ] in FIG. 4). At the same time as turning the switch 59 to the b side, the phase shifter 7
The phase shift amount of 0 is set to π/2, and integration is performed for a certain period of time (T _c ). That is, integration is performed by applying d volts (see FIG. 2). Immediately thereafter, the switch 59 is turned to the a side, and at the same time the phase shift amount of the phase shifter 70 is set to π. This results in -a bolt (see Figure 2)
Then the integration is performed. When the output voltage of the integrator (not shown) drops to a predetermined level (after T ₃ seconds), the integration is stopped. Then, d/a can be obtained by calculating T ₃ /T _c . Therefore, since X=d/a, when the element to be measured is a capacitor, it is given by ωc=d/a and ω=2πf. As detailed above, according to the present invention, when measuring only reactance, the number of operation steps can be reduced to 1/3.
Therefore, the actual measurement time can be reduced to less than 1/2 compared to the conventional method (3 steps). In addition, when measuring the loss coefficient D at the same time,
Since the step (see FIG. 4) can be omitted, it is possible to speed up the measurement. Finally, the time required to measure the capacitance C using the impedance measuring device prototyped by the present applicant is appended as experimental data. 【table】

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of an impedance measuring device according to the prior art, FIG. 2 is a vector diagram for explaining the operation of FIG.
A voltage waveform diagram explaining the operation of the phase shifter 18 and phase detector 16 shown in the figure, FIG. 4 is a graph explaining the operation of the impedance measuring device shown in FIG. 1, and FIG. 5 is a graph of the present invention. 1 is a block diagram showing an entire impedance measuring device according to an embodiment. FIG. 2: Element to be measured, 16: Phase detector, 18: Phase shifter, 20: Dual slope integrating voltmeter, 5
4: AND gate, 56: Frequency division/shaping circuit, 6
0: Phase detector, 62: Limiter, 64: Flip-flop, 68: Frequency divider (÷200), 70: Phase shifter, 72: Dual slope integral type voltmeter.

Claims (1)

[Claims] 1. A device that measures impedance from the amount of phase change obtained by applying a reference signal to an element under test, which includes a reference oscillator that generates a reference signal having a frequency n times the measurement frequency, and a reference signal obtained by dividing the frequency of the reference signal. a synchronization circuit that generates a gate opening signal in synchronization with a signal generated when a measurement signal is applied to the device under test, and a gate circuit connected to the output terminals of the reference oscillator and the synchronization circuit; An impedance measuring device characterized in that an output end of a circuit is connected to a phase detection control terminal of a phase detector via a phase shifter.