JPH0334671B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to nonvolatile transistors.

As a nonvolatile memory, the typical MNOS type nonvolatile memory transistor captures electrons or holes in traps that exist at the interface between its gate oxide film, silicon nitride film and silicon oxide film.
It is possible to change the threshold voltage as a so-called MOS transistor by releasing it.
This characteristic is utilized as a data storage retention function. For example, in Figure 1, N channel
This figure shows typical drain current characteristics with respect to gate voltage of a MOS type nonvolatile memory transistor. I
indicates a case where electrons are captured in the gate oxide film, indicating a written state, and indicates a case where electrons in the oxide film are released, indicating an erased state.
should originally indicate a threshold voltage of V _TW by ideal writing, but as shown in Figure 1,
A phenomenon in which current flows can be observed even at a gate voltage V _TS lower than V _TW . This is a phenomenon known as the write sidewalk effect. Conventionally, it has been theoretically difficult to accurately control the magnitude of this sidewalk phenomenon in the manufacturing process.

By utilizing the above-mentioned sidewalk phenomenon, the present invention has a threshold voltage V _TE during erasing and a threshold voltage V _TW during writing as shown in FIG. 1, as well as V _TS . Non-volatile memory with a third threshold voltage can be realized, and by utilizing non-volatile memory devices with these three threshold voltages, it will be easier to realize new circuit systems that have never existed before. . In other words, in the channel shape of the MNOS transistor, the present invention is arranged such that the channel is parallel to the direction of current flow.
By dividing the memory into a plurality of parts, the sidewalk effect is actively increased, and the purpose is to realize a memory device in which a unique function is imparted to the transistor characteristics during writing. The present invention will be described in detail below using an N-channel MNOS type memory transistor as an example, and its application examples will also be explained.

FIG. 2 shows a plan view of the main parts of a general MNOS transistor having the characteristics shown in FIG. 1. FIG. 3 shows a cross-sectional view taken along the A-A axis in FIG. 2. In FIGS. 2 and 3, 1 is a P-type silicon substrate, 2 and 3 are source and drain regions made of N-type diffusion layers, 4 is a gate electrode, 5 is a channel portion,
6 is a silicon nitride film, and 7 and 8 are silicon oxide films, showing a thick field portion and an extremely thin gate portion. Trap 9 in the gate insulating film, which affects the threshold voltage of the MNOS memory transistor, is
As shown in FIG. 3, it exists near the interface between the extremely thin silicon oxide film 8 and the silicon nitride film 6, and the injection and release of electrons or holes into the trap 9 is shown in the region B of FIG. This is done by a tunneling phenomenon through the extremely thin silicon oxide film 9. on the other hand,
In the regions C ₁ and C ₂ in FIG. 3, the silicon oxide film is successively thicker, so injection into and release from the trap is difficult to occur. However, the electrons or holes trapped in the C ₁ and C ₂ regions affect the threshold voltage of the transistor independently of the B region. This is what causes the sidewalk phenomenon described above. In other words, as shown in the third diagram
In the MNOS type transistor, in its write state, most of the traps in region B are filled with electrons, so the original threshold value of the transistor is indicated by V _TW in FIG. However, since the traps in the C ₁ and C ₂ portions have a thick silicon oxide film, holes are not sufficiently injected, and the threshold voltage in those portions is indicated by V _TS , which is a smaller value than V _TW . Therefore, the MNOS type memory transistor shown in FIGS. 2 and 3 exhibits a sidewalk phenomenon as shown in FIG. 1. this is
It depends on the conductance of the parasitic MNOS memory transistor represented by C ₁ and C ₂ parts. In other words, in order to make this sidewalk phenomenon more noticeable, by dividing the channel into multiple parallels in the current path direction, the periphery of the channel represented by C ₁ and C ₂ is This can be easily achieved by increasing the number of boundary portions, which equivalently widens the channel width of the parasitic MNOS transistor. The main part sectional view of FIG. 4 and the BB sectional view of FIG. 5 are shown.
Note that the same numbers in FIGS. 4 and 5 as in FIGS. 2 and 3 indicate the same parts. As shown in Figures 4 and 5,
The channel area of the MNOS transistor is W ₂ ,
By dividing and arranging W ₃ and W ₄ in parallel and increasing the number of channel peripheral boundaries than in the case of a single channel, it is possible to increase the above-mentioned sidewalk phenomenon. In FIGS. 2 and 4, for example, if there is a relationship of L1=L2 W1=W ₂ +W ₃ +W ₄ , the write characteristics of the MNOS type memory transistor shown in FIG. 4 are as shown in FIG.
′, and ′ in the side walk portion shows a current value three times that of ′. In this way, it is possible to configure MNOS memory transistors with different numbers of channel divisions on the same semiconductor substrate and use means to compare and detect their mutual characteristics, or to increase the number of divisions to sufficiently reduce the sidewalk effect. By increasing the margin so that the sidewalk effect is increased, it is possible to actively utilize the sidewalk effect without having to worry about variations in the absolute value of the sidewalk between production lots.

Next, as an application example using the embodiment device of the present invention as a circuit element,
An example of a refresh detection circuit will be explained, which monitors the threshold voltage fluctuation of an MNOS transistor, detects when it has attenuated to a set value, and simultaneously generates an alarm signal for rewriting, etc. FIG. 6 shows a schematic diagram of the circuit, and FIG. 7 shows the characteristics of the MNOS type memory transistors 10 and 11. The transistor 10 is an MNOS type memory transistor according to an embodiment of the present invention, and the sidewalk effect is increased by the means of the present invention, and the initial write characteristic is indicated by 18. Similarly, the transistor 11 is a normal MNOS type memory transistor, and the characteristics at the initial stage of writing are indicated by 19. 1
Reference numerals 2 and 13 are constant current sources, both of which have the same constant current source value, and their value is _IDI . Reference numeral 14 denotes a differential type detector which receives signals at operating points 16 and 17, and has a function of outputting a signal to an output terminal 15 when the potentials at operating points 17 and 16 become approximately equal. . Immediately after writing, 18, 1 in Figure 7
As can be understood from the characteristics of transistor 9, there is a potential difference between the operating points 17 and 16, and the drain-side operating point 17 of the transistor 10 has a lower potential than the drain-side operating point 16 of the transistor 11. At this time, no signal is generated at the output operating point 15 of the circuit. The threshold voltage of the transistor attenuates in the lower direction with time, and the transistor 10 having the initial characteristic 18 changes to the characteristic 20 after a predetermined time, and
Similarly, the transistor 11 with the initial characteristic 19 becomes
When each changes to characteristic 21, the large sidewalk component of transistor 10 of characteristic 20 almost disappears, and the current value of both transistors becomes I _DI
will match. At this time, substantially the same voltage is generated at each operating point 17 and 16, and an alarm signal for refreshing is generated at the output terminal 15.
Note that the reference numeral 22 in the figure indicates a power supply terminal. This circuit example is a means of automatically detecting the refresh period of nonvolatile memory, and can be realized with a simple circuit by effectively using the sidewalk phenomenon that exists between the erase state and write state. .

As explained above, the present invention provides a means for actively increasing the sidewalk effect in the write characteristics of MNOS transistors, and thereby solves the problem in the manufacturing process, which has conventionally been a problem. It is possible to greatly improve the degree of freedom in circuit and device design without being restricted by variation factors.

In addition, in the above explanation, an N-channel type MNOS transistor was explained, but a D-channel type MNOS transistor is explained.
The same is true for MNOS transistors.
In addition to the silicon nitride film, the trap function can also be applied to nonvolatile memories made of aluminum oxide films, double films of tantalum oxide films and silicon oxide films.

[Brief explanation of the drawing]

Fig. 1 is a characteristic diagram of an MNOS transistor, Fig. 2 is a plan view of main parts of a conventional MNOS transistor, Fig. 3 is a sectional view taken along line A-A of the MNOS transistor in Fig. 2, and Figs. The figure is a plan view of the MNOS transistor according to the present invention and B-B.
A sectional view, FIG. 6 shows a memory refresh detection circuit to which the present invention is applied, and FIG. 7 shows a characteristic diagram of the MNOS type transistor used in FIG. 1...Substrate, 2...N-type source diffusion layer, 3...
N-type drain diffusion layer, 4... gate electrode, 5...
MNOS type channel region, 6...silicon nitride film,
7, 8...Silicon oxide film, 9...Charge trap, 10, 11...MNOS type memory transistor.

Claims (1)

[Claims] 1. An insulating film having a charge storage function consisting of an extremely thin silicon oxide film and a predetermined dielectric film between a source and a drain on a semiconductor substrate, and a conductive channel portion formed in the semiconductor substrate via this insulating film. What is claimed is: 1. A nonvolatile transistor comprising an electrode capable of controlling a current, and wherein the ultra-thin silicon oxide film is divided into a plurality of strips by a thick silicon oxide film along the longitudinal direction of the channel portion.