JPH0339404B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the configuration of a differential amplifier using complementary MOS transistors.

[Conventional technology]

In recent years, with the increase in the scale of integrated circuits, increased power consumption has become a problem, and attention has been focused on the low power consumption of complementary MOS transistor circuits, and the application of complementary MOS transistor circuits to various integrated circuits is progressing.

However, the complementary MOS transistor circuit requires the use of two types of MOS transistors, namely, P-channel type and N-channel type MOS transistors. Even if these elements are integrated on the same substrate, some of the parameters that determine their characteristics (threshold voltage, current supply capacity, etc.) are independent, so in terms of performance ratio, etc., only MOS transistors in the same channel This has disadvantages such as greater dispersion than those using , which makes it difficult to design differential amplifiers.

An example of a differential amplifier using complementary MOS transistors in this conventional semiconductor integrated circuit will be described with reference to FIG.

N with its gate connected to the power supply V as a low current source
A channel type MOS transistor 1 is used. The source of this MOS transistor 1 is grounded, and the drain is connected to the sources of N-channel MOS transistors 2 and 3, whose gates are connected to input 1 and input 2, respectively.
The sources of P-channel type MOS transistors 4 and 5 whose gates are grounded are connected as loads to the drains of the MOS transistors 2 and 3, respectively. The source of MOS transistor 1 is grounded,
A power supply V is connected to the drains of the MOS transistors 4 and 5. Output 1 and output 2 are taken out from the connection point between MOS transistors 2 and 4 and the connection point between MOS transistors 3 and 5, respectively.

Now, for the purpose of explanation, the threshold voltages of P-channel type and N-channel type MOS transistors are V _TP and V _TN , respectively, and MOS transistors 1, 2, and 3 are
Let the potential of point B, which is the connection point of , be _VB . input 1
Assume that a low level input voltage is applied to input 2 and a high level input voltage is applied to input 2. Since the input 1 is at a low level, the MOS transistor 2 is turned off, and the resistance between the drain and source of the MOS transistor 2 becomes nearly infinite, so the output 1 becomes approximately the power supply level V. On the other hand, input 2 is given a high level input voltage, so
MOS transistor 3 is turned on, and the level of output 2 becomes a low level output value determined by the ratio of the on-resistances of MOS transistors 1, 3, and 5.

Here, due to causes such as variations in the characteristics of MOS transistors, the current supply capabilities of N-channel type MOS transistors 1, 2, and 3 increase, and their threshold voltages V _TN decrease. When the current supply capability of the transistors 5 becomes smaller and their threshold voltage V _TP becomes larger, the level V _B at point B decreases. At this time, if the low level side of the differential input signal approaches the power supply potential V for some reason and becomes larger than (V _B +V _TN ), the N-channel MOS transistors 2 and 3
become conductive, and the voltage level of output 1, which should output a high level output, decreases, which not only reduces the level difference between the output voltages of outputs 1 and 2, but also causes a reversal, making normal operation impossible. becomes.

[Problem to be solved by the invention]

An object of the present invention is to solve the difficulty in designing a differential amplifier due to the variation in characteristics peculiar to such MOS transistors.

[Means to solve the problem]

In the present invention, the sources of two MOS transistors of the first conductivity type are connected to each other to form a differential amplifier section, and the common source of the first conductivity type MOS transistors is a MOS transistor of the same conductivity type that serves as a current source. connected to the transistor and of the differential amplifier section above.
In a semiconductor integrated circuit using complementary MOS transistors each connected to a second conductivity type MOS transistor serving as a load resistance, the drain of the MOS transistor is connected to a first conductivity type MOS transistor in parallel with the second conductivity type MOS transistor. It is characterized by the connection of MOS transistors.

〔Example〕

An embodiment of the present invention is shown in the drawings and will be described below.

FIG. 2 shows an embodiment of the present invention. In FIG. 2, the same symbols and reference numerals are used for the same parts as in FIG. 1.

The feature of this embodiment is that an N-channel type MOS
Transistors 6 and 7 are connected, and this
The gates of the MOS transistors 6 and 7 are connected to the power supply V, respectively.

Now, as in Figure 1, input 1 is low level,
Input 2 is given a high level input voltage,
It is assumed that MOS transistor 2 is off, MOS transistor 3 is on, output 1 is high level, and output 2 is low level.

As in the case of Figure 1, due to variations in the characteristics of MOS transistors, MOS transistors 1 to 1
Suppose that the threshold voltage V _TN of 3 decreases and the level of output 2 drops to (power supply level - V _TN ),
Of the MOS transistors 6 and 7, the output 2 side
MOS transistor 7 becomes conductive when the level difference between its gate and source exceeds the threshold voltage V _TN , equivalently increasing its ability as a load, so the level of output 2 drops extremely from (power supply level - V _TN ). There will be nothing left to do. At this time, the level difference between the gate and source of MOS transistor 3 exceeds the threshold voltage V _{TN and} the MOS transistor 3 is in the on state, so the level of the connection point B is V _B
is close to the same level as the output 2 (power supply level - V _TN ), and the MOS transistor 2 is kept in the off state in order to keep the level difference from the low level of the input 1 below the threshold voltage.

In this way, even if the capabilities of the MOS transistors vary, normal operation can be achieved without reducing or reversing the levels of output 1 and output 2.

If the present invention is used as described above, complementary type
A differential amplifier capable of stable operation using MOS transistors can be provided.

Furthermore, although this application has explained the MOS transistors as input MOS transistors and current sources using N-channel MOS transistors, P
It is obvious that channel type MOS transistors can be used. Also, as a current source
Although the explanation has been given by applying the power supply voltage as the gate voltage of the MOS transistor 1, changes such as consuming power only during operation can be made by controlling the signal applied to the gate of the MOS transistor 1.

〔Effect of the invention〕

As explained above, according to the present invention,
A differential amplifier using CMOS transistors that operates stably can be provided, and its design can be easily performed.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a differential amplifier using conventional complementary MOS transistors, and FIG. 2 is a circuit diagram showing an embodiment of the present invention. 1, 2, 3, 6, 7...N channel type MOS transistor, 4, 5...P channel type MOS transistor, B...connection point, V...power supply.

Claims (1)

[Claims] 1. The sources of two MOS transistors of the first conductivity type are connected to each other to form a differential amplifier section, and the common source of the MOS transistors of the first conductivity type is of the same conductivity and serves as a current source. In a semiconductor integrated circuit using complementary MOS transistors, each of which is connected to a MOS transistor of the second conductivity type, and the drain of the MOS transistor of the differential amplifier section is connected to a MOS transistor of the second conductivity type, which serves as a load resistance, A semiconductor integrated circuit characterized in that a first conductivity type MOS transistor is connected in parallel to a two conductivity type MOS transistor.