JPH0342500B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a semiconductor wafer, and in particular, a semiconductor integrated circuit (hereinafter referred to as IC) having a built-in self-substrate bias generation circuit (hereinafter referred to as BBG) is formed. The present invention relates to semiconductor recording boards, and in particular to semiconductor wafers that enable improved measurement of the electrical characteristics of ICs in the wafer state using probes.

(Prior art) Conventionally, when measuring the electrical characteristics of a semiconductor wafer with a built-in BBG on one main surface by connecting a probe to the IC on the wafer,
A method was adopted in which the substrate potential was also applied from the metal chuck holding the wafer.

The technology and its problems will be described below with reference to FIG.

BBG fabricated on one main surface of semiconductor wafer 2
When the probe 3 is connected to the built-in IC1 and the electrical characteristics of the IC1 are to be measured, if a power supply voltage is applied to the IC1, the BBG built into the IC1 is activated and a substrate bias is generated. However, individual
The BBG built into IC1 is designed so that the circuit operation is optimal when IC1 is in the chip state.In the wafer state, it is necessary to set the entire wafer to the same potential, which increases the load on the BBG.
The chip status and IC1 characteristics are different.

Therefore, when measuring the electrical characteristics of the IC 1 with a built-in BBG in a wafer state, the measurement is performed while also applying a substrate bias to the wafer 2 from the metal chuck 4 that attracts the wafer 2. However, when performing such measurements, the substrate bias generated from the BBG of IC1 is created using an oscillation circuit and fluctuates at a constant frequency, whereas the bias from wafer adsorption chuck 4 is generated using a constant voltage power supply. Since the voltage is supplied from the BBG bias, the circuit characteristics fluctuate due to a phase shift with the BBG bias, which often causes the problem that accurate measurements cannot be made.

(Object of the Invention) The semiconductor wafer of the present invention provides a method for accurately measuring circuit characteristics of an IC with a built-in BBG in a wafer state.

(Structure of the Invention) A semiconductor wafer of the present invention is a semiconductor wafer in which a plurality of semiconductor integrated circuit elements each having a built-in self-substrate bias generation circuit are formed on one principal surface of a semiconductor substrate, and the semiconductor integrated circuit elements are formed on one main surface of a semiconductor substrate. A plurality of self-substrate bias generation circuit elements having the same circuit configuration as the self-substrate bias generation circuit built in the semiconductor integrated circuit element are formed in an area where the semiconductor integrated circuit is not formed on the same main surface, and the semiconductor The present invention is characterized in that the plurality of self-substrate bias generation circuit elements are operated simultaneously when measuring the electrical characteristics of the semiconductor integrated circuit elements included in the wafer.

(Operation of the invention) According to the present invention, a plurality of BBGs with large capacity
By operating the wafers simultaneously, a substrate bias is applied to the wafer, so the entire wafer
The wafer is biased with a BBG that has the same circuit configuration as the BBG of the IC, and the wafer is fixed to a substrate bias that matches the output waveform of the BBG of each individual IC, allowing stable measurements.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.

FIGS. 1a and 1b are a schematic plan view of an embodiment of the present invention and a schematic cross-sectional view for explaining a measuring method. As shown in FIGS. 2a and 2b, a large number of BBG-embedded ICs 1 are formed on a semiconductor substrate wafer 2, and at the same time, a BBG-only chip 5 having the same circuit configuration as the BBG built in the IC 1 and having a large capacity is formed. A plurality of pieces are manufactured on the wafer 2. Connect probe 3 to IC 1 in such a state of wafer 2,
When measuring circuit characteristics, another probe 6 is connected to the metal region provided on the BBG pellet 5 and a bias is applied. If the metal chuck 4 is kept electrically insulated, the potential of the wafer 2 is determined by the substrate bias voltage created by the BBG chip 5, and the potential waveform is
Since this is the same as the BBG built into IC1, the characteristics of IC1 can be measured in the same condition as when IC1 was separated into individual pellets.

It is desirable to place the BBG chip 5 as close to the periphery of the wafer 2 as possible, but if this is difficult,
Only the metal area for bias application is placed at the periphery,
The BBG pellet body may be placed inside the wafer.

(Effects of the Invention) In the present invention, instead of applying an external potential from the metal chuck 4 as in the conventional case, it has the same waveform as the BBG built in the IC chip 1, and only applies a uniform potential to the entire wafer 2. A capable BBG pellet 5 is formed on the wafer, and when measuring the characteristics of IC1, the pellet 5 applies a potential to the substrate, and the potential is in the same phase as the BBG of IC1, so that the characteristics of IC1 can be measured. Measurements can be made extremely stable and accurately.

[Brief explanation of drawings]

Figures 1a and b are a schematic plan view and a schematic cross-sectional view for explaining the measurement method of an embodiment of the present invention, and Figures 2a and b are diagrams of an IC incorporating a conventional self-substrate bias generation circuit. FIG. 2 is a schematic plan view of a formed semiconductor wafer and a schematic cross-sectional view for explaining a measurement method. 1... IC pellet produced on a semiconductor wafer, 2... semiconductor wafer, 3... probe for measuring IC characteristics, 4... metal chuck for wafer adsorption, 5... pellet for BBG, 6... BBG Probe for applying pellet bias.

Claims (1)

[Claims] 1. In a semiconductor wafer in which a plurality of semiconductor integrated circuit elements each having a built-in self-substrate bias generation circuit are formed on one main surface of a semiconductor substrate, the semiconductor integrated circuit elements are formed on the same main surface on which the semiconductor integrated circuit elements are formed. In the area where the wafer is not formed, there are multiple self-substrate bias generation circuit elements that have the same circuit configuration as the self-substrate bias generation circuit built into the semiconductor integrated circuit element and have the ability to uniformly supply a potential to the entire wafer. A semiconductor wafer, characterized in that the plurality of self-substrate bias generation circuit elements are operated simultaneously when measuring the electrical characteristics of the semiconductor integrated circuit elements formed and included in the semiconductor wafer.