JPH0346076B2 - - Google Patents
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- Publication number
- JPH0346076B2 JPH0346076B2 JP59176910A JP17691084A JPH0346076B2 JP H0346076 B2 JPH0346076 B2 JP H0346076B2 JP 59176910 A JP59176910 A JP 59176910A JP 17691084 A JP17691084 A JP 17691084A JP H0346076 B2 JPH0346076 B2 JP H0346076B2
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- Prior art keywords
- signal
- radar
- cslc
- circuit
- signals
- Prior art date
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Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
- G01S13/87—Combinations of radar systems, e.g. primary radar and secondary radar
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- Engineering & Computer Science (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Radar Systems Or Details Thereof (AREA)
Description
【発明の詳細な説明】
〔発明の技術分野〕
この発明は、コヒーレントサイドローブキヤン
セラ〔Coherent Side Lobe Canceler(以下、
CSLCと云う)〕回路を有したレーダ受信機に関
するもので、そのAGC用パイロツトパルス信号
あるいは疑似信号のレーダ受信機への注入タイミ
ングの改善に関するものである。[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a coherent side lobe canceller (hereinafter referred to as
This invention relates to a radar receiver equipped with a CSLC (CSLC) circuit, and is concerned with improving the timing of injection of AGC pilot pulse signals or pseudo signals into the radar receiver.
通常のレーダ受信機の基本的機能は、目標物体
からの反射信号を受信し所定量の増幅を行ない、
検波してビデオ信号に変換して指示機等のレーダ
目標検出装置に出力することである。
The basic function of a normal radar receiver is to receive the reflected signal from a target object and amplify it by a predetermined amount.
This is to detect the signal, convert it into a video signal, and output it to a radar target detection device such as an indicator.
特にレーダ目標検出装置が自動処理方式のもの
である場合には種々の制得変動要因に対処して受
信機出力雑音レベル言いかえれば、受信機利得を
一定に保つことが重要であり、しばしばAGC回
路が用いられる。 Especially when the radar target detection device is of an automatic processing type, it is important to deal with various control fluctuation factors and keep the receiver output noise level constant. A circuit is used.
レーダ受信機のAGC方式には、種々方式が知
られているが比較的よく用いられるものにレーダ
休止期間である受信領域外(デツドタイムとも言
う)中に受信機入力端から規定レベルのパイロツ
トパルス信号を注入し受信機出力端においてパイ
ロツトパルス信号レベルが一定となるように自動
利得制御ループを構成する方式がある。 Various AGC methods are known for radar receivers, but one that is relatively commonly used is to send a pilot pulse signal of a specified level from the receiver input terminal during the radar idle period outside the reception area (also called dead time). There is a method in which an automatic gain control loop is constructed so that the pilot pulse signal level is constant at the output end of the receiver.
また、レーダ装置に入力する不要な干渉波を抑
圧する目的で、補助空中線からの入力信号と主空
中線からの入力信号間で相関性のあるものについ
て主空中線よりの不要入力信号を抑圧するCSLC
回路が用いられる。 In addition, for the purpose of suppressing unnecessary interference waves input to the radar equipment, CSLC suppresses unnecessary input signals from the main antenna when there is a correlation between the input signal from the auxiliary antenna and the input signal from the main antenna.
A circuit is used.
このような方式に関する従来のものの系統図を
第1図に示す、第2図は、その動作説明図であ
る。 A conventional system diagram of such a system is shown in FIG. 1, and FIG. 2 is an explanatory diagram of its operation.
第1図において、1は中間周波(以下IFと言
う)帯の基準信号発振器、2はラジオ周波(以下
RFと言う)帯の局部発振器である。両者の出力
Vc,Vlは、混合器3で混合され電力増幅器4で
送信パルス状に区切られて電力増幅され送信パル
ス信号VTとなつて送受切換器5、方向性結合器
6aを経て、所定の送信パルス繰返周期Tで主空
中線7から空中に放射される。 In Figure 1, 1 is an intermediate frequency (hereinafter referred to as IF) band reference signal oscillator, and 2 is a radio frequency (hereinafter referred to as IF) band reference signal oscillator.
This is a local oscillator for the RF band. Output of both
Vc and Vl are mixed in a mixer 3, divided into transmission pulses in a power amplifier 4, and power-amplified to become a transmission pulse signal V T. The signal passes through a transmission/reception switch 5 and a directional coupler 6a, and then is transmitted as a predetermined transmission pulse. It is radiated into the air from the main antenna 7 at a repetition period T.
方向性結合器6a,6bは、混合器3の出力を
パルス化回路9でパルス状に区切ることによつて
生成するパイロツトパルス信号Vpa,Vpbを2分
配し同一時間に同振幅で主受信系30と補助受信
系40に注入する為の方向性結合器である。 The directional couplers 6a, 6b divide the output of the mixer 3 into two pulses, Vpa, Vpb, which are generated by dividing the output into pulses using the pulse generator 9, and divide the pilot pulse signals Vpa, Vpb into two, and send them to the main receiving system 30 at the same time and with the same amplitude. This is a directional coupler for injecting the signal into the auxiliary reception system 40.
主受信系30への物体からの反射信号及び干渉
波は送信パルス信号VTとは逆の経路で主空中線
7で受信された後、方向性結合器6a、送受信切
換器5を経て広帯域のRF増幅器10aで増幅さ
れる。 The reflected signal and interference wave from the object to the main reception system 30 are received by the main antenna 7 on the opposite path to the transmission pulse signal VT , and then passed through the directional coupler 6a and the transmission/reception switch 5 to the broadband RF The signal is amplified by an amplifier 10a.
このあと受信用の混合器11aで局部発振器2
の局部発振信号Vlと混合され、差周波数のIF受
信信号VMとしてCSLC12に送られる。 After this, the local oscillator 2 is connected to the receiving mixer 11a.
It is mixed with the local oscillation signal Vl of , and sent to the CSLC 12 as the IF reception signal V M of the difference frequency.
補助受信系への物体からの反射信号及び干渉波
は、補助空中線8で受信された後、方向性結合器
6b、RF増幅器10b、混合器11bを経てIF
受信信号VSとしてCSLC回路12へ送られる。 The reflected signal and interference wave from the object to the auxiliary reception system are received by the auxiliary antenna 8, and then passed through the directional coupler 6b, the RF amplifier 10b, and the mixer 11b to the IF.
It is sent to the CSLC circuit 12 as a received signal VS.
ここでIF受信信号VM,VSは、基準信号発振器
1の出力Vcの周波数に等しい。CSLC回路12の
出力信号Voと混合器11bの出力VSは、それぞ
れAGC回路13a,13bでAGC処理され、検
波回路14a,14bで検波されビデオ信号とし
て目標検出装置20に送られる。 Here, the IF received signals V M and V S are equal to the frequency of the output Vc of the reference signal oscillator 1. The output signal Vo of the CSLC circuit 12 and the output V S of the mixer 11b are subjected to AGC processing in AGC circuits 13a and 13b, respectively, detected by detection circuits 14a and 14b, and sent to the target detection device 20 as a video signal.
次に動作について説明する。送信パルス信号
VTとパイロツトパルス信号Vpa,Vpbの時間関
係は第2図のa,bのように設定している。 Next, the operation will be explained. Transmission pulse signal
The time relationship between V T and the pilot pulse signals Vpa and Vpb is set as shown in a and b in FIG. 2.
パイロツトパルス信号Vpa,Vpbは、送信パル
ス信号VTの直前のレーダ最大探知距離以遠に相
当するいわゆるレーダ休止時間に注入され目標か
らの反射信号とは畳上しない。ここで、補助受信
系40と主受信系30には、物体からの反射信号
と干渉波に加え同一時間で同振幅のパイロツトパ
ルス信号が方向性結合器6a,6bにより注入さ
れる。これらの信号は、個々の受信系30,40
で受信処理されて第2図のc,dのIF受信信号
VM,VSとしてCSLC回路12に入力される。
CSLC回路12の目的は、主空中線7より入力さ
れる不要な干渉波を補助空中線8より入力される
干渉波によつて抑圧することであり、VMとVSで
相関性のある信号は、VSを用いVM中の不要波を
抑圧することにある。 The pilot pulse signals Vpa and Vpb are injected during the so-called radar pause time corresponding to the radar maximum detection distance immediately before the transmission pulse signal VT , and do not overlap with the reflected signal from the target. Here, in addition to the reflected signal from the object and the interference wave, pilot pulse signals having the same amplitude at the same time are injected into the auxiliary receiving system 40 and the main receiving system 30 by the directional couplers 6a and 6b. These signals are transmitted to the individual receiving systems 30, 40.
The IF received signals c and d in Figure 2 are received and processed by
The signals are input to the CSLC circuit 12 as V M and V S.
The purpose of the CSLC circuit 12 is to suppress unnecessary interference waves input from the main antenna 7 by interference waves input from the auxiliary antenna 8, and the correlated signals between V M and V S are The purpose is to suppress unnecessary waves in VM using VS.
この作用の為、第2図中のCSLC ON/OFF制
御信号VaeがON(“H”)の時は、主及び補助受
信系30,40に同一信号として注入されたパイ
ロツトパルス信号Vpa,Vpbは相関性を有する為
干渉波と共に抑圧される。しかし、反射信号は各
空中線パターンの差により相関性がなく抑圧され
ることなく第2図fのVOとしてAGC回路13a
に供給される。他方のVSを、AGC回路13bに
供給されAGC処理される。 Because of this effect, when the CSLC ON/OFF control signal Vae in FIG. Since it has a correlation, it is suppressed together with the interference wave. However, the reflected signal has no correlation due to the difference in each antenna pattern, and is not suppressed .
supplied to The other V S is supplied to the AGC circuit 13b and subjected to AGC processing.
AGC回路13a,13bでは、第2図gの
AGCタイミングパルスpa,pbのタイミングにお
けるVOとVSのパイロツトパルス信号Vpa,Vpb
レベルとIF基準値VRとの差分の利得制御を行な
う動作をするが、前記CSLC制御信号VaがONの
時はIF受信信号VM,VSのパイロツトパルス信号
がCSLC回路12により抑圧されている為正常な
AGC動作が出来ない。したがつてこの場合は
CSLC制御信号VaがONとなる以前のAGC補正値
を保持する動作を行なう。その後第2図のh,i
のVba,Vbbは検波回路14a,14bでそれぞ
れ検波され、目標検出装置20に送られ送信処理
される。 In the AGC circuits 13a and 13b, the
Pilot pulse signals Vpa, Vpb of V O and V S at the timing of AGC timing pulses pa, pb
It operates to perform gain control of the difference between the level and the IF reference value VR, but when the CSLC control signal Va is ON, the pilot pulse signals of the IF reception signals V M and V S are suppressed by the CSLC circuit 12. normal
AGC cannot operate. Therefore in this case
An operation is performed to hold the AGC correction value before the CSLC control signal Va turned ON. Then h, i in Figure 2
Vba and Vbb are detected by the detection circuits 14a and 14b, respectively, and sent to the target detection device 20 for transmission processing.
従来のレーダ受信機は以上のように構成されて
いるので、干渉下でCSLC回路の動作をONする
と同一信号として注入されているAGC用パイロ
ツトパルス信号は、CSLC回路12で不要な干渉
波と共に抑圧される為AGC動作の基準信号がな
くなりAGC動作を停止させる他なくなる。この
為CSLC回路が動作してる間の受信系の利得補償
が出来なくなりレーダ装置の性能を劣化させる欠
点があつた。また、レーダ最大探知距離以内に相
当するレーダ受信領域内注入され、レーダ受信機
の性能測定に使用される疑似信号の注入に際して
も同様に抑圧され、後段での受信系の性能測定が
出来ない欠点があつた。 Conventional radar receivers are configured as described above, so when the CSLC circuit is turned on under interference, the AGC pilot pulse signal that is injected as the same signal is suppressed by the CSLC circuit 12 along with unnecessary interference waves. Since the reference signal for AGC operation is lost, there is no other option but to stop AGC operation. For this reason, while the CSLC circuit is operating, gain compensation of the receiving system cannot be performed, which has the disadvantage of degrading the performance of the radar device. In addition, when injecting pseudo signals that are injected into the radar reception area corresponding to the radar's maximum detection distance and used to measure the performance of the radar receiver, they are similarly suppressed, making it impossible to measure the performance of the receiving system at the subsequent stage. It was hot.
この発明は、上記のような従来のものの欠点を
除去するためになされたもので、AGC用パイロ
ツトパルス信号あるいは疑似信号の注入タイミン
グを主受信系補助受信系との間でずらすことによ
り、時間軸で相関性のない信号として干渉下で
CSLC回路を動作させてもパイロツトパルス信号
が抑圧されることなく後段に出力することができ
るレーダ受信機を提供するものである。
This invention was made to eliminate the drawbacks of the conventional systems as described above, and by shifting the injection timing of the AGC pilot pulse signal or pseudo signal between the main reception system and the auxiliary reception system, the time axis can be adjusted. under interference as uncorrelated signals in
To provide a radar receiver capable of outputting a pilot pulse signal to a subsequent stage without being suppressed even when a CSLC circuit is operated.
以下、この発明の一実施例を図について説明す
る。第3図において従来の第1図と異なる点は、
補助受信系40に注入するAGC用パイロツトパ
ルス信号VpbをVpaより時間tだけ遅延させる遅
延回路15を設けた点であり、この遅延回路15
にて遅延されたAGC用パイロツトパルス信号
Vpb′を補助受信系の方向性結合器6bに入力し
ている。
An embodiment of the present invention will be described below with reference to the drawings. The differences in Figure 3 from the conventional Figure 1 are as follows:
The point is that a delay circuit 15 is provided to delay the AGC pilot pulse signal Vpb to be injected into the auxiliary reception system 40 from Vpa by a time t.
AGC pilot pulse signal delayed by
Vpb' is input to the directional coupler 6b of the auxiliary reception system.
次に第4図の動作説明図により動作を説明す
る。 Next, the operation will be explained with reference to the operation explanatory diagram of FIG.
送信パルス信号VTとパイロツトパルス信号
Vpa,Vpb′の時間関係は第3図a,b,cのよ
うに設定している。パイロツトパルス信号Vpa,
Vpb′はレーダ休止時間に注入される。ここで主
受信系30と補助受信系40には、物体からの反
射信号と干渉波に加え時間軸で相異し同振幅のパ
イロツトパルス信号Vpa,Vpb′がそれぞれ方向
性結合器6a,6bにより注入される。これらの
信号は、個々の受信系30,40で受信処理さ
れ、第3図d,eのIF信号VMとVSがCSLC回路
12に入力される。干渉下では、第3図fの
CSLCON/OFF制御信号VaをON(“H”)とし、
CSLC回路12を動作させる。 Transmission pulse signal V T and pilot pulse signal
The time relationship between Vpa and Vpb' is set as shown in Figure 3 a, b, and c. Pilot pulse signal Vpa,
Vpb' is injected during radar downtime. Here, in the main receiving system 30 and the auxiliary receiving system 40, in addition to the reflected signal and interference wave from the object, pilot pulse signals Vpa and Vpb', which are different in the time axis and have the same amplitude, are transmitted through directional couplers 6a and 6b, respectively. Injected. These signals are received and processed by the individual receiving systems 30 and 40, and the IF signals V M and V S shown in FIGS. 3d and 3e are input to the CSLC circuit 12. Under interference, Fig. 3 f
Turn the CSLCON/OFF control signal Va ON (“H”),
The CSLC circuit 12 is operated.
これにより、干渉波は相関性を有する為に抑圧
される。しかし、パイロツトパルス信号Vpa,
Vpb′は時間軸で相異し、また、反射信号は、各
空中線パターンの差により相関性がなく抑圧され
ることなく第3図のgのVOとして次段のAGC回
路13aに供給される。他方の補助受信系40の
IF受信信号VSもAGC回路13aに供給され個々
に受信機利得を一定に保つAGC処理を行なう。 As a result, the interference waves are suppressed because they have correlation. However, the pilot pulse signal Vpa,
Vpb' differs on the time axis, and the reflected signal has no correlation due to the difference in each antenna pattern, and is not suppressed and is supplied to the next stage AGC circuit 13a as V O in g in Fig. 3. . The other auxiliary receiving system 40
The IF received signal V S is also supplied to the AGC circuit 13a and individually performs AGC processing to keep the receiver gain constant.
AGC回路13a,13bでは、第3図のh,
iのAGCタイミングPa,Pbの時間にあたるVOと
VSのパイロツトパルス信号Vpa,Vpb′のレベル
とIF基準値VRとの差分の利得制御を行なう動作
を行なう。このようにパイロツトパルス信号の時
間をずらすことによりCSLC回路12のON/
OFFにかかわらず、AGC処理を行なうことが出
来る。その後第3図j,kのVba,Vbbは検波回
路14a,14bでそれぞれ検波され、目標検出
装置20に送られ信号処理される。 In the AGC circuits 13a and 13b, h in FIG.
V O corresponding to the AGC timing Pa and Pb of i
An operation is performed to control the gain of the difference between the levels of the pilot pulse signals Vpa and Vpb' of V S and the IF reference value VR. By shifting the time of the pilot pulse signal in this way, the ON/OFF state of the CSLC circuit 12 can be controlled.
AGC processing can be performed regardless of whether it is OFF. Thereafter, Vba and Vbb in FIG. 3j and k are detected by detection circuits 14a and 14b, respectively, and sent to target detection device 20 for signal processing.
上記実施例ではAGC用パイロツトパルスの注
入タイミングについて述べたが第5図はこの発明
の他の実施例を示すもので、レーダ受信機の性能
測定に使用する疑似信号の注入に適用したもので
ある。 In the above embodiment, the timing of injection of pilot pulses for AGC has been described, but FIG. 5 shows another embodiment of the present invention, which is applied to the injection of pseudo signals used to measure the performance of a radar receiver. .
第5図において、送信パルス信号VTと疑似信
号Vga,Vgbの時間関係は、第6図a,b,cの
ように設定している。この場合疑似信号Vga,
Vgb′はレーダ受信領域(レーダ最大探知距離以
内)に注入される。ここで主受信系30と補助受
信系40には、物体からの反射信号と干渉波に加
え時間軸で相異し、同振幅の疑似信号Vga,
Vgb′がそれぞれ方向性結合器6a,6bより注
入され個々の受信系で受信処理され、CSLC回路
12に第3図のd,eのIF受信信号VMとVSが入
力される。干渉下で第6図fのCSLC回路ON/
OFF制御信号VaをON(“H”)とすると干渉波は
相関性を有する為に抑圧される。しかし疑似信号
は時間軸上で相異し、また、反射信号は、主及び
補助空中線7,8のパターンの差により相異する
ことにより主受信系の疑似信号はCSLC回路12
で抑圧されることなく第6図gのVOとして次段
の検波回路14aに送られ検波された後ビデオ信
号として目標検出装置20に送られる。これによ
り主受信系30の性能測定がCSLC回路12の動
作ON/OFFに関係なく疑似信号で可能となる。 In FIG. 5, the time relationship between the transmission pulse signal V T and the pseudo signals Vga and Vgb is set as shown in FIG. 6 a, b, and c. In this case, the pseudo signal Vga,
Vgb' is injected into the radar reception area (within the maximum radar detection distance). Here, the main receiving system 30 and the auxiliary receiving system 40 receive a reflected signal from an object and an interference wave, as well as pseudo signals Vga, which are different on the time axis and have the same amplitude.
Vgb' is injected from the directional couplers 6a and 6b, respectively, and is received and processed by each receiving system, and the IF reception signals V M and V S shown at d and e in FIG. 3 are input to the CSLC circuit 12. The CSLC circuit in Figure 6 f is ON/under interference.
When the OFF control signal Va is turned ON (“H”), the interference waves are suppressed because they have a correlation. However, the pseudo signals are different on the time axis, and the reflected signals are different due to the difference in the patterns of the main and auxiliary antennas 7 and 8, so the pseudo signals of the main receiving system are
The signal is sent to the next-stage detection circuit 14a as V O shown in FIG. 6g without being suppressed, and after being detected, is sent to the target detection device 20 as a video signal. This makes it possible to measure the performance of the main receiving system 30 using a pseudo signal regardless of whether the CSLC circuit 12 is ON or OFF.
補助受信系40のVSも同様に検波回路14b
で検波され、ビデオ信号として目標検出装置20
に送られ疑似信号により性能測定が行なわれる。 V S of the auxiliary reception system 40 is also connected to the detection circuit 14b.
The signal is detected by the target detection device 20 as a video signal.
Performance measurements are performed using pseudo signals sent to
なお、上記実施例では、パイロツトパルス信号
あるいは疑似信号の注入時間を主受信系に対して
補助受信系を後にする場合について説明したが、
逆の時間関係で注入しても同様の効果を奏する。 In the above embodiment, the case where the injection time of the pilot pulse signal or pseudo signal is set in the auxiliary receiving system after the main receiving system is explained.
The same effect can be obtained even if the injection is performed in the opposite time relationship.
以上のようにこの発明によれば、補助受信系と
主信号系に注入されるパイロツトパルス信号ある
いは疑似信号の時間を相異させることにより
CSLC回路を有するレーダ装置でCSLC回路を動
作させてもAGC処理あるいはレーダ受信機の性
能測定が可能となる効果がある。
As described above, according to the present invention, by making the times of the pilot pulse signals or pseudo signals injected into the auxiliary reception system and the main signal system different,
Even if the CSLC circuit is operated in a radar device having a CSLC circuit, it is possible to perform AGC processing or measure the performance of the radar receiver.
第1図は従来のレーダ受信機の系統図、第2図
は第1図の動作説明図、第3図はこの発明の一実
施例を示す系統図、第4図は第3図の動作説明
図、第5図はこの発明の他の実施例を示す系統
図、第6図は第5図の動作説明図である。
図中、1は基準信号発振器、2は局部発振器、
3は混合器、4は電力増幅器、5は送受切換器、
6a,6bは方向性結合器、7は主空中線、7は
補助空中線、9はパルス化回路、10a,11b
はRF増幅器、11a,11bは混合器、12は
CSLC回路、13a,13bはAGC回路、14
a,14bは検波回路、15は遅延回路、20は
目標検出装置、31は主受信系、40は補助受信
系である。なお、図中、同一符号は同一、又は相
当部分を示す。
Fig. 1 is a system diagram of a conventional radar receiver, Fig. 2 is an explanation diagram of the operation of Fig. 1, Fig. 3 is a system diagram showing an embodiment of the present invention, and Fig. 4 is an explanation of the operation of Fig. 3. 5 is a system diagram showing another embodiment of the present invention, and FIG. 6 is an explanatory diagram of the operation of FIG. 5. In the figure, 1 is a reference signal oscillator, 2 is a local oscillator,
3 is a mixer, 4 is a power amplifier, 5 is a transmission/reception switch,
6a, 6b are directional couplers, 7 is a main antenna, 7 is an auxiliary antenna, 9 is a pulsing circuit, 10a, 11b
is an RF amplifier, 11a and 11b are mixers, and 12 is an RF amplifier.
CSLC circuit, 13a, 13b are AGC circuits, 14
a, 14b are detection circuits, 15 is a delay circuit, 20 is a target detection device, 31 is a main reception system, and 40 is an auxiliary reception system. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
びその両受信信号の相関性を利用して不要な干渉
波を抑圧するコヒーレントサイドローブキヤンセ
ラ(CSLC)部を有するレーダ受信機において、 レーダ送信パルス周期に等しくかつそのレーダ
受信領域外の期間に自動利得制御用パイロツトパ
ルス信号あるいは、レーダ受信領域内の期間に試
験用疑似パルス信号を発生するパルス発生部と、
このパルス発生部の出力パルスを所定時間遅延さ
せる遅延回路を備え、 上記パルス発生部および遅延回路の出力パルス
を上記主受信部と補助受信部の受信入力側に注入
することを特徴とするレーダ受信機。[Claims] 1. Radar reception having a receiving section consisting of two systems, main and auxiliary, and a coherent sidelobe canceller (CSLC) section that suppresses unnecessary interference waves by utilizing the correlation between both received signals. a pulse generator that generates a pilot pulse signal for automatic gain control during a period equal to the radar transmission pulse period and outside the radar reception area or a test pseudo pulse signal during a period within the radar reception area;
A radar receiver comprising a delay circuit that delays the output pulse of the pulse generator for a predetermined time, and injects the output pulse of the pulse generator and the delay circuit into the reception input side of the main receiver and the auxiliary receiver. Machine.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59176910A JPS6154481A (en) | 1984-08-24 | 1984-08-24 | Radar receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59176910A JPS6154481A (en) | 1984-08-24 | 1984-08-24 | Radar receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6154481A JPS6154481A (en) | 1986-03-18 |
| JPH0346076B2 true JPH0346076B2 (en) | 1991-07-15 |
Family
ID=16021890
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59176910A Granted JPS6154481A (en) | 1984-08-24 | 1984-08-24 | Radar receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6154481A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2021156713A (en) * | 2020-03-26 | 2021-10-07 | 古河電気工業株式会社 | Radar device |
-
1984
- 1984-08-24 JP JP59176910A patent/JPS6154481A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6154481A (en) | 1986-03-18 |
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