JPH0354912B2 - - Google Patents

Description

TECHNICAL FIELD The present invention relates to an image density converter control method used to convert the pixel density of an image signal, and in particular to a method for determining the data of each pixel after density conversion. This relates to input control of the reference line signal used.

Prior Art When performing density conversion of an image signal, data of each pixel after conversion is determined and output by referring to only a portion of the line signals among a plurality of line signals of the original image signal. For example, when the vertical density conversion magnification parameter VR is 4 (1/4 times),
Original data n line signals L0, L1, L2,
..., 1 with reference to line signals L0 and L1
Create and output the line signal of the book, line signal L4,
A second line signal is created and output with reference to L5. In the same manner, two of the four original line signals are referred to and converted and output into one line signal, thereby performing 1/4 density conversion. Which line signal of the original data is to be referred to is appropriately designed with respect to the vertical density conversion magnification parameter VR. Further, each dot signal of one line signal in the horizontal direction is density-converted according to a predetermined condition based on a predetermined dot signal according to a horizontal direction density conversion magnification parameter HR.

In the conventional image density converter control method, when inputting the above-mentioned reference line signal, an external control unit calculates and selects which line signal is to be input as the reference line signal, and generates the reference necessary for density conversion. Controls line signal input. Therefore, the conventional image density converter control method has a drawback in that it is necessary to perform calculation selection in an external control section and input control of the reference line signal every time density conversion is performed.

OBJECT OF THE INVENTION The object of the invention is to solve the above-mentioned conventional drawbacks and
To provide an image density converter control method capable of automatically controlling the input of a reference line signal required for image density conversion on the density converter side without depending on control of an external control signal. It is in.

Configuration of the Invention The present invention controls the input signal of an image density converter that inputs a serial image signal and outputs an image signal density-converted by a part of the input image signal, and the operation of the image density converter. A control device for an image density converter, comprising a first line buffer, a second line buffer, a horizontal address generator that generates a horizontal address to be referenced corresponding to a magnification parameter for image density conversion, and an image density converter. a vertical address generator that generates a vertical address to be referenced in accordance with a magnification parameter; and a vertical address generator and a horizontal address generator that output two outputs of the first line buffer and the second line buffer. a pixel determining circuit that performs image density conversion at a predetermined magnification according to the output of the pixel determining circuit;
a line switcher that reads the serial image signal line by line, switches each line and inputs the signal alternately to the first line buffer and the second line buffer; and a line switch that reads out the serial image signal line by line and inputs the signal alternately to the first line buffer and the second line buffer, and processes each time the reading of one line or the density conversion operation ends. means for outputting an end timing signal; means for inverting a density conversion state signal when the count value of the input line signal becomes larger than the output value of the vertical address generator; and the density conversion when outputting the processing end timing signal. a control section that outputs a line buffer write request signal or a density conversion request signal depending on the state of the state signal, and the control section inputs the serial image signal line by line according to the line buffer write request signal, and means for causing the first line buffer and the second line buffer to be written alternately; and when the line signal written to the first line buffer or the second line buffer is a predetermined reference line, the density conversion request signal is The present invention is characterized in that it includes means for outputting an output to start a density conversion operation, and means for outputting the line buffer write request signal upon completion of the density conversion operation and inputting a line signal for each line.

Embodiments of the Invention Next, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. That is, the line signals L0 to Ln are sequentially input to the preprocessor 1 and temporarily stored, and one line of serial image signals 20 is sequentially output in response to the line buffer write request signal 34 supplied from the control section 10. and is input to the line switch 2. The line switch 2 switches and inputs the serial image signal 20 to the first line buffer 3 or the second line buffer 4 depending on whether the line buffer selection signal 35 output from the control section 10 is positive or negative. The first line buffer 3 and the second line buffer 4 have dot memories for one line, and by writing the serial image signal 20 at the position indicated by the horizontal address 41 supplied from the horizontal address generator 6, Stores one line of dot signals. When one line of dot signals has been stored, the comparator 12 compares the horizontal address 41 with the horizontal width parameter 39 output from the horizontal width register 11 to output a processing end timing signal 40. and is input to the control section 10. In this embodiment, the horizontal address generator 6, the comparator 12, and the horizontal width register 11 constitute "a means for outputting a processing end timing signal each time one line is read or a density conversion operation is completed." ing.

The line buffer selection signal 35 mentioned above is a signal that is inverted every time the line buffer write request signal 34 rises, so for example, the line buffer selection signal 35
is stored in the first line buffer 3, the line signal L1 is stored in the second line buffer 4. On the other hand, the same signals as the second and subsequent signals of the line buffer write request signal 34 are supplied from the control unit 10 to the line counter 8 as the line count pulse 37, and the line counter 8 counts up and refers to the line count pulse 37. The line address 32 is output and inputted to the comparator 9. The comparator 9 receives the next density conversion line address 3 output from the vertical address generator 7.
1 and reference line address 32, reference line address 32>next density conversion line address 31
When this happens, the density conversion state signal 33 is made negative.
That is, in this embodiment, the vertical address generator 7, the line counter 8, and the comparator 9 provide means for making the density conversion state signal negative when the count value of the input line signal becomes larger than the output value of the vertical address generator. ”.

The fact that the density conversion status signal 33 is negative indicates that the reference line signal required for density conversion will be stored in the first line buffer 3 and the second line buffer 4 soon. After the storage is completed, the comparator 12 outputs a processing end timing signal 40. If the density conversion state signal 33 is negative when the processing end timing signal 40 is input, the control unit 10 determines that storage of the reference line signal is completed, and outputs the density conversion request signal 36.
is output and supplied to the horizontal address generator 6 and vertical address generator 7. When the density conversion request signal 36 is input, the vertical address generator 7 adds the contents by the vertical density conversion magnification parameter VR, outputs the next density conversion line address 31, and supplies it to the comparator 9. As a result, the density conversion state signal 33 output from the comparator 9 becomes positive.

On the other hand, the horizontal address generator 6 sequentially outputs the horizontal address 41 indicating the read address of the first line buffer 3 and the second line buffer 4 in response to the input of the density conversion request signal 36, and also outputs the density conversion condition signal 27 is output to the pixel determining circuit 5. The horizontal address 41 is skipped as appropriate according to the horizontal density conversion parameter HR.
For example, it is output in 4 jumps. In addition, the density conversion condition signal 27 is also the horizontal density conversion magnification parameter HR
etc. is output according to the following. Similarly, the vertical address generator 7 outputs a density conversion condition signal 29 and supplies it to the pixel determination circuit 5. The pixel determination circuit 5 receives density conversion image signals 23 and 24 inputted from the first line buffer 3, similar density conversion image signals 25 and 26 inputted from the second line buffer 4, and a density conversion condition signal 27. , 29, and output the density conversion output signal 38, which is the same as the conventional method, and since these are not directly related to the present invention, a detailed explanation will be given. Omitted.

The output of the horizontal address generator 6 causes the first
When the last data of the line buffer 3 and the second line buffer 4 are read out and the density conversion is completed, the comparator 12 outputs the processing end timing signal 40, and the control section 10 stops the density conversion request signal 36. At this time, density conversion state signal 3
3 is positive, the line buffer write request signal 34 is output again, and the next line signal is input from the preprocessor 1. In addition, line switch 2
is inverted and the serial image signal 20 is written to the first line buffer 3, and the line switch 2 performs an inverting operation every time one line ends, and the input line signal is written to the first line buffer 3 and the second line buffer 4. The first line buffer 3 is written alternately.
and the second line buffer 4 are rewritten with new line data. Then, the line counter 8 counts up the line count pulse 37 for each line, and when the reference line address 32 exceeds the next density conversion line address 31, the density conversion state signal 33 becomes negative, and the processing end timing signal 40 is sent to the control section. 10, a density conversion request signal 36 is output, and the density conversion is performed in the same manner as described above using the accumulated data of the first line buffer 3 and the second line buffer 4 at this time. That is, in this embodiment, when the reference line data required for density conversion is stored in the first line buffer 3 and the second line buffer 4, the control unit 10 sends the density conversion request signal 36. After the density conversion is completed, the line buffer write request signal 3 is output.
4 to sequentially output line signals from the preprocessor 1, and by inverting the line switch 2 every time one line signal is written, the line signals are alternately sent to the first line buffer 3 and the second line buffer 4. After storing the necessary reference line data, the next density conversion operation can be performed. That is, there is no need for an external control unit to control the selection of reference lines through complicated calculations as in the past, and the line buffer write request signal 34 and Density conversion request signal 36
is output to control input data storage and density conversion operations. Therefore, the external control section only needs to perform simple control during data transfer.

Note that when the two reference line signals are converted, the upper reference line signal (the one with the lower vertical address) is stored in the first line buffer 3 and the lower reference line signal is stored in the second line buffer 4. If the upper reference line signal is
In some cases, the lower reference line signal is stored in the first line buffer 3. Which line buffer stores the upper reference line signal can be determined based on whether the line buffer selection signal 35 is positive or negative. When the line buffer selection signal 35 is negative, density conversion is performed assuming that the first line buffer 3 stores the upper reference line signal and the second line buffer 4 stores the lower reference line signal, and the line buffer selection signal 35 When is positive, the density conversion operation is performed assuming that the second line buffer 4 stores the upper reference line signal and the first line buffer 3 stores the lower reference line signal.

Next, the operation of this embodiment will be explained with reference to FIG. In FIG. 2, the vertical density conversion magnification parameter VR is 4, density conversion is performed using two of the four line signals as reference lines,
It is a time chart showing various signals when determining one output dot line after density conversion.

First, when the process starts, the line buffer write request signal 34 is raised as shown in FIG. 2E, and the line signal L0 is output from the preprocessor 1 in FIG. (At this time, the line buffer selection signal 35 is
(assumed to be negative as shown in Figure H). Upon completion of writing one line signal, the line buffer write request signal 34 falls, and a processing end timing signal 40 is output as shown in FIG.
Now, the next density conversion line address 31 output from the vertical address generator 7 and line counter 8
Since the reference line address 32 is "0" as shown in A and B in the figure, the density conversion state signal 33 outputted by the comparator 9 is positive as shown in D in the figure, and the control unit 10 outputs the line buffer write request signal 34 again in response to the processing end timing signal 40. Simultaneously with this second line buffer write request signal 34, a line count pulse 37 is sent from the control section 10 as shown in FIG.
is output and supplied to the line counter 8, the line counter 8 counts up, and the reference line address 32 becomes "1" as shown in FIG. As a result, the density conversion state signal 33 output from the comparator 9 becomes negative as shown in FIG. On the other hand, the line buffer selection signal 35 is inverted by the line count pulse 37 (the same pulse as after the second pulse of the line buffer write request signal 34) and becomes positive as shown in FIG. 4 is written. When writing of the line signal L1 to the second line buffer 4 is completed, a processing end timing signal 40 is output (see C in the same figure). Now, since the density conversion state signal 33 is negative, the control unit 10 outputs the density conversion request signal 36 and supplies it to the vertical address generator 7 and the line counter 8, as shown in FIG. 8 adds +4 to the contents, and the next density conversion line address 31 becomes "4". Therefore, the density conversion state signal 33 becomes positive again as shown in FIG. Then, the horizontal address 4 outputted by the horizontal address generator 6
1 reads the dot signals necessary for density conversion from the first line buffer 3 and the second line buffer 4 and inputs them to the pixel determining circuit 5, which in turn inputs the above signals and the horizontal direction address generator 6 and A predetermined density conversion operation is performed according to the density conversion condition signal 27 and the density conversion condition signal 29 supplied from the vertical address generator 7 to determine the data of each pixel, and a density conversion output signal 38 is output. . When one line of the density conversion output signal 38 is output and the conversion operation is completed, the processing end timing signal 40 is output, and since the density conversion state signal 33 is positive at this time, the control unit 10
The density conversion request signal 36 is stopped and the line count pulse 37 is output. Further, the line buffer selection signal 35 is inverted and becomes negative by the rise of the line count pulse 37. Then, the line signal L2 is written to the first line buffer 3,
Upon completion of writing, the line buffer selection signal 35
is inverted, and line signal L3 is now written to second line buffer 4. Next, when the line signal L4 is written to the first line buffer 3, and then the line signal L5 is started to be input to the second line buffer 4, the density conversion state signal 33 becomes negative (see D in the figure), and the line signal L5 is input to the second line buffer 4. When the processing end timing signal 40 is output at the end of writing of the signal L5, the control unit 10 outputs the density conversion request signal 36 and
The second density conversion operation is started. Therefore, the second density conversion is performed using the line signal L4 and line signal L5 stored in the first line buffer 3 and the second line buffer 4 as reference line signals. Similarly, 4
Two of the lines are automatically selected as reference lines, and the pixel determining circuit 5 determines data for each pixel based on the line signals of the reference lines, and outputs density-converted dot line signals.

Effects of the Invention As described above, in the present invention, a signal for one line is inputted by a line buffer write request signal, and the line signal for one line is written into the first line buffer and the second line buffer alternately.
When the output of the line counter becomes larger than the output of the vertical address generator, the density conversion state signal is made negative, and when the density conversion state signal is negative and the processing end timing signal is output, a density conversion request signal is output. Since the configuration is such that the density conversion operation is started, and after the density conversion is finished, the input line signal is written alternately to the first line buffer and the second line buffer by the above-mentioned operation, the same as in the conventional method. There is an advantage that a reference line can be automatically determined within the present device without depending on an external control section, and a density conversion output signal can be output by processing the reference line signal.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention;
FIG. 2 is a time chart showing signals of various parts for explaining the operation of the above embodiment. In the figure, 1: front-stage processor, 2: line switcher, 3: first line buffer, 4: second line buffer, 5: pixel determination circuit, 6: horizontal address generator, 7: vertical address generator ,
8: line counter, 9: comparator, 10: control unit, 11: horizontal width register, 12: comparator,
20: Serial image signal, 23 to 26: Image signal for density conversion, 27, 29: Density conversion condition signal, 31: Next density conversion line address, 32:
Reference line address, 33: Density conversion status signal,
34: Line buffer write request signal, 35: Line buffer selection signal, 36: Density conversion request signal, 37: Line count pulse, 38: Density conversion output signal, 39: Horizontal direction width parameter, 4
0: Process end timing signal, 41: Horizontal direction address.

Claims (1)

[Claims] 1. Controlling the input signal of an image density converter that inputs a serial image signal and outputs an image signal density-converted by a part of the input image signal and the operation of the image density converter. A control device for an image density converter includes: a first line buffer 3 and a second line buffer 4; a horizontal address generator 6 that generates a horizontal address to be referenced in accordance with a magnification parameter for image density conversion; a vertical address generator 7 that generates a vertical address to be referenced in accordance with a magnification parameter for image density conversion; and two outputs of the first line buffer and second line buffer that are connected to the vertical address generator and horizontal a pixel determination circuit that performs image density conversion at a predetermined magnification according to the output of the direction address generator; and a pixel determination circuit that reads out the serial image signal line by line and switches the serial image signal line by line to the first line buffer and the second line buffer. a line switch 2 for alternately inputting the input line to the input line; a means for outputting a processing end timing signal 40 each time reading of one line or density conversion operation is completed; and a count value of the input line signal is output from the vertical address generator. means for inverting the density conversion state signal 33 when the density conversion state signal 33 becomes larger than a value; and a control unit outputting a line buffer write request signal 34 or a density conversion request signal 36 depending on the state of the density conversion state signal when the processing end timing signal is output. 10, the control section inputs serial image signals one line at a time in response to the line buffer write request signal, and causes the serial image signals to be written into the first line buffer and the second line buffer alternately; means for outputting the density conversion request signal to start the density conversion operation when the line signal written in the first line buffer or the second line buffer is a predetermined reference line; A control device for an image density converter, comprising means for outputting a line buffer write request signal and inputting line signals for each line.