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JPH035646B2 - - Google Patents
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JPH035646B2 - - Google Patents

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Publication number
JPH035646B2
JPH035646B2 JP58204040A JP20404083A JPH035646B2 JP H035646 B2 JPH035646 B2 JP H035646B2 JP 58204040 A JP58204040 A JP 58204040A JP 20404083 A JP20404083 A JP 20404083A JP H035646 B2 JPH035646 B2 JP H035646B2
Authority
JP
Japan
Prior art keywords
capacitor
capacitance
electrode
electrodes
multilayer ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58204040A
Other languages
Japanese (ja)
Other versions
JPS6095914A (en
Inventor
Tsuneharu Katada
Mitsuo Okazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Panasonic Holdings Corp
Original Assignee
TDK Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp, Matsushita Electric Industrial Co Ltd filed Critical TDK Corp
Priority to JP58204040A priority Critical patent/JPS6095914A/en
Publication of JPS6095914A publication Critical patent/JPS6095914A/en
Publication of JPH035646B2 publication Critical patent/JPH035646B2/ja
Granted legal-status Critical Current

Links

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  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は電子機器等に使用される積層セラミツ
クコンデンサに関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a multilayer ceramic capacitor used in electronic equipment and the like.

従来例の構成とその問題点 近年、電子機器に積層セラミツクコンデンサが
多く利用されてきた。
Conventional configurations and their problems In recent years, multilayer ceramic capacitors have been widely used in electronic devices.

以下に異なる容量値のコンデンサを有する従来
の積層セラミツクコンデンサについて説明する。
第1図は従来の積層セラミツクコンデンサを示
す。第1図において、1はセラミツク誘電体、2
は大容量値のコンデンサaの一方の電極、3はそ
のコンデンサaの他方の電極、4は小容量値のコ
ンデンサbの一方の電極、5はそのコンデンサb
の他方の電極である。
A conventional multilayer ceramic capacitor having capacitors with different capacitance values will be described below.
FIG. 1 shows a conventional multilayer ceramic capacitor. In FIG. 1, 1 is a ceramic dielectric, 2
is one electrode of a capacitor a with a large capacitance value, 3 is the other electrode of the capacitor a, 4 is one electrode of a capacitor b with a small capacitance value, and 5 is the capacitor b.
is the other electrode.

以上の様に構成された複合コンデンサにおい
て、まず、コンデンサaの静電容量は一般式 C=8.855×ε×S1×n/t ……(1) ε:誘電体1の誘電率 S1:電極2と3の対面している面積 n:層数(第1図ではn=4) t:電極2と3のギヤツプ長 によつて求めることが出来る。またコンデンサb
の静電容量も同様に次式で求まる。
In the composite capacitor configured as above, first, the capacitance of capacitor a is expressed by the general formula: C=8.855×ε×S 1 ×n/t ……(1) ε: Dielectric constant of dielectric 1 S 1 : The area where electrodes 2 and 3 face each other can be determined from n: number of layers (n=4 in FIG. 1), and t: gap length between electrodes 2 and 3. Also capacitor b
Similarly, the capacitance of can be found using the following formula.

C=8.855×ε×S2×n/t ……(2) ε:誘電体1の誘電率 S2:電極4と5の対面している面積 n:層数(第1図ではn=4) t:電極4と5のギヤツプ 一般的に積層セラミツクコンデンサは印刷法あ
るいはシート法によつて作られ、第1図の様な複
合コンデンサを作る場合、コンデンサaとコンデ
ンサbとの間では誘電率ε、電極間ギヤツプ長t
及び層数nは同一となり、静電容量の設定は主面
が対向する電極面積S1及びS2で行なうことが知ら
れている。
C=8.855×ε×S 2 ×n/t...(2) ε: Dielectric constant S 2 of dielectric 1: Area where electrodes 4 and 5 face each other n: Number of layers (n=4 in Figure 1) ) t: Gap between electrodes 4 and 5 Multilayer ceramic capacitors are generally manufactured by the printing method or sheet method, and when making a composite capacitor like the one shown in Figure 1, the dielectric constant between capacitor a and capacitor b is ε, gap length between electrodes t
and the number of layers n are the same, and it is known that the capacitance is set in the electrode areas S 1 and S 2 whose main surfaces face each other.

しかしながら、上記の従来の構成では、特に第
1図に示すコンデンサaとコンデンサbの容量比
を大きくする様な場合、面積比を容量比と同じに
しなければならず、工法上から最小面積は一般的
に0.5〜0.3mm角であつて限界があつた。また面積
を大きくとれば外形サイズが大きくなり、使用上
の制限が出たり、コスト高になるという問題点を
有していた。
However, in the above conventional configuration, especially when increasing the capacitance ratio of capacitor a and capacitor b shown in Fig. 1, the area ratio must be made the same as the capacitance ratio, and the minimum area is generally Generally speaking, it was 0.5 to 0.3 mm square, which was the limit. In addition, if the area is increased, the external size becomes larger, which poses a problem in that usage is restricted and costs increase.

発明の目的 本発明は上記従来の問題点を解消するもので、
複合化される異なる容量値のコンデンサの静電容
量比を非常に大きくとることができると共に各々
のコンデンサの静電容量値を正確に設定すること
ができる積層セラミツクコンデンサを提供するこ
とを目的とする。
Purpose of the invention The present invention solves the above-mentioned conventional problems.
It is an object of the present invention to provide a laminated ceramic capacitor in which the capacitance ratio of capacitors of different capacitance values to be combined can be made very large, and the capacitance value of each capacitor can be accurately set. .

発明の構成 本発明は、上記目的を達成するため、同一のコ
ンデンサ本体内に異なる容量値のコンデンサを複
合化するに際し、大容量コンデンサは電極の主面
を対向させることにより構成し、小容量コンデン
サは電極の端面を対向させることにより構成した
ことを特長とするものである。
Structure of the Invention In order to achieve the above-mentioned object, the present invention, when combining capacitors with different capacitance values in the same capacitor body, a large-capacity capacitor is configured by having the main surfaces of electrodes facing each other, and a small-capacity capacitor is The feature is that the end surfaces of the electrodes are arranged to face each other.

実施例の説明 第2図は本発明の一実施例における積層セラミ
ツクコンデンサを示す。第2図において1は誘電
体、2は大容量値のコンデンサaの一方の電極、
3はそのコンデンサaの他方の電極、6は小容量
値のコンデンサbの一方の電極、7はそのコンデ
ンサbの他方の電極である。本実施例の場合、コ
ンデンサbの電極構造は第3図に示すようにくし
形の形状をなしており、それぞれのくし形の形状
の電極6,7の端面が同一の平面上において対向
することにより、その対向する電極6,7間に容
量を形成することができるものである。ここで、
使用する誘電体1の誘電率が大きい場合、くし形
状の電極6,7で形成したコンデンサ6の静電容
量は小さく、同じ誘電体1内につくられ別のコン
デンサaの静電容量は大きく、その容量比は少な
くとも100を越えるように構成することができる
ものである。
DESCRIPTION OF THE EMBODIMENTS FIG. 2 shows a multilayer ceramic capacitor in one embodiment of the present invention. In Fig. 2, 1 is a dielectric, 2 is one electrode of a capacitor a with a large capacitance value,
3 is the other electrode of the capacitor a, 6 is one electrode of the capacitor b having a small capacitance value, and 7 is the other electrode of the capacitor b. In the case of this embodiment, the electrode structure of the capacitor b has a comb shape as shown in FIG. 3, and the end surfaces of the comb-shaped electrodes 6 and 7 face each other on the same plane. Accordingly, a capacitance can be formed between the opposing electrodes 6 and 7. here,
When the dielectric constant of the dielectric 1 used is large, the capacitance of the capacitor 6 formed by the comb-shaped electrodes 6 and 7 is small, and the capacitance of another capacitor a formed in the same dielectric 1 is large. The capacity ratio can be configured to exceed at least 100.

以上の様に構成された本実施例の積層セラミツ
クコンデンサにおいて、まず、コンデンサaは従
来と同じ構成であり、その静電容量は従来と同様
に設定される。次にコンデンサbの静電容量を求
める計算式は複雑で難解であるが、ここでは実験
式としての簡易的に次式で求めることが出来る。
In the multilayer ceramic capacitor of this embodiment constructed as described above, capacitor a has the same structure as the conventional one, and its capacitance is set in the same manner as the conventional one. Next, the formula for calculating the capacitance of capacitor b is complicated and difficult to understand, but it can be calculated using the following formula as a simple experimental formula.

C=KO×K×l×ε×na/G ……(3) ここで、 KO:εOに相当する係数 K:電極形状パラメータ(実験値) l:電極相互の沿面長 ε:誘電体の誘電率 n:層数 a:層数に関係する定数(実験値では0.2) G:電極6と7の間隔 第2図および第3図で明らかな様に電極6と7
は同一平面上に印刷されているものであり、その
静電容量は前掲の計算式で明らかな様に各々の変
数を変えることにより設定可能であるが、主に電
極間隔G、沿面長lによつて設定することが望ま
しい。
C=K O ×K×l×ε×n a /G ……(3) Here, K O :Coefficient corresponding to ε O K: Electrode shape parameter (experimental value) l: Creepage length between electrodes ε: Dielectric constant n: Number of layers a: Constant related to the number of layers (experimental value: 0.2) G: Distance between electrodes 6 and 7 As is clear from Figures 2 and 3, electrodes 6 and 7
are printed on the same plane, and the capacitance can be set by changing each variable, as is clear from the above calculation formula, but it is mainly determined by the electrode spacing G and creepage length l. It is desirable to set the

以上の様に本実施例によれば、複合コンデンサ
の内、小容量コンデンサaの電極6,7の形状を
くし形状とし、それらの電極6,7の端面を対向
させ、電極間隔G、沿面長lを設定することによ
り、静電容量値の設定が容易となる。すなわち、
第4図ロに示すように従来の層数nに関係する定
数が変化の大きいものであるのに対し、電極層数
nとnに関係する定数aの関数値naが第4図の曲
線イに示すように非常に変化の小さい定数となる
為、大容量コンデンサaを形成する為の層数を大
きくしても小容量コンデンサbへの影響が小さ
く、小容量コンデンサbが非常に形成しやすい利
点をもつ。また、1対のくし形状の電極6,7で
形成出来る静電容量をつかんでおけば、くし形状
の数によつて静電容量を設定することが出来、静
電容量値の設計や変更に容易に対応することが出
来る。
As described above, according to this embodiment, the electrodes 6 and 7 of the small capacity capacitor a of the composite capacitor are comb-shaped, and the end surfaces of the electrodes 6 and 7 are opposed to each other, and the electrode spacing G and the creepage length are By setting l, it becomes easy to set the capacitance value. That is,
As shown in Figure 4B, the conventional constant related to the number of layers n has a large change, whereas the function value n a of the constant a related to the number n of electrode layers and n is the curve in Figure 4. As shown in A, the constant changes very little, so even if the number of layers to form large capacity capacitor a is increased, the effect on small capacity capacitor b is small, and small capacity capacitor b is formed very easily. It has the advantage of being easy to use. Also, if you know the capacitance that can be formed by a pair of comb-shaped electrodes 6 and 7, you can set the capacitance depending on the number of comb-shaped electrodes, and you can easily design or change the capacitance value. It can be easily handled.

本実施例の如き電極形状での実験結果では、誘
電体の誘電率約3000において大容量コンデンサ
100nF、小容量コンデンサ100pFを有する複合コ
ンデンサを得ることが出来た。
Experimental results using an electrode shape as in this example show that a large capacitance capacitor with a dielectric constant of approximately 3000
We were able to obtain a composite capacitor with a capacitance of 100nF and a small capacitance of 100pF.

発明の効果 本発明は、積層される電極の端面を対向させて
容量を得るように構成したので、使用する誘電体
の誘電率が大きくても小容量コンデンサの値を安
定且つ容易に設定することが出来、さらに大容量
コンデンサとの複合化に際し、その容量比を非常
に大きくとることが出来るものである。
Effects of the Invention The present invention is configured such that the end faces of the laminated electrodes face each other to obtain capacitance, so that the value of a small capacitance capacitor can be stably and easily set even if the dielectric constant of the dielectric used is large. Furthermore, when combined with a large-capacity capacitor, the capacitance ratio can be made extremely large.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図aは従来の積層セラミツクコンデンサの
平面模式図、第1図bは同コンデンサの側面模式
図、第2図aは本発明の一実施例における積層セ
ラミツクコンデンサ平面模式図、第2図bは同コ
ンデンサの側面模式図、第3図は同コンデンサの
要部の拡大図、第4図は層数nと静電容量に対す
る定数naの関数特性図である。 1……誘電体、2……コンデンサaの一方の電
極、3……コンデンサaの他方の電極、6……コ
ンデンサbの一方の電極、7……コンデンサbの
他方の電極。
FIG. 1a is a schematic plan view of a conventional multilayer ceramic capacitor, FIG. 1b is a schematic side view of the same capacitor, FIG. 2a is a schematic plan view of a multilayer ceramic capacitor according to an embodiment of the present invention, and FIG. 2b is a schematic side view of the capacitor, FIG. 3 is an enlarged view of the main parts of the capacitor, and FIG. 4 is a functional characteristic diagram of the number of layers n and the constant n a with respect to capacitance. DESCRIPTION OF SYMBOLS 1... Dielectric, 2... One electrode of capacitor a, 3... The other electrode of capacitor a, 6... One electrode of capacitor b, 7... The other electrode of capacitor b.

Claims (1)

【特許請求の範囲】[Claims] 1 同一コンデンサ本体内に異なる容量値のコン
デンサを複数個有するように構成した積層セラミ
ツクコンデンサであつて、大きい容量値のコンデ
ンサは電極の主面を対向させることにより構成
し、小さい容量値のコンデンサは電極の端面を対
向させることにより構成したことを特徴とする積
層セラミツクコンデンサ。
1. A multilayer ceramic capacitor configured to have multiple capacitors with different capacitance values in the same capacitor body, where the capacitor with a large capacitance value is constructed by having the main surfaces of the electrodes facing each other, and the capacitor with a small capacitance value is constructed by having the main surfaces of the electrodes facing each other. A multilayer ceramic capacitor characterized by being constructed by having electrode end faces facing each other.
JP58204040A 1983-10-31 1983-10-31 Multilayer ceramic capacitor Granted JPS6095914A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58204040A JPS6095914A (en) 1983-10-31 1983-10-31 Multilayer ceramic capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58204040A JPS6095914A (en) 1983-10-31 1983-10-31 Multilayer ceramic capacitor

Publications (2)

Publication Number Publication Date
JPS6095914A JPS6095914A (en) 1985-05-29
JPH035646B2 true JPH035646B2 (en) 1991-01-28

Family

ID=16483756

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58204040A Granted JPS6095914A (en) 1983-10-31 1983-10-31 Multilayer ceramic capacitor

Country Status (1)

Country Link
JP (1) JPS6095914A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2531950Y2 (en) * 1991-04-23 1997-04-09 松下電工株式会社 Storage furniture

Also Published As

Publication number Publication date
JPS6095914A (en) 1985-05-29

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