JPH036466B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is a measuring device for measuring distortion rate and measuring the magnitude of a specific harmonic component, and the present invention is a measuring device for measuring distortion rate and measuring the magnitude of a specific harmonic component. It is related to the device.

In order to measure the distortion factor, generally a circuit is configured as shown in Fig. 1, and the input signal input from the input terminal I is passed through the variable attenuator 1 and the buffer amplifier 2, and then sent to the switches S ₁ and S _{2 .} For example, a band remover 3 for removing the fundamental wave consisting of a Wien bridge circuit
The signal is inputted to a level meter 6 via a variable attenuator 4 and an amplifier 5 or directly. To measure this, first turn switches S ₁ and S ₂ to the 1 side, measure the fundamental wave level of the input signal, and then turn the switches S 1 and S 2 to the 1 side.
S ₁ and S ₂ are switched to the 2 side, the level of the signal from which only the fundamental wave component of the input signal is removed by the band remover 3 is measured, and the distortion factor is determined from the ratio of these signals.

However, with this conventional strain rate measuring device,
It is necessary to tune the band remover 3 according to the frequency of the input signal, which makes the structure of the band remover 3 complicated and requires time and skill to operate, which is extremely important as it affects measurement accuracy. It is something. This problem also applies to harmonic analysis using a bandpass filter instead of a bandpass remover.

The inventor of the present invention has discovered that there is no need to perform a tuning operation on the filter consisting of this band rejector, etc., and the structure of the band rejector is simple, making it extremely easy to handle and capable of measuring and specifying distortion rates with high precision. In order to realize a distortion rate measuring device capable of analyzing the harmonics of The device calculates the level value at the output and measures the distortion rate from the ratio using the input signal level as a reference, and the digital processing circuit includes a multiplier circuit that multiplies the frequency of the input signal, and an output from the multiplier circuit. an analog-to-digital conversion circuit that extracts the input signal level at that time and converts it into a digital quantity each time an output signal is received; a memory circuit that stores the converted digital quantity; and a digital-to-analog conversion circuit that continuously reads out the digital quantity at a fixed period determined by the tuning frequency of the filter, converts it into an analog quantity, and outputs it, and the digital-to-analog conversion circuit outputs the digital quantity at the fixed period. We have developed a distortion rate measuring device that obtains an analog signal with a fixed frequency.

Figure 2 shows a basic block circuit configuration diagram of such a distortion rate measuring device, and the variable attenuator 1, buffer amplifier 2, variable attenuator 4, amplifier 5, and level meter 6 are the same as those in Figure 1. Similar to the conventional device, the band rejector 3a has a fixed tuning frequency, and the portion surrounded by the dotted line is the digital processing circuit 10 added to the conventional device. This digital processing circuit 10 is inserted between the switch S ₁ and the band rejector 3a, and when measuring the fundamental wave level, the input signal is passed through the second side of the switch S ₁ and then through this digital processing circuit 10. It is input to the level meter 6 from the 1' side of switch _S2 . Further, when the fundamental wave is removed, the output from the digital processing circuit 10 passes through the band remover 3a and is input to the level meter 6 from the 2 side of the switch _S2 . Of course, when measuring the fundamental wave level, it is possible to set both switches S ₁ and S ₂ to 1, but in order to match the measurement conditions with those for removing the fundamental wave, the digital processing circuit It is preferable to go through 10.

In this digital processing circuit 10, the output from the buffer amplifier 2 is branched into two branches, one of which is input to an analog-to-digital conversion circuit (hereinafter referred to as A/D/C) 11 via a switch _S1 . The other signal is input to a multiplier circuit 12 that multiplies the frequency of the input signal by N times. The output of the multiplier circuit 12 is A/D・C11
According to the signal from the multiplier circuit 12, the instantaneous value of the input signal is converted into a digital quantity in the A/D/C 11 and sequentially stored in the storage circuit. The digital quantities stored in this memory circuit 13 are sequentially read out in accordance with a signal from a clock pulse generation circuit 14 that oscillates at a constant frequency.
Digital-to-analog conversion circuit (hereinafter referred to as D/A・C) including a low-pass filter that removes quantization noise
15, it is converted into an analog quantity and output from the digital processing circuit 10. Further, these operations are controlled by a control circuit 16,
Writing to the memory circuit 13 is instructed upon receiving a conversion end signal from the A/D/C 11, and a read instruction is obtained upon receiving a clock pulse signal from the clock pulse generating circuit 14.

The operation of this digital processing circuit 10 will be described with reference to the more detailed block diagram shown in FIG. 3 and the time chart shown in FIG. The input signal is input to the A/D/C 11 and the multiplier circuit 12 as a sine wave signal with a frequency of _0. In the multiplier circuit 12, it is first shaped into a rectangular wave by the shaping circuit 121, and then subjected to phase comparison. The signal is inputted to the voltage controlled oscillation circuit 123 via the circuit 122, where a frequency N times (N is a positive integer) the frequency ₀ of the input signal is created as shown in FIG. 4A. Furthermore, C ₁ shown in Figure 4B,
In the frequency dividing circuit 124 of the C ₂ . In the phase comparator circuit 122, an output voltage proportional to the phase difference Δθ between the output from the shaping circuit 121 and the output of the Ck stage of the frequency dividing circuit 124 as shown in FIG. In _other words, the voltage controlled oscillation circuit 12
3 is controlled.

In addition, the output of the voltage controlled oscillation circuit 123 is an A/D
The input signal is applied to the A/D C11 as a control signal, and at this timing, the A/D C11 converts the input signal into a digital quantity and sequentially writes it into the storage circuit 13 as described above. As the storage circuit 13, it is preferable to employ a random access memory called a RAM, but a shift register or the like may also be used. When writing to the memory circuit 13, an address is specified from the frequency dividing circuit 124 via the switching circuit 17. That is, as shown in FIG. 4E, the input signal is divided into values A _o-1 , A ₀ , A ₁ , A ₂ . circuit 1
The counter value is stored in the memory circuit 13 as shown in FIG. 5 in association with the count value output at step 24, which is the address shown in FIG. 4C.

The output from the clock pulse generation circuit 14 is output to the frequency divider circuit 18 and the control circuit 16, and the clock pulses are counted in the same way in the frequency divider circuit 18, which has the same circuit configuration as the frequency divider circuit 124, and the counted value is The signal is input to the storage circuit 13 via the switching circuit 17 as an address designation signal. Each time a pulse is received from the clock pulse generation circuit 14, data is read from the designated address of the storage circuit 13, and the read data is converted into an analog quantity by the D/A/C 15. There is. The output from the frequency divider circuit 124 and the output from the frequency divider circuit 18 are both input to the storage circuit 13 as an address designation signal via the switching circuit 17, but if these outputs are input to the switching circuit 17 at the same time In response to a command from the control circuit 16, for example, input from the clock pulse generation circuit 14 is given priority, that is, reading is given priority, and writing is temporarily delayed.

By inserting such a digital processing circuit 10 into the device, the input signal can be
is converted into a digital amount of data, and the storage circuit 1
However, the data stored in the memory circuit 13 is stored in the clock pulse generation circuit 14.
Since it is read according to the clock frequency from
An output with a constant period can be obtained from the D/A/C 15 regardless of the frequency of the input signal. In other words, the analog signal obtained from the D/A/C 15 has a fixed frequency whose period is N times the above-mentioned fixed period. Therefore, the characteristics of the band rejector 3a may be designed to correspond to a fixed frequency obtained by reducing the clock frequency to 1/N, and there is no need to tune it each time depending on the frequency of the input signal.

The above-mentioned distortion rate measuring device is suitable for input signals with a relatively low frequency, but when the frequency of the input signal becomes high, there is a good chance that the conversion time of the A/D/C 11 will not be able to follow the extraction cycle. It is in. In reality, high-resolution, high-speed A/D/Cs exist, but they are extremely expensive.

An object of the present invention is to provide a distortion rate measuring device that operates properly even when the input frequency is high, and that can be constructed at low cost without using an expensive A/D conversion circuit. .

In order to achieve such an object, the distortion rate measuring device of the present invention extracts the instantaneous values of the input signal at a ratio of N points at constant phase intervals during L periods of the input signal, and converts them into digital values. Then, by sequentially storing this data in a memory circuit having N addresses and reading out the stored data in the order of the phase of the input signal at a constant cycle and converting it into an analog quantity, This is to obtain a fixed frequency analog signal with a period of .

FIG. 6 shows a digital processing circuit 20 of a distortion rate measuring device according to the present invention, and in comparison with the circuit shown in FIG. An address conversion storage circuit 21 is added at a subsequent stage, and a sample hold circuit 22 is added at a stage before the A/D/C 11. The 1/L frequency divider circuit 125 is a circuit for completing the acquisition of a series of data in L periods of the input signal.
The address conversion memory circuit 21 is, for example, a so-called ROM.
It consists of a read-only memory called A/
This circuit is for reading out data in phase order at the time of reading since conversion by the D.C11 cannot be performed in phase order. Further, the sample and hold circuit 22 is a circuit for grasping the instantaneous value of the input signal during analog-to-digital conversion and holding the input voltage to the A/D/C 11 constant during the conversion operation.

If you add these circuits and set L to 3, a series of data will be captured in 3 cycles,
As shown in Figure 7a, originally A, B, C, D, E,
The data to be converted from analog to digital in the order of F, G, H, A′ is A, D, as shown in b.
The signals are analog-to-digital converted in the order of phase angle, such as G, B, E, H, C, F, and A', and are written into the storage circuit 13 in association with addresses as shown in FIG. Therefore, at the time of reading, since these must be read in the original order of A, B, C, D, . , 2, 5, that is, in the order of A, B, C, D, . . . and converted into an analog quantity by the D/A/C 15. In addition, address conversion memory circuit 2
1 may be inserted at the output side of the frequency dividing circuit 124 so that the write address corresponds to the phase of the extraction point during writing, and reading may be done in the order of the addresses. , the corresponding analog can be found.

The block circuit diagram shown in FIG. 9 is the noise reduction circuit 3.
0, which exemplifies a method for accurately measuring the distortion rate even when the level of the input signal is low or when the distortion rate is low by reducing noise over the entire band. This noise reduction circuit 30 is the memory circuit 1
The digital signal output from the A/D C 11 is multiplied by (1-K) by the first digital arithmetic circuit 31. However, K is 0
<K<1. On the other hand, numerical information stored at the address where new data is to be written is read from the storage circuit 13, and this is multiplied by K in the second digital arithmetic circuit 32. This first and second
The outputs of the digital arithmetic circuits 31 and 32 are digitally added by an adder 33, and the result is stored in the storage circuit 13 as the latest data in place of the previously stored numerical value. Data at points in the same phase of the input signal are written to the same address in the memory circuit 13. If we focus on a specific address in the memory circuit 13, the data input there will have the same value in terms of input signal components. When an input signal is applied, the input signal components are sequentially added to arrive at a final value. Since noise components appear randomly in this process, the noise is gradually canceled out and reduced. The rate at which this noise is reduced depends on the value of K, resulting in an improvement rate expressed by 10log ₁₀ (1+K)/(1-K) (dB).

The band rejector 3a may be replaced with a high-pass filter that passes frequency components of the second harmonic or higher, that is, twice or higher than the fixed frequency, and blocks frequency components below the fixed frequency. In this way, noise at a frequency lower than the fundamental wave can be removed, so it is possible to prevent interference of measurement errors due to hum, flicker noise, etc. Furthermore, by inserting a comb filter that extracts only the fundamental wave component and its harmonic components after the band remover 3a, it is possible to eliminate noise generated in the input signal or the circuit.

Furthermore, if a bandpass filter whose tuning frequency is tuned to a required harmonic such as the second harmonic or third harmonic, that is, an integral multiple of a fixed frequency, is used instead of the bandpass remover 3a, a specific harmonic component can be removed. It is possible to measure the magnitude of , that is, perform harmonic analysis. In order to perform harmonic analysis using conventional techniques, the pass frequency of the filter must be adjusted according to the input frequency, which makes the structure of the filter complex and technically difficult. For this reason, advanced technology such as a spectrum analyzer has been required to perform harmonic analysis, but by using digital processing circuits 10 and 20 as in the present invention, the tuning frequency of the filter can be adjusted to the input signal. It is not necessary to tune the frequency, and it can be easily realized. Furthermore, if the bandpass filter is of a voltage control type, it is easy to sequentially change the control voltage and read the level of each harmonic in sequence. Incidentally, when the filtering characteristics of the bandpass filter are not sharp, a fundamental wave removal filter may be combined with the filter.

As explained above, the distortion rate measuring device according to the present invention uses a digital processing circuit to convert an input signal to a band rejector etc. into a digital quantity, temporarily stores it in a storage device, Since it is read out from the filter and converted to an analog quantity, there is no need to perform any tuning operations on filters such as band rejecters, and the structure of the filter is extremely simple. This eliminates the interference of measurement errors due to operational inaccuracies, making accurate distortion rate measurement possible. In addition, sampling is performed gradually over L cycles of the input signal and stored in the memory circuit, and one cycle is stored in the memory circuit. Since the distortion rate is read out as a signal, the distortion rate can be measured with sufficient accuracy even when the input frequency is high, and since there is no need to use a high-speed A/D conversion circuit, it can be constructed at low cost. Furthermore, it becomes possible to easily perform not only measurement of harmonic distortion but also analysis of specific harmonics.

[Brief explanation of the drawing]

Fig. 1 is a block circuit diagram of a conventional strain rate measuring device, Fig. 2 is a basic block circuit diagram, Fig. 3 is a block circuit diagram of a digital processing circuit, and Fig. 4 is an explanatory diagram of its operation. FIG. 5 is an explanatory diagram of the data storage state in the memory circuit, FIG. 6 is a block circuit diagram of the digital processing circuit of the distortion rate measuring device according to the present invention, and FIG. 7 is an explanatory diagram of its operation.
FIG. 8 is an explanatory diagram of the data storage state of the memory circuit, and FIG. 9 is a block circuit configuration diagram of the noise reduction circuit. 3a is a band remover, 10 and 20 are digital processing circuits, 11 is an analog-to-digital conversion circuit,
12 is a multiplier circuit, 122 is a phase comparison circuit, 124
is a 1/N frequency divider circuit, 125 is a 1/L frequency divider circuit, 1
3 is a memory circuit, 14 is a clock pulse generation circuit,
15 is a digital/analog conversion circuit, 16 is a control circuit, 17 is a switching circuit, 18 is a frequency dividing circuit, 21 is an address conversion storage circuit, 22 is a sample hold circuit, and 30 is a noise reduction circuit.

Claims (1)

[Claims] 1. An input signal consisting of an analog quantity is passed through a digital processing circuit and a filter connected to the downstream stage of the circuit and tuned to a predetermined frequency, the level value at the output of the filter is determined, and the level value at the output of the filter is determined. The device measures the distortion rate from the ratio of the signal level as a reference, and the digital processing circuit multiplies the frequency of the input signal by N/L (N and L are positive integers), and the input signal is a multiplier circuit that outputs a signal to be extracted at a constant phase interval at a rate of N during the period;
A sample and hold circuit that samples and holds the instantaneous value of the input signal at that time every time the output signal output from the multiplier circuit is received, and an analog/digital circuit that converts the sampled and held instantaneous value of the input signal into a digital quantity. a conversion circuit; a storage circuit for storing the converted digital quantities in N addresses; a readout circuit for reading stored data continuously in the phase order of the data, and a digital-to-analog conversion circuit for converting the read digital value into an analog quantity and outputting it, and one of the input signals stored in the storage circuit A distortion rate measuring device characterized in that an analog signal with a fixed frequency having a period N times the certain period is obtained by reading out a period worth of digital quantities at the certain period. 2. The distortion rate measuring device according to claim 1, wherein the filter is used as a band remover that removes the fixed frequency component to measure the distortion rate. 3. According to claim 1, the filter is configured to measure the distortion rate as a high-pass filter that passes frequency components that are twice or more the fixed frequency and blocks frequency components that are lower than the fixed frequency. strain rate measuring device. 4. The distortion rate measuring device according to claim 1, wherein the filter is a bandpass filter tuned to an integral multiple of the fixed frequency to measure harmonic components.