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JPH0369207B2 - - Google Patents
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JPH0369207B2 - - Google Patents

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Publication number
JPH0369207B2
JPH0369207B2 JP58083333A JP8333383A JPH0369207B2 JP H0369207 B2 JPH0369207 B2 JP H0369207B2 JP 58083333 A JP58083333 A JP 58083333A JP 8333383 A JP8333383 A JP 8333383A JP H0369207 B2 JPH0369207 B2 JP H0369207B2
Authority
JP
Japan
Prior art keywords
signal
reference signal
equation
voltage
unnecessary radio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58083333A
Other languages
Japanese (ja)
Other versions
JPS59208904A (en
Inventor
Takashi Oomuro
Yasuo Tachibana
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP58083333A priority Critical patent/JPS59208904A/en
Publication of JPS59208904A publication Critical patent/JPS59208904A/en
Publication of JPH0369207B2 publication Critical patent/JPH0369207B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/02Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
    • G01S7/28Details of pulse systems
    • G01S7/2813Means providing a modification of the radiation pattern for cancelling noise, clutter or interfering signals, e.g. side lobe suppression, side lobe blanking, null-steering arrays

Landscapes

  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Noise Elimination (AREA)
  • Aerials With Secondary Devices (AREA)
  • Variable-Direction Aerials And Aerial Arrays (AREA)

Description

【発明の詳細な説明】 本発明はサイドローブ・キヤンセラ(以下SLC
と略記する)の相関ループ利得の改良に係るもの
である。
[Detailed Description of the Invention] The present invention provides a sidelobe canceller (hereinafter referred to as SLC).
This relates to the improvement of the correlation loop gain of (abbreviated as).

従来のSLCは第1図のような構成であつた。図
においてu,xはそれぞれ主アンテナ及び補助ア
ンテナからの入力信号の搬送波をそれぞれ周波数
w1,w2(w1>w2)の中間周波数(IF)に変換し
た信号をあらわす(以下、u,xをそれぞれ主信
号、参照信号と呼ぶ。)。1は減算器、2,5はミ
キサ、3は中心周波数w1−w2の狭帯域通過形フ
イルタ、4は利得gの増幅器である。この構成に
おいて減算器1からミキサ2、ミキサ5を通つて
再び減算器1に至るループが存在する。これを相
関ループと呼ぶ。
A conventional SLC had a configuration as shown in Figure 1. In the figure, u and x are the carrier waves of the input signals from the main antenna and the auxiliary antenna, respectively.
It represents a signal converted to an intermediate frequency (IF) of w 1 and w 2 (w 1 >w 2 ) (hereinafter, u and x are called the main signal and reference signal, respectively). 1 is a subtracter, 2 and 5 are mixers, 3 is a narrow band pass filter with a center frequency of w 1 -w 2 , and 4 is an amplifier with a gain of g. In this configuration, there is a loop from subtracter 1 through mixer 2 and mixer 5 to subtracter 1 again. This is called a correlation loop.

次にこの装置の動作について説明する。補助ア
ンテナは無指向性であり、その利得は主アンテナ
のサイドローブの利得程度にとられるため、主ア
ンテナのメインローブより入射する電波について
は信号uの電力が信号xの電力よりも大きくな
る。これに対して主アンテナのサイドローブより
入射する電波に対しては参照信号xの電力の方が
主信号uのそれよりも大きくなる。本装置はこれ
を利用し、主信号u中の成分で参照信号xと相関
を持つものを、参照信号xに対して制御荷重信号
wを乗じた信号yとして推定し、主信号uからこ
の推定信号yを引き去つた信号zを出力信号とす
る構造を有し、主アンテナのメインローブから入
射する電波の影響のみを残すものである。SLCか
らの出力信号zはミキサ2に入力されてフイード
バツクされる。ミキサ2の出力信号をv,vに対
して狭帯域フイルタ3、増幅器4を通過した後の
信号をwとするとwは中心周波数w1−w2の信号
となる。ミキサ5は信号wと補助アンテナ入力信
号xを掛け合わせ、信号yを出力する。以上の過
程を数式化すると次のようになる。(信号成分は
すべて複素数で表現するものとする。) まず、主アンテナ入力信号uと出力信号zとの
関係は z=u−y ……(1) である。次に狭帯域フイルタ3を時定数τ0の一次
遅れフイルタとすれば増幅器4の出力信号である
制御荷重信号wに関して、次の微分方程式が成り
立つ。
Next, the operation of this device will be explained. Since the auxiliary antenna is omnidirectional and its gain is about the same as the gain of the side lobe of the main antenna, the power of the signal u is greater than the power of the signal x for radio waves incident from the main lobe of the main antenna. On the other hand, for radio waves incident from the side lobes of the main antenna, the power of the reference signal x is greater than that of the main signal u. This device uses this to estimate components in the main signal u that have a correlation with the reference signal x as a signal y obtained by multiplying the reference signal x by the control weight signal w, and estimates this from the main signal u. It has a structure in which the signal z obtained by subtracting the signal y is used as an output signal, and only the influence of the radio waves incident from the main lobe of the main antenna remains. The output signal z from the SLC is input to mixer 2 and fed back. If the output signals of the mixer 2 are v and v, and the signal after passing through the narrow band filter 3 and the amplifier 4 is w, then w becomes a signal with a center frequency w 1 -w 2 . Mixer 5 multiplies signal w and auxiliary antenna input signal x and outputs signal y. The above process can be expressed mathematically as follows. (All signal components shall be expressed as complex numbers.) First, the relationship between the main antenna input signal u and the output signal z is z=u−y (1). Next, if the narrowband filter 3 is a first-order lag filter with a time constant τ 0 , then the following differential equation holds true with respect to the control load signal w, which is the output signal of the amplifier 4.

τ0dw/dt+w=gzx* ……(2) 但しx*はxの共役複素数をあらわす。また、
ミキサ5に関しては y=wx ……(3) となる。ここで(1),(2),(3)を用いると、 τ0dw/dt+(1+g|x|2)w=gux* ……(4) となる。これは制御荷重信号wに関する一階の線
形微分方程式である。式(4)において|x|2の値
及びux*の包絡信号成分の変化がτ0に比較してゆ
るやかでほぼ一定値である場合には式(4)は次のよ
うな解を持つ。
τ 0 dw/dt+w=gzx * ...(2) where x * represents the conjugate complex number of x. Also,
Regarding mixer 5, y=wx...(3). If (1), (2), and (3) are used here, τ 0 dw/dt+(1+g|x| 2 )w=gux * ...(4). This is a first-order linear differential equation for the control load signal w. In equation (4), if the value of |x| 2 and the envelope signal component of ux * change more slowly than τ 0 and are approximately constant values, equation (4) has the following solution.

但し式(5)において、w0はt=0のときのwの
初期値であり、また、T0,αは T0=τ0/1+g|x|2 ……(6) α=gux*/1+g|x|2 ……(7) という値である。式(5)において、制御荷重信号w
の値はtが十分大きくなれば値αに近づいてゆ
く。第2図は制御荷重信号wの値の絶対値|w|
が値|α|に収束してゆく様子を示すものであ
る。この時の時定数はT0である。一方、出力信
号zは、図より z=u−wx ……(8) であるため、サイドローブ・キヤンセラによる信
号抑圧比(CR)を CR=<(u/z)2>=<(u/u−wx)2> ……(9) と定義すれば(但し、<>は時間平均を示す。)t
が十分大きくなつた場合には式(9)のwの代わりに
式(7)のαを代入して CR=(1+g|x|22 ……(10) となる。式(10)より明らかなように信号抑圧比CR
は、参照信号電力|x|2の値に依存して参照信
号電力|x|2が大きくなれば大きくなる。この
関係を第3図に示す。
However, in formula (5), w 0 is the initial value of w when t=0, and T 0 and α are T 00 /1+g|x| 2 ...(6) α=gux * The value is /1+g|x|2...(7 ). In equation (5), the control load signal w
The value of will approach the value α as t becomes sufficiently large. Figure 2 shows the absolute value of the control load signal w |w|
It shows how converges to the value |α|. The time constant at this time is T 0 . On the other hand, as shown in the figure, the output signal z is z=u−wx ...(8), so the signal suppression ratio (CR) by the sidelobe canceller is CR=<(u/z) 2 >=<(u/ u−wx) 2 > ...(9) If defined as (where <> indicates the time average) t
When becomes sufficiently large, α in equation (7) is substituted for w in equation (9), and CR=(1+g|x| 2 ) 2 ...(10). As is clear from equation (10), the signal suppression ratio CR
depends on the value of reference signal power |x| 2 and increases as reference signal power |x| 2 increases. This relationship is shown in FIG.

このように制御荷重電圧wの収束時定数T0
びSLCによる信号抑圧比CRは増幅器のゲインg
と参照信号電力|x|2との積g|x|2に大きく
影響される。特に参照信号電力|x|2が小さい
値の時は増幅器4の利得gを大きくとらないと、
制御荷重電圧wの収束時定数T0が大きくなつて
しまう。ところが利得gを大きくとると参照信号
電力|x|2が大きい時にはループ利得が大きす
ぎて、回路の非線形要素のために発振が生じてし
まう。従来のSLC回路においては以上のように制
御荷重電圧wの収束速度が参照信号電力|x|2
の値に影響されて変化するという欠点があつた。
In this way, the convergence time constant T 0 of the control load voltage w and the signal suppression ratio CR due to SLC are determined by the amplifier gain g
and the reference signal power |x| 2 , which is the product g|x| 2 . Especially when the reference signal power |x| 2 is a small value, the gain g of the amplifier 4 must be set large.
The convergence time constant T 0 of the control load voltage w becomes large. However, when the gain g is large, the loop gain becomes too large when the reference signal power |x| 2 is large, and oscillation occurs due to the nonlinear elements of the circuit. In the conventional SLC circuit, as described above, the convergence speed of the control load voltage w is the reference signal power |x| 2
It has the disadvantage that it changes depending on the value of .

本発明は、この欠点を克服するためSLC回路に
おける改良を試たものである。本発明のSLC回路
を第4図に示す。この図は第1図において、狭帯
域通過フイルタ3の代わりに6の積分器を、増幅
器4のかわりに7のミキサを挿入したものであ
る。第4図において、9はミキサであり、これに
より参照信号xの瞬時電力|x|2を求める。1
0は利得計算器であり、参照信号電力|x|2
入力して相関ループの利得であるところのミキサ
7への入力電力pを求めるものである。利得計算
器10において、11はミキサ、12は積分器、
13は減算器、14は二乗要素である。
The present invention attempts to improve SLC circuits to overcome this drawback. The SLC circuit of the present invention is shown in FIG. In this figure, in FIG. 1, an integrator 6 is inserted in place of the narrow band pass filter 3, and a mixer 7 is inserted in place of the amplifier 4. In FIG. 4, 9 is a mixer, by which the instantaneous power |x| 2 of the reference signal x is determined. 1
0 is a gain calculator which inputs the reference signal power |x| 2 and calculates the input power p to the mixer 7, which is the gain of the correlation loop. In the gain calculator 10, 11 is a mixer, 12 is an integrator,
13 is a subtracter, and 14 is a square element.

本発明のSLC回路の動作について説明する。利
得計算器10の出力信号をpとすると、減算器1
3の出力信号はp−|x|2p2となる。従つて積
分器12に関して次の式が成り立つ。
The operation of the SLC circuit of the present invention will be explained. If the output signal of the gain calculator 10 is p, then the subtracter 1
The output signal of 3 becomes p-|x| 2 p 2 . Therefore, the following equation holds regarding the integrator 12.

τ0dp/dt=p−|x|2p2 ……(11) 式(11)の解は次のようになる。 τ 0 dp/dt=p−|x| 2 p 2 ...(11) The solution to equation (11) is as follows.

p=1/4(t) ……(12) 但し、4(t)は参照信号電力|x|2を一次遅
れフイルタで平滑した値であり である。式(12)が式(11)の解である事は、式(12)を式(1
1)
に代入すれば恒等式が得られる事から明らかであ
る。また、荷重制御電圧wの相関ループに関する
方程式は次のようになる。
p=1/4(t)...(12) However, 4(t) is the value obtained by smoothing the reference signal power |x| 2 with a first-order lag filter. It is. The fact that equation (12) is a solution to equation (11) means that equation (12) can be transformed into equation (1
1)
It is clear that the identity can be obtained by substituting . Further, the equation regarding the correlation loop of the load control voltage w is as follows.

τ0dw/dt=p(u−wx)x* ……(14) この方程式(14)をwについて解くと、次のよ
うな解が得られる。
τ 0 dw/dt=p(u−wx)x * (14) When this equation (14) is solved for w, the following solution is obtained.

本来、制御荷重電圧wは次のような値に設定さ
れる事が好ましい。
Originally, it is preferable that the control load voltage w be set to the following value.

w=ux*/|x|2 ……(16) 但し、式(16)における*,||2はそれぞ
れ式ux*,|x|2の平均値をあらわしている。こ
れに対して、式(15)の分子及び分母は信号
ux*,|x|2に対し一次遅れフイルタを通過させ
た出力をあらわしているので、その時定数τ0が、
信号ux*,|x|2の平均値をとるのに十分な程度
の時間であれば式(15)と式(16)は同じものに
なると考えて良い。更に本発明のSLCでは制御荷
重電圧wが収束する時間は式(15)からわかるよ
うに参照信号電力|x|2の値にかかわらず一定
の時定数T0で規定される。
w=ux * /|x| 2 ...(16) However, * and || 2 in equation (16) represent the average values of the equations ux * and |x| 2 , respectively. On the other hand, the numerator and denominator of equation (15) are the signal
Since it represents the output passed through a first-order lag filter for ux * , |x| 2 , its time constant τ 0 is
It can be considered that Equation (15) and Equation (16) are the same as long as the time is sufficient to take the average value of the signals ux * and |x| 2 . Furthermore, in the SLC of the present invention, the time for the control load voltage w to converge is defined by a constant time constant T 0 regardless of the value of the reference signal power |x| 2 , as can be seen from equation (15).

以上のように本発明にかかわるSLCでは、相関
ループの利得が可変であり、利得計算器10によ
り、参照信号電力|x|2の値に応じてループ利
得が最適に決定されるため、制御荷重電圧wの収
束時間が参照信号電力|x|2の値にかかわらず
一定であり、かつ収束後の制御荷重電圧wの値も
バイアスのない所期の値とすることができる。
As described above, in the SLC according to the present invention, the gain of the correlation loop is variable, and the gain calculator 10 optimally determines the loop gain according to the value of the reference signal power |x| 2 . The convergence time of the voltage w is constant regardless of the value of the reference signal power |x| 2 , and the value of the control load voltage w after convergence can also be an expected value without bias.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のサイドローブ・キヤンセラ
(SLC)の構成ブロツク図、第2図は第1図の
SLCにおける制御荷重電圧の絶対値が時間と伴に
所望の値に収束してゆく様子を説明した図、第3
図は第1図のSLCにおける、参照信号電力と信号
抑圧度との関係を示した説明図、第4図は本発明
の改良をほどこしたSLCの構成ブロツク図であ
る。 1,13……減算器、2,5,7,9,11…
…ミキサ、3……狭帯域フイルタ、4……増幅
器、6,12……積分器、10……利得計算回
路、14……二乗要素、なお、図中同一あるいは
相当部分には同一符号を付して示してある。
Figure 1 is a block diagram of a conventional sidelobe canceller (SLC), and Figure 2 is a block diagram of a conventional sidelobe canceller (SLC).
Diagram 3 explaining how the absolute value of the control load voltage in SLC converges to a desired value over time.
This figure is an explanatory diagram showing the relationship between the reference signal power and the degree of signal suppression in the SLC of FIG. 1, and FIG. 4 is a block diagram of the structure of the SLC improved according to the present invention. 1, 13...subtractor, 2, 5, 7, 9, 11...
...Mixer, 3...Narrowband filter, 4...Amplifier, 6, 12...Integrator, 10...Gain calculation circuit, 14...Square element In addition, the same or corresponding parts in the figure are given the same reference numerals. It is shown as follows.

Claims (1)

【特許請求の範囲】 1 主アンテナのサイドローブより入射する妨害
波等の不要電波の影響による受信々号を抑圧する
目的で、相関ループを有し補助アンテナより受信
した不要電波に対する参照信号との相関をとる事
により主アンテナの受信々号中に含まれる不要電
波成分を推定し、これを引き去るように動作する
構造を持つサイドローブ・キヤンセラにおいて、
補助アンテナにて受信した不要電波に対する参照
信号を二乗検波してその電力に比例した電圧rを
出力する回路と、電圧rを入力信号として、その
低周波数成分の逆数に比例する電圧pを、tを時
間変数、τ0を時定数として微分方程式 τ0dp/dt=p−rp2 の解として出力するような利得計算回路と、この
回路の出力信号である電圧pに比例して相関ルー
プの利得を変化させ得る構造を有する事を特徴と
するサイドローブ・キヤンセラ。
[Claims] 1. In order to suppress received signals due to the influence of unnecessary radio waves such as interference waves incident from the side lobes of the main antenna, a correlation loop is provided and a reference signal for the unnecessary radio waves received from the auxiliary antenna is suppressed. A sidelobe canceller has a structure that estimates unnecessary radio wave components included in the signals received by the main antenna by taking correlation and removes them.
A circuit that performs square law detection of a reference signal for unnecessary radio waves received by an auxiliary antenna and outputs a voltage r proportional to its power, and a circuit that uses the voltage r as an input signal to generate a voltage p that is proportional to the reciprocal of its low frequency component. A gain calculation circuit that outputs a solution of the differential equation τ 0 dp/dt=p−rp 2 with τ 0 as a time variable and τ 0 as a time constant, and A sidelobe canceller characterized by having a structure that can change gain.
JP58083333A 1983-05-12 1983-05-12 Side lobe canceller Granted JPS59208904A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58083333A JPS59208904A (en) 1983-05-12 1983-05-12 Side lobe canceller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58083333A JPS59208904A (en) 1983-05-12 1983-05-12 Side lobe canceller

Publications (2)

Publication Number Publication Date
JPS59208904A JPS59208904A (en) 1984-11-27
JPH0369207B2 true JPH0369207B2 (en) 1991-10-31

Family

ID=13799500

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58083333A Granted JPS59208904A (en) 1983-05-12 1983-05-12 Side lobe canceller

Country Status (1)

Country Link
JP (1) JPS59208904A (en)

Also Published As

Publication number Publication date
JPS59208904A (en) 1984-11-27

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