JPH037285B2 - - Google Patents

Description

Detailed Description of the Invention a. Field of Industrial Application The present invention relates to an automatic frequency control method ( This invention relates to a frequency discrimination circuit (hereinafter referred to as AFC).

b. Prior Art In a pulse radar that has a receiver that uses a frequency conversion method, if the frequency band of the intermediate frequency amplifier and the intermediate frequency from the mixer output are out of sync, the sensitivity deteriorates significantly, so the local oscillator is always It is necessary to adjust the oscillation frequency so that the oscillation frequency is obtained. AFC is a device that automatically does this.

AFC is a frequency discrimination circuit that generates a frequency error signal that controls the local oscillation frequency of the local oscillator, whose frequency changes depending on the voltage, so that it is always separated by a predetermined value from the transmission frequency of the transmitter, and the output of the frequency discrimination circuit. It consists of a circuit that integrates.

When the transmitter and local oscillator frequencies vary,
A frequency discrimination circuit generates a frequency error signal corresponding to the deviation from a predetermined intermediate frequency. The error signal is integrated by an integrating circuit with an appropriate time constant, and the oscillation frequency of the local oscillator is controlled so that the difference between the transmission frequency and the local oscillation frequency is always a predetermined intermediate frequency.

FIG. 7 shows a configuration diagram of an AFC frequency discrimination circuit according to the prior art. A first tuned circuit 1a having a center frequency at a frequency f _L lower than a predetermined intermediate frequency.
, a second tuning circuit 2a having a center frequency at a frequency _fH higher than a predetermined intermediate frequency, and a first detection circuit 3a that detects the output _v1 of the first tuning circuit.
, a second detection circuit 4a that detects the second tuning circuit, and a subtraction circuit 5a that generates a difference between the outputs of the first and second detection circuits.

The frequency characteristics of the first and second tuned circuits have approximately equal gain and selectivity. This characteristic is shown in FIG. At this time, the output of the subtraction circuit 5a is S
It exhibits a shape characteristic, and becomes almost zero at a predetermined intermediate frequency f ₀ . This characteristic is shown in FIG.

In the case of the conventional technology, if the intermediate frequency spectrum entering the frequency discriminator is the spectrum of an ideal system pulse, the output of the subtraction circuit is such that the frequency at the peak point of the main lobe is a predetermined intermediate frequency f ₀
It operates so that it becomes zero when it matches. This is because, at this time, the spectrum of the pulse train becomes bilaterally symmetrical, and the ratio of the side lobes to the main lobes is also sufficiently small.

c Problems to be solved by the invention Compared to the spectrum of an ideal square pulse, the spectrum of a radar transmission wave using an actual magnetron as a transmitter is considerably different due to the presence of parasitic AM and FM. It is known. Further, the transmission pulse width is normally switched depending on the distance range of the radar device.

(For example, 0.08 μs, 0.25 μs, 1.2 μs) Fig. 3 shows the spectrum of the transmission pulse of a radar using an actual magnetron as a transmitter. The spectrum of a predetermined intermediate frequency obtained by mixed detection of the transmission frequency having such a spectrum and the local oscillation frequency from the local oscillator using a mixer has a shape substantially similar to the spectrum of the transmission pulse. This is shown in FIG.

In this figure, the spectrum of the intermediate frequency signal is inverted on the frequency axis with respect to the spectrum of the transmission pulse. This is because the local oscillation frequency is set above the transmission frequency by a predetermined intermediate frequency.

The frequency characteristics of the gains of the first tuning circuit and the second tuning circuit are set to a predetermined intermediate frequency f ₀ When inserted into a frequency discriminator circuit that has almost symmetrical characteristics (the characteristics shown in Figure 8), the influence of the side lobe appears asymmetrically on the output of the subtraction circuit, so that the main lobe center frequency f _M becomes zero. Instead, it becomes zero at a different frequency.

Figure 10 shows that when an intermediate frequency signal with the spectrum shown in Figure 4 is input into a frequency discriminator circuit with the characteristics shown in Figure 8, it is locked at a frequency shifted by Δf with respect to the predetermined intermediate frequency path _f0 . Indicates the condition.

In normal pulse radar, the pulse width is often changed depending on the distance to the target. At this time, by switching the transmission pulse width, the spread of the spectrum and its shape also change. Therefore, the amount of deviation Δf due to the sidelobe described above changes in accordance with the pulse width due to the spectrum change due to switching of the pulse width.

Therefore, even if the frequency discrimination circuit is adjusted using pulses, it will operate correctly for pulses of the same shape as the pulses used for adjustment, but in a radar that performs pulse switching as described above,
If the pulse width is changed, the frequency at which the output of the subtraction circuit becomes zero will differ.

When AFC is operated in the above state, the local oscillation frequency of the local oscillator is controlled so as to have an intermediate frequency different from the predetermined intermediate frequency f ₀ .
Tuning deviation occurs and radar reception sensitivity decreases.

As described above, in the frequency discrimination circuit for pulse radar, the influence of asymmetry of the side lobes of the spectrum cannot be ignored, and it is necessary to correct this.

d Means for Solving the Problem The above problem lies in the frequency discrimination circuit that generates a frequency error signal corresponding to the difference between the main lobe frequency f _M of a pulse-modulated input signal and a predetermined intermediate frequency f ₀ . a first circuit consisting of a single tuning circuit, a filter circuit _{, or a saturation tuning circuit whose gain rapidly decreases in a frequency band higher than the predetermined intermediate frequency f 0 ;} A second circuit consisting of a single tuning circuit, a filter circuit, or a saturation tuning circuit whose gain rapidly decreases, a first detection circuit that detects the output of the first circuit, and a detection circuit that detects the output of the second circuit. a second detection circuit that generates direct current, an offset voltage generation circuit that generates a direct current, and a voltage that is the difference between the output of the first detection circuit and the output of the second detection circuit plus the output of the offset voltage generation circuit. The problem was solved by a frequency discrimination circuit with a subtraction circuit that generates .

e Effect In the frequency discriminator circuit according to the present invention, even though the center frequency f _M of the main lobe is equal to the predetermined intermediate frequency f ₀ , this is caused by the presence of side lobes only on one side of the main lobe. , when the difference between the output of the first detection circuit and the output of the second detection circuit is not zero, a DC voltage, which is the output voltage of the offset voltage generation circuit, is added to the difference between the outputs, and the difference of the output of the frequency discrimination circuit is determined. Set the output to zero. As a result, the AFC circuit incorporating the frequency discrimination circuit according to the present application has a main lobe center frequency
It operates to match f _M to a predetermined intermediate frequency f ₀ .

In this way, when an intermediate frequency signal has a symmetrical spectrum, the AFC using the frequency discrimination circuit according to the present invention divides the influence of side lobes based on the asymmetry of the spectrum so that the main lobe is at a predetermined intermediate frequency. Since a correction signal corresponding to the subtracter is applied from the offset voltage generating circuit to the input of the subtracter, the subtracter operates without mislock (synchronization).

f Embodiment FIG. 1 is a block diagram of a preferred embodiment of a frequency discrimination circuit according to the present invention.

The input signal S is transmitted through a first circuit 1 and a second circuit consisting of a single tuning circuit, a filter circuit, or a saturation tuning circuit.
The outputs of circuits 1 and 2 are detected by a first detection circuit 3 and a second detection circuit 4, respectively. The offset voltage generation circuit 6 calculates the difference between the output of the first detection circuit 3 and the output of the second detection circuit 4 when the center frequency f _M of the main lobe of the input signal is equal to a predetermined intermediate frequency f _{0 .} Generates a DC voltage equivalent to . A subtraction circuit 5 calculates the sum of the difference between the outputs of the first detection circuit 3 and the second detection circuit 4 plus the output of the offset voltage generation circuit 6.

For example, the first circuit is a single-tuned circuit having a center frequency f _L at a frequency lower than the predetermined intermediate frequency f ₀ , and the second filter circuit is a single-tuned circuit having a center frequency f _H at the predetermined intermediate frequency f ₀ . Single tuned circuits can be used. FIG. 5 is an output characteristic diagram of the subtraction circuit 5 in this case. In this case the ninth
Unlike the case shown in the figure, since the offset voltage V ₀ is added, the gain in the frequency region higher than the predetermined intermediate frequency f ₀ is relatively small. Therefore, when side lobes exist only on the higher frequency side than the main lobe, their contribution becomes smaller. As a result, the center frequency f _M of the main lobe becomes the predetermined intermediate frequency f ₀
When , the output of the subtraction circuit can be set to zero.

When side lobes exist only on the lower frequency side than the main lobe, the objective can be achieved by adding an offset voltage with the opposite sign to that in Figure 5 and lowering the gain in the frequency region below the predetermined intermediate frequency _f0 . can do.

As another embodiment of the first circuit and the second circuit, the first filter circuit 1 uses a low-pass filter whose transfer function has a small absolute value in a frequency band higher than the above-mentioned predetermined intermediate frequency f ₀ low frequency f _L However, for the second filter circuit 2, it is possible to use a high-pass filter whose transfer function has a small absolute value in a frequency band higher than the predetermined intermediate frequency _f0 and lower than the frequency _fH .

As still another embodiment of the first circuit and the second circuit, the first circuit 1 has the predetermined intermediate frequency.
A single-tuned circuit whose gain is saturated at a frequency f _L lower than f ₀ and whose gain is not saturated at the predetermined intermediate frequency f ₀ is used, and a second filter circuit is used at a frequency higher than the predetermined intermediate frequency f ₀ . It is possible to use a single-tuned circuit whose gain is saturated at f _H and whose gain is not saturated at the predetermined intermediate frequency f ₀ .

FIG. 6 is a frequency characteristic diagram of an embodiment in which a low-pass filter and a high-pass filter are used in the filter circuits 1 and 2. In this case as well, since the offset voltage V ₀ is added, the center frequency of the main lobe f _M
is equal to a predetermined intermediate frequency V ₀ , the output of the subtraction circuit is set to zero.

FIG. 2 is a block diagram of an embodiment in which the offset voltage generation circuit 6 of FIG. 1 includes an offset voltage control circuit 7 that changes the output of the offset voltage generation circuit in conjunction with switching of the transmission pulse width.

By changing the time width of the radar transmission pulse,
The frequency spectrum changes, that is, the relationship between the main lobe and side lobes changes. Therefore, it is preferable to set the offset voltage _V0 in accordance with the time width of the transmission pulse instead of fixing it, in order to prevent mislock of the intermediate frequency signal.

g Effects of the invention (i) Even if the intermediate frequency signal has asymmetric side lobes, AFC will not be mislocked (out of synch).
Don't do it.

(ii) Even when changing the transmission pulse width, each pulse width can be easily adjusted to prevent mislock.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a preferred embodiment of the frequency discriminator circuit according to the present invention, and FIG. 2 is a block diagram of a preferred embodiment of the present invention, in which the offset voltage generating circuit includes an offset voltage control circuit for changing the output of the offset voltage generating circuit. The block diagrams are as follows: Figure 3 shows the spectrum of an actual radar transmission pulse, Figure 4 shows the spectrum of an intermediate frequency signal corresponding to the transmission pulse in Figure 3, and Figure 5 shows the subtraction circuit of the frequency discrimination circuit according to the present invention. FIG. 6 is an output characteristic diagram of another preferred embodiment of the subtraction circuit of the frequency discrimination circuit according to the present invention; FIG. 7 is a block diagram of the frequency discrimination circuit according to the prior art; Figure 8 shows the frequency characteristics of the first filter circuit and the second filter circuit of the frequency discrimination circuit according to the prior art, Figure 9 shows the output characteristics of the subtraction circuit of the frequency discrimination circuit according to the prior art, and Figure 10 mainly shows the main FIG. 3 is an explanatory diagram showing that an intermediate frequency signal having a side lobe only on one side of the lobe is mislocked. DESCRIPTION OF SYMBOLS 1...First filter circuit, 2...Second filter circuit, 3...First detection circuit, 4...Second detection circuit, 5...Subtraction circuit, 6...Offset voltage generation circuit, 7...Offset voltage control circuit, f ₀
...Predetermined intermediate frequency, f _M ... Center frequency of the main lobe, V ₀ ... Offset voltage, f _L ... Center frequency of the first tuned circuit, f _H ... Center frequency of the second tuned circuit, v ₁ , v ₂ ...output of tuned circuit, V...
Output of the subtraction circuit, S...input signal.

Claims (1)

[Claims] 1. The spectrum has asymmetry with respect to the center frequency f _M of the main lobe, and this asymmetry changes depending on the pulse width between the center frequency f _M of the main lobe of the input signal and a predetermined intermediate frequency f ₀ , the first single-tuned circuit has a center frequency at a frequency f _L lower than the predetermined intermediate frequency f ₀ ; a second single-tuned circuit having a center frequency at a frequency f _H higher than ₀ ; a first detection circuit that detects the output of the first tuned circuit when an input signal is sent; a second detection circuit that detects the output of the second tuning circuit when It is equipped with a subtraction circuit that generates a voltage by adding the output of the offset voltage generation circuit to the difference, and by adjusting the output voltage of the offset voltage generation circuit according to the pulse width, the pulse _width and A frequency discrimination circuit characterized in that the subtraction circuit outputs the same output regardless of the frequency. 2 The spectrum has an asymmetry with respect to the center frequency f _M of the main lobe, and this asymmetry corresponds to the difference between the center frequency f _M of the main lobe of the input signal and a predetermined intermediate frequency f ₀ that changes depending on the pulse width. A frequency discrimination circuit that generates a frequency error signal, the low-pass filter having a transfer function whose absolute value rapidly decreases in a frequency band higher than a frequency _fL lower than the predetermined intermediate frequency _f0 , and the predetermined intermediate frequency _f0.
A high-pass filter whose absolute value of the transfer function rapidly decreases in a frequency band lower than the higher frequency _fH , a first detection circuit which detects the output of the low-pass filter circuit when the input signal is sent, and A second detection circuit detects the output of the high-pass filter circuit when it is sent, an offset voltage generation circuit that generates a DC voltage, and a detection circuit that detects the output of the first detection circuit and the output of the second detection circuit. It is equipped with a subtraction circuit that generates a voltage by adding the output of the offset voltage generation circuit to the difference, and by adjusting the output voltage of the offset voltage generation circuit according to the pulse width, the pulse _width and A frequency discrimination circuit characterized in that the subtraction circuit outputs the same output regardless of the frequency. 3. The spectrum has an asymmetry with respect to the center frequency f _M of the main lobe, and this asymmetry corresponds to the difference between the center frequency f _M of the main lobe of the input signal and a predetermined intermediate frequency f ₀ that changes depending on the pulse width. A frequency discrimination circuit that generates a frequency error signal, which is composed of a single-tuned circuit whose gain is saturated at a frequency f _L lower than the above-mentioned intermediate frequency f ₀ and whose gain is not saturated at the above-mentioned predetermined intermediate frequency f ₀ , A first saturation tuning circuit in which the gain rapidly decreases in _a frequency band higher than the predetermined intermediate _frequency f _{0 ;} a second saturated tuned circuit consisting of an unsaturated single tuned circuit whose gain rapidly decreases in a frequency band lower than the predetermined intermediate frequency f ₀ ; a first detection circuit that detects the output; a second detection circuit that detects the output of the second saturation tuning circuit when an input signal is sent; an offset voltage generation circuit that generates a DC voltage; A subtraction circuit is provided which generates a voltage obtained by adding the output of the offset voltage generation circuit to the difference between the output of the first detection circuit and the output of the second detection circuit, and the output voltage of the offset voltage generation circuit is adjusted according to the pulse width. A frequency discrimination circuit characterized in that the subtraction circuit outputs the same output for the same center frequency f _M regardless of the pulse width by adjusting .