JPH0410220B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for forming a pattern using a silicon compound of a high melting point metal without using a resist.

(b) Prior Art and Problems Microfabrication in the manufacturing process of semiconductor devices is mainly performed by the so-called lithography method. That is, for example, when shaping a conductor, semiconductor, or insulator film on a substrate into a desired shape and size, a desired pattern of a resist film is formed on the film and the resist film is used as a mask to form the desired film. Etching etc.
Alternatively, a desired pattern portion of a resist film is selectively removed, a film is formed thereon using a desired material, and unnecessary portions of the film are peeled off together with the resist film.

In the lithography method of forming patterns using this resist, various properties of the resist itself, such as resolution characteristics, photosensitive characteristics, adhesion, and etching resistance, are selected depending on the purpose, and the resist coating method and exposure Although it is necessary to carry out the development treatment and the heat treatment before and after the development treatment in a well-controlled manner, the following problems still arise.

For example, in order to miniaturize a pattern, it is necessary to reduce the thickness of the resist film, but reducing the thickness of the resist film increases the risk of pinholes and the like.

In exposure processing, as patterns become finer, a decrease in precision of resist patterns becomes a problem, as light diffraction and coherency greatly affect surface quality. For example, even if a positive photoresist with excellent resolution characteristics is exposed to ultraviolet light, the light energy distribution in the resist film thickness direction becomes uneven due to the effects of light diffraction and standing waves, resulting in an uneven end face after development. It is not vertical, and the pattern dimensions are, for example, [μ
m] or less, a so-called prisge phenomenon may occur in which the left and right end faces are not separated.

Furthermore, since the organic solvent used in the development process causes the resist to swell, a heat treatment called post-bake is required to remove the solvent and improve the adhesion of the resist. This is a factor that reduces pattern accuracy.

Furthermore, in the etching process after resist pattern formation, if the adhesion of the resist film is insufficient, the etching solution will enter between the resist film and the underlying layer in the wet etching process, resulting in a significant deterioration of pattern accuracy. . In addition, the accuracy of the pattern obtained is greatly reduced due to side etching, which appears particularly strongly in wet etching processing. Dry etching is increasingly being used to replace wet etching, which has many problems with pattern accuracy.
Dry etching generally has disadvantages such as poor selectivity due to differences in materials and requires a thicker resist film than wet etching.

MOS type field effect transistors are most commonly used as transistors constituting semiconductor integrated circuit devices, but in order to improve their operating speed and integration density, their gate lengths are being shortened, and at the same time, gate lengths such as gate electrodes, etc. It is now common practice to use a metal or a metal silicon compound that has a lower resistivity than conventional polycrystalline silicon.

Lithography is currently being applied to the formation of gate electrodes, etc., and there is a need to solve the above-mentioned problems.

(c) Purpose of the Invention In order to address the above-mentioned problems, the present invention provides a method for manufacturing a semiconductor device in which patterns of electrodes, wiring, etc. made of a metal silicon compound are formed without using a resist. purpose.

(d) Structure of the Invention The object of the present invention is to form an amorphous silicon film on a semiconductor substrate, selectively irradiate the amorphous silicon film with an energy beam, and convert the amorphous silicon film into polycrystalline silicon. converting the amorphous silicon film into a film, and selectively removing the amorphous silicon film with respect to the polycrystalline silicon film;
This is achieved by a manufacturing method in which the polycrystalline silicon film is then coated with a metal film and subjected to heat treatment to convert the polycrystalline silicon film into a metal silicon compound film.

(e) Embodiments of the Invention The present invention will be specifically explained below using embodiments with reference to the drawings.

1 to 5 are cross-sectional views showing embodiments of the gate electrode of a MOS field effect transistor (MOS FET) according to the present invention.

Refer to FIG. 1. A field oxide film 2 and a gate oxide film 3 are formed on a silicon substrate 1 by a conventional technique.

On the gate oxide film 3 and field oxide film 2,
For example, the amorphous silicon film 4 is formed to have a thickness of about 0.4 [μm], for example, by electron beam evaporation.

Next, a silicon dioxide film 5 is formed on the amorphous silicon film 4 to a thickness of, for example, about 0.6 [μm] by, for example, a sputtering method. The thickness of this silicon dioxide film 5 is selected to a value that minimizes the reflectance when light is used as the energy beam as in this embodiment.

Refer to FIG. 2. A region 4' of the amorphous silicon film 4 to be used as a gate electrode is selectively irradiated with an energy beam. In this example, a continuous wave argon (Ar) laser with an output of about 1 [W] is used as the energy beam, and scanning is performed at a speed of about 5 [cm/sec] with a beam diameter of about 1 [μm]. . The means for selecting the irradiation area may be by using a mask or by selective irradiation without using a mask. Note that during this argon laser beam irradiation, in this embodiment, the temperature of the semiconductor substrate is heated to about 250 [° C.].

The amorphous silicon in the region 4' irradiated with this energy beam is heated and becomes a polycrystalline silicon region 6.

See Figure 3. The silicon dioxide film 5 is removed using a hydrofluoric acid (HF) based etching solution, and then hydrofluoric acid and nitric acid (HNO ₃ ) are used.
The amorphous silicon film 4 is selectively removed using an etching solution containing phosphoric acid (H ₃ PO ₄ ) and perchloric acid (HClO ₄ ) using the difference in etching rate between the amorphous and polycrystalline states. do. This selective etching can also be carried out by reactive ion etching.

Refer to FIG. 4 A coating 7 of a high melting point metal, molybdenum (Mo) in this embodiment, is formed on the semiconductor substrate to a thickness of e.g.
It is formed at a longitude of 0.2 [μm] by electron beam evaporation or the like to cover the polycrystalline silicon region 6.

Next, heat treatment is performed at a temperature of, for example, 550 [° C.] for about 30 minutes. By this heat treatment, area 6
The polycrystalline silicon forms a eutectic with molybdenum and is converted into molybdenum silicide (MoSi ₂ ), forming the gate electrode 8.

See FIG. 5 Molybdenum film 7 is removed using, for example, a mixed solution of nitric acid, phosphoric acid (H ₃ PO ₄ ), and acetic acid, and molybdenum silicide gate electrode 8 is provided on gate oxide film 3 as shown in the figure. is obtained.

A MOS FET can be manufactured using the following conventional techniques.

In this example, molybdenum is used as the metal that forms a compound with silicon, but the present invention can also be carried out using other high-melting point metals, such as titanium (Ti) and tungsten (W). However, the same effect can be obtained.

It is also possible to form wiring by the manufacturing method of the present invention. Even if the electrode or underlying wiring to which this wiring is connected is made of a high-melting point metal or its silicide, eutecticization is automatically performed by the energy beam irradiation of the present invention.

(f) Effects of the Invention As explained above, according to the present invention, it is possible to form patterns such as electrodes and wiring made of metal silicon compounds such as molybdenum silicide without using a resist, and it is possible to form patterns using metal silicon compounds such as molybdenum silicide without using a resist. It is possible to apply not only a chemical method using a mask but also a direct writing method using a laser beam or an electron beam, and it is possible to manufacture an excellent semiconductor device by eliminating problems related to resist.

[Brief explanation of drawings]

1 to 5 are cross-sectional views showing embodiments of the present invention relating to the gate electrode of a MOS type field effect transistor. In the figure, 1 is a silicon substrate, 2 is a field oxide film, 3 is a gate oxide film, 4 is an amorphous silicon film, 5 is a silicon dioxide film, 6 is a polycrystalline silicon region, 7 is a molybdenum film, and 8 is molybdenum silicide. The gate electrode is shown.

Claims (1)

[Claims] 1 Forming an amorphous silicon film on a semiconductor substrate,
selectively irradiating the amorphous silicon film with an energy beam to convert the amorphous silicon film into a polycrystalline silicon film, selectively removing the amorphous silicon film with respect to the polycrystalline silicon film, A method for manufacturing a semiconductor device, comprising the steps of: thereafter covering the polycrystalline silicon film with a metal film and subjecting the polycrystalline silicon film to a heat treatment to convert the polycrystalline silicon film into a silicon compound film of the metal.