JPH0419780B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a digital protection relay for protecting a power system, and more particularly to a digital distance relay that responds depending on the impedance to the point of failure.

[Technical background of the invention and its problems] Conventional distance relays have various characteristics, but the reactance relay has linear characteristics as shown in Figure 1 using the following equation (1) as the operating principle equation. The conventional technology will be explained using as an example.

Z _S・｜I〓｜ ² −｜V〓｜・｜I〓 _L θ｜・cos＞K〓 ₀ ……
(1) Here, Z _S is the set value, θ is the maximum sensitivity angle, and is the phase difference between the voltage vector V and the current vector I, whose phase is shifted by θ. Further, K ₀ is a suppression term for reducing the influence of errors included in the operational term on the left side of equation (1), and is expressed by equation (2) below.

K ₀ =Z _S ·K ₀₁ ...(2) Here, K ₀₁ is a constant.

By transforming equations (1) and (2) on the maximum sensitivity angle, the following equation (3) is obtained.

1-Z/Z _S >K ₀₁ /|I| ² (3) The current-impedance characteristic of equation (3) is theoretically as shown in FIG. 2a.

As a result, when K ₀ = 0, due to the influence of errors included in the input, the current-impedance characteristic, which was previously known empirically to be as shown in Figure 2b, becomes as shown in Figure 2c. Therefore, overreach due to incomplete operation can be suppressed and good characteristics can be obtained.

However, in the case of K ₀ = Z _S K ₀₁ , the current-impedance characteristic shown in Figure 2c shows that when the setting value is small, the underreach is small, but it becomes unstable in the small current range, and when the setting value is large, the underreach is small. Stable operation in the basin, but underreach becomes large. If the setting range is wide, there is a drawback that in extreme cases it may exceed the allowable limit.

[Object of the Invention] The present invention was made to solve the above-mentioned drawbacks, and its purpose is to provide a digital distance relay that can obtain good characteristics from the maximum setting to the minimum setting even when the setting range is wide. It is in.

[Summary of the Invention] In order to achieve the above object, the present invention changes the suppression term in the relay operation determination formula to a set value Z _S and a constant K ₀₁ ,
A digital distance relay that effectively reduces the influence of errors included in the operating term and has good relay characteristics by setting Z _S・K ₀₁ +K ₀₂ or Z ² _S・K ₀₁ +K ₀₂ from K ₀₂ . It is related to.

[Embodiments of the invention] An embodiment of the present invention will be described with reference to the drawings.

FIG. 3 is a block diagram of an embodiment of the digital distance relay according to the present invention, FIG. 4 is a functional block diagram of the arithmetic circuit of FIG. 3, and FIGS. A diagram showing the relationship between input and absolute error and input and relative error, FIG. 7 is a diagram for explaining the effect of FIG. 3,
FIG. 8 is a flowchart.

In FIG. 3, 30 is an input converter, which converts the voltage V and current I introduced from the power system into voltage information of an appropriate size. 31 is a filter,
The output of input transducer 30 is introduced to remove harmonic components. A sample/hold circuit 32 samples the output of the filter 31 at predetermined time intervals and holds the value. 33 is an analog/digital conversion circuit that converts the output of the sample/hold circuit 32 into digital data. 34 is a direct memory access circuit that writes the output of the analog/digital conversion circuit to a predetermined address in the memory circuit 36. 35 is a setting circuit, which is a circuit for the user to set a setting value. The output of the settling circuit 35 is written to a predetermined address in the memory circuit 36 by the direct memory access circuit 34. 37 is a relay calculation circuit, which is read-only.
According to the program written in the memory 38, the system voltage and current data and setting values written in the memory circuit 36 are used to execute relay calculations. 39
is an output circuit that outputs a disconnection trip command based on the calculation result of the relay calculation circuit.

FIG. 4 is a functional block diagram of the relay calculation circuit 37 described above. In the figure, 41 indicates the magnitude of the current based on the stored contents of the memory circuit 36 |
The operating amount Z _S・｜I〓 is the product of the square of I〓｜ and the set value Z _S
｜ ² , the first calculating means 42 also shifts the phase of the current, and calculates the phase of the current by shifting the phase of the current.
I〓 _L Suppression amount which is the inner product of θ and voltage V〓｜V〓｜・｜I〓 _L
43 is a second calculation means for calculating θ|・cos, and 43 is a third calculation means for calculating the suppression term Z _S・K ₀₁ +K ₀₂ which is the sum of the product of the set value Z _S and the constant K ₀₁ and the constant K ₀₂ ,
44 indicates that the difference between the operation amount that is the output of the first calculation means 41 and the suppression amount that is the output of the second calculation means 42 is larger than the suppression term that is the output of the third calculation means 43 (Z _S ·
｜I〓｜−｜V〓｜・｜I〓 _L θ｜・cos＞Z _S・K ₀₁ +K ₀₂
)
Determination means 45 determines whether or not
This is an on-delay timer that detects whether the condition has been satisfied for a certain period of time or more, and sends its output to the output circuit 39 described above.

Next, the operation of the reactance relay of the present invention configured as described above will be explained.

That is, in the block configuration diagram of FIG. 3, the voltage/current data of the system written in the memory circuit includes errors generated in the various circuits at the previous stage. In other words, error factors include gain drift error, linearity error that occurs when the ratio between input and output is not constant in analog circuits, offset error that occurs in analog circuits, DC component error, and quantization error. Like analog/
There are rounding errors that occur during digital conversion. Gain drift error and linearity error are proportional errors whose size is proportional to the input size, while offset errors and quantization errors are fixed errors whose size is independent of the input size. It is. Considering the influence of these errors, the magnitude of the error included in the input itself, that is, the absolute error, increases with the magnitude of the input due to the influence of the proportional error, as shown in Figure 5, but the magnitude of the error included in the input increases. The error ratio, that is, the relative error, becomes larger as the input is smaller, as shown in FIG. 6, due to the influence of the fixed error. Current in Figure 2b -
The tendency appearing in the impedance characteristics, that is, the tendency for the incomplete operation range to widen in the small current range, is due to the influence of the fixed component error.

Furthermore, we will examine the relationship between the set value and error. Since the current-impedance characteristic will be considered here, what will happen if the setting value is changed? Therefore, if the current is held constant, the error included in the current is unrelated to the size of the setting value, and the operating limit voltage is proportional to the setting value, so the error included in the voltage is proportional to the size of the setting value. I can say it. In this case, it is better to consider that the total error includes a proportional error and a fixed error with respect to the set value. In order to reduce the influence of the error, it is necessary to cancel the error with a suppression term that is approximately the same size as the error. Furthermore, if this error has a proportional component and a fixed component with respect to the set value, the suppression term must also have a proportional component so that it has the same configuration as the error.

The suppression term obtained by the third calculation means 43 described above has a proportional component and a fixed component with respect to the set value, as shown in FIG. can be reduced to

Such functionality can be obtained by executing the flowchart shown in FIG. Note that the calculation in FIG. 8 is performed at regular time intervals. First, step
In 81, the magnitude of the current is based on the sampling data |
The operating amount Z _S is the product of the square of I〓｜ and the set value Z _S ｜I〓｜
Calculate ² . In step 82, the phase of the current is similarly shifted, and the suppression term, which is the inner product of the phase-shifted current I〓 _L θ and the voltage V〓, is created as |V〓|・|I〓 _L θ|・
Calculate cos. The sampling data of current I〓 and voltage V〓 are respectively i _n , i _n-1 , i _n-2 , ... and v _n ,
v _n-1 , v _n-2 , ..., i _n and v _n are the same time, i _n and i _n-3 ,
Assuming that v _n and v _n-3 are time data with a phase difference of 90 degrees in electrical angle, the amount of operation is calculated as Z _S · (i ² _n + i ² _n-3 ), and for example, if the phase shift θ is set to 90 °, the suppression term is calculated as (i _n ·v _n-3 −i _n-3 ·v _n ). In step 83, a suppression term Z _S ·K ₀₁ +K ₀₂ is calculated from the set value Z _S and constants K ₀₁ and K ₀₂ . In step 84, the values calculated in steps 81, 82, and 83 are used to determine whether the difference between the motion amount and the suppression amount is larger than the suppression term. That is, Z _S・｜I〓｜ ² −｜V〓｜・｜I〓 _L θ
It is determined whether the condition |·cos>Z _S ·K ₀₁ +K ₀₂ is satisfied. If this condition is satisfied, the number of times is counted in step 85, and if the number is N or more, the operation output is sent to the output circuit 39 in step 86. If the condition is not met in step 84,
Alternatively, if the count does not reach N times in step 85, sending the operation output to the output circuit 39 is stopped in step 87.

By doing as described above, it is possible to effectively reduce the influence of errors included in the operating amount and the suppression amount of the reactance relay, and to obtain good relay characteristics.

Furthermore, the present invention is not limited only to reactance relays, but can also be applied to relays whose operating limit is expressed by a straight line in the R-X coordinate by selecting the suppression term in the operation determination formula in the same manner as the reactance relay. It is possible to provide a digital distance relay having good relay characteristics by effectively reducing the influence of errors included in the operating term.

The above explanation has been made regarding, for example, a reactance relay having a linear characteristic, but the same applies to a Mori relay which realizes a circular characteristic as shown in FIG. 9 using the following equation (4) as the operating principle expression.

Z _S・｜I〓 _L θ｜・｜V〓｜・cos−｜V〓｜ ² >K ₀ ...(4) Here, Z _S is the setting value, θ is the maximum sensitivity angle, and is the voltage vector V〓 The phase difference K ₀ of the current vector I〓 whose phase is shifted by θ is a suppression term for reducing the influence of the error included in the operation term on the left side.

FIG. 10 is a functional block diagram for explaining the functions performed by the relay calculation circuit 37 mentioned above. In the figure, 101 is the memory circuit 36 mentioned above.
The phase of the current is shifted based on the memory contents of , and the inner product of the phase-shifted current I〓 _L θ and the voltage V〓 | I〓 _L
Calculate θ｜・｜V〓｜・cos, and calculate its inner product and setting value
_{The operating amount Z S ・}｜I〓 _L θ｜・｜V〓｜・
The fourth calculation means 102 for calculating cos is the suppression amount |V〓| which is also the square of the voltage magnitude |V〓|
² , and 103 is a suppression term that is the sum of the product of the square of the set value Z _S and the constant K ₀₁ and the constant K ₀₂ .
Sixth calculation means for calculating Z ² _S・K ₀₁ +K ₀₂ , 104
is the operation amount which is the output of the fourth calculation means 101 and the fifth
The difference in the amount of suppression that is the output of the calculation means 102 is larger than the suppression term that is the output of the sixth calculation means 103 (Z _S · | I 〓 _L θ | · | V 〓 | · cos − | V 〓 | ² > Z ² _S.K.
01
+K ₀₂ ), and 105 is an on-delay timer that detects whether the condition of the determining means 104 is satisfied for a certain period of time or more, and sends its output to the output circuit 39 described above.

Next, the operation of the Morley relay of the present invention constructed as described above will be explained according to the flowchart of FIG. 11. Note that the calculation in FIG. 11 is performed at regular time intervals. First, in step 111, the phase of the current is shifted based on the sampling data, and the inner product of the phase-shifted current I〓 _L θ and voltage V〓 |I〓 _L θ
Calculate |・|V'|・cos, and use this inner product and setting value
_{The operating amount Z S ・}｜I〓 _L θ｜・｜V〓｜・cos
Calculate. In step 112, the suppression amount |V〓| ² , which is the square of the voltage magnitude |V〓|, is similarly calculated.
For example, when the phase shift θ is 60°, the sampling data of the current I〓 and the voltage V〓 are i _n , i _n-1 , i _n-2 ,
...and v _n , v _n-1 , v _n-2 , ..., v _n and i _n-1 are 30° in electrical angle, i _n-1 and i _n-4 , v _n and v _n-3 are Assuming that the data are at times that are 90 degrees apart in electrical angle, the amount of movement is Z _S
It is calculated as (i _n-1 ·v _n-3 −i _n-4 ·v _n ), and the suppression amount is calculated as (v ² _n −v ² _n-3 ). In step 113, a suppression term Z ² _S ·K ₀₁ +K ₀₂ is calculated from the set value Z _S and constants K ₀₁ and K ₀₂ . In step 114, steps 111, 112,
Using the value calculated in step 113, it is determined whether the difference between the motion amount and the suppression amount is greater than the suppression term. If the conditions are met, the number of times is counted in step 115,
If the number of times is N or more, the operation output is sent to the output circuit 39 in step 116. If the condition is not met in step 114, or if the count is N in step 115.
If the number of times has not been reached, the operation output is stopped to be sent to the output circuit 39 in step 117.

In this case as well, the operation amount and suppression amount calculated by the fourth calculation means 101 and the fifth calculation means 102 are affected by the proportional error and the fixed error. Furthermore, if the current is fixed as described above, it can be said that the error included in the voltage data is proportional to the set value. As can be seen from equation (4) above, the left side is the product of the set value and the voltage and the square of the voltage, so the proportional error is a proportional error with respect to the square of the set value.
Since the suppression term obtained by the sixth calculation means 103 also has a proportional component and a fixed component to the square of the set value,
It is possible to reduce the influence of the proportional error and the fixed error included in the operating term to obtain a morley relay with good relay characteristics.

Although the embodiments are explained using reactance relays and mole relays that use the operating principle equations (1) and (4), the present invention can also be applied to digital distance relays that use other operating principle equations. Of course, it can be applied using a similar method.

[Effect of the invention] As described above, in the present invention, the setting value Z _S and the constant
From K ₀₁ and K ₀₂ , Z _S・K ₀₁ +K ₀₂ or Z ² _S・K ₀₁ +
By using K ₀₂ as a suppression term, it is possible to effectively reduce the influence of errors included in the operating term, and to provide a digital distance relay that can obtain good characteristics from the maximum setting to the minimum setting even when the setting range is wide. I can do it.

[Brief explanation of drawings]

Fig. 1 is a characteristic diagram of a reactance relay, Fig. 2 is a current-impedance characteristic diagram of a reactance relay, Fig. 3 is a block diagram of an embodiment of the present invention, and Fig. 4 is a function of the arithmetic circuit shown in Fig. 3. The block diagram, FIGS. 5 and 6 are diagrams showing the relationship between the input and absolute error, and the input and relative error, respectively, of the digital distance relay of the present invention, and FIG. 7 is a diagram for explaining the operation of FIG. 3. 8 is a flowchart of FIG. 3, FIG. 9 is a characteristic diagram of the Morrelay, FIG. 10 is a functional block diagram of another embodiment of the present invention, and FIG. 11 is a flowchart of FIG. 30...Input converter, 31...Filter, 32
...Sample/hold circuit, 33...Analog/digital conversion circuit, 34...Direct
Memory access circuit, 35... Setting circuit, 36
...Memory circuit, 37...Relay calculation circuit, 38
...Read-only memory, 39...Output circuit.

Claims (1)

[Scope of Claims] 1. A conversion means that samples voltage and current signals obtained from the power system and converts them into digital data, and an operation determination formula that uses the voltage and current signals and includes an operation amount, a suppression amount, and a suppression term. calculation means for performing a distance measurement calculation according to the equation and calculating the suppression term in the operation determination formula as the sum of a function of a set value and a constant;
A digital distance relay comprising a determining means for determining operation or non-operation based on the result of the calculation means. 2. The digital distance relay according to claim 1, wherein the suppression term is expressed as an integer constant x first constant + second constant or (integer constant) ² x first constant + second constant.