JPH0423841B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a circuit that maintains the level of a sending or receiving signal in a terminal device such as a telephone set at a constant level regardless of the input signal level, and particularly relates to a circuit that maintains a constant level of a sending or receiving signal in a terminal device such as a telephone, and in particular, a circuit that maintains a constant level of a sending or receiving signal in a terminal device such as a telephone, and in particular, a circuit that maintains a constant level of a sending or receiving signal in a terminal device such as a telephone. This invention relates to an automatic gain control circuit that can be set variably.

[Technical background of the invention and its problems] Conventionally, as shown in FIG. 1, as shown in FIG. 3, the output level of the time constant circuit 5 is controlled by the difference voltage, and the gain of the signal level variable circuit 1 is varied by this control output. There is one in which the output signal level of the variable signal level circuit 1 is made equal to the set voltage of the variable DC voltage circuit 4.

However, in such a circuit, in order to suppress abnormal amplification such as line noise when there is no signal, the time constant circuit 5 is
The discharge time constant of the signal level variable circuit 1 is set to be relatively long so that the gain change of the signal level variable circuit 1 becomes slow. For this reason, even if an attempt is made to vary the output signal level of the signal level variable circuit 1 by adjusting the knob of the DC voltage variable circuit 4, there is a drawback that the operation of the signal level variable circuit 1 does not follow with good response.

Therefore, conventionally, for example, as shown in Fig. 1,
A reset circuit 6 using a rotary switch or the like is provided, and this reset circuit 6 is interlocked with the knob of the DC voltage setting circuit 4 so that the time constant circuit 5 is reset each time this knob is operated by a certain amount. ing. In this way, the output signal level of the signal level variable circuit 1 reaches the maximum level immediately after the reset, but after that, it is controlled for a relatively short time according to the charging time constant that is shorter than the discharging time constant of the time constant circuit 5. The value set by the DC voltage variable circuit 4 will be reached within a while.

However, in the conventional circuit described above, each time the DC voltage variable circuit 4 is adjusted, the time constant circuit 5 is reset once or multiple times depending on the amount of operation. This is extremely undesirable because the output signal level of the level variable circuit 1 fluctuates greatly, deteriorating the transmitting or receiving characteristics. In addition, since the reset circuit 6 is a circuit using mechanical contacts, it is prone to poor contact and has unstable operation, and to improve this, the configuration has to be complicated and expensive. .

[Object of the Invention] The present invention is capable of performing stable AGC operation without causing fluctuations in the signal level when the audio is restored due to a momentary interruption of audio, etc., and is capable of performing simple and high-speed operation when changing the reference level. An object of the present invention is to provide an automatic gain control circuit that has a reliable configuration and can perform level setting with good responsiveness.

[Summary of the Invention] In order to achieve the above object, the present invention includes a signal level variable circuit provided in a signal transmission path, and a signal detection circuit that detects a level value of an input signal to the signal level variable circuit. , a first analog-to-digital conversion circuit that digitizes the signal level detected by the signal detection circuit as input signal detection information; and a reference value setting signal for setting the output signal level of the signal level variable circuit. A second analog signal that is digitized and becomes reference value signal information.
A digital conversion circuit stores the input signal detection information once for each predetermined sample, and calculates the cumulative result of sequentially adding or subtracting a predetermined constant value depending on the comparison result with the input signal detection information after a predetermined sample period. a first storage means having a storage area for storing the input signal detection information once for each predetermined sample; a second storage means having a storage area for storing cumulative results obtained by sequentially adding or subtracting values; and a cumulative value stored in the first storage means and a cumulative value stored in the second storage means. and a time constant circuit that selects a cumulative value with a larger value among them over time at predetermined intervals, and calculates difference information between the value of the time constant circuit and the reference value signal information, and corresponds to this difference information. A gain control signal is generated, and this gain control signal is supplied as a control input to the signal level variable circuit to vary the gain.

[Embodiment of the Invention] FIG. 2 is a block diagram of an automatic gain control circuit in an embodiment of the invention.

This circuit rectifies the input signal to the signal level variable circuit 1 by a rectifier circuit 2, digitizes the rectified output, that is, the input signal detection level by an A/D converter 10, and guides it to a control circuit 20. The reference voltage set by the voltage variable circuit 4 is applied to the A/D converter 3.
0 and introduced into the control circuit 20,
The control information obtained by this control circuit 20 is D/A
The converter 40 converts the signal into an analog signal and supplies this signal as a gain control signal to the signal level variable circuit 1, thereby controlling the gain of the signal level variable circuit 1 so that the output signal level is constant. This is what I did.

The control circuit 20 includes, for example, a central control unit (CPU) 2 comprising a microprocessor as shown in FIG.
1, a read-only memory (ROM) 22 that stores the execution program of this CPU 21,
It is composed of a random access memory (RAM) 23 for temporarily storing input information and calculation information. The control circuit 20 is a CPU 21
The following calculation operations and control operations are performed.

First, input signal information converted into digital values by the A/D converters 10 and 30 and setting level information which is reference value information are temporarily stored in the RAM 23 at regular timings.

The setting level information stored in the RAM 23 is used to set the gain of the signal level variable circuit 1.

That is, the output digital value of the A/D converter 30 determined by setting the reference voltage in the variable DC voltage circuit 4 is supplied to the D/A converter 40 via the control circuit 20, and the output digital value is supplied to the D/A converter 40 via the control circuit 20. The steady-state gain at is determined.

Further, the input information is temporarily stored in the RAM 23. In addition to the area for storing the input information, first and second storage areas are set in the RAM 23. The first and second storage areas function equivalently as registers, and the initial values of the first and second storage areas in the initial state are "0". Thereafter, the new input signal information is compared with the contents of the first storage area, and the contents of the first storage area and the contents of the second storage area are compared at regular intervals, and depending on the comparison results, the new input signal information is compared with the contents of the first storage area. By adding or subtracting a certain value to the current value,
Then, the values in the second storage area are sequentially rewritten to the calculation result values. At this time, the above comparison itself is performed at constant timing, for example, every 0.25 msec.
However, the addition or subtraction described above is not performed at each comparison timing, but rather, for example, by a constant value (e.g.
0.75dB) is added when the input signal information is judged to be larger than the value stored in the first storage area for 8 consecutive timings, that is, to the value stored in the first storage area. On the other hand, only when the input signal information is large over 2 msec. Regarding subtraction, when it is determined that the input signal information is smaller than the value stored in the first storage area for 3000 consecutive timings, that is, the input signal information is smaller than the value stored in the first storage area. Only when the information is small over 750 msec.

In this way, by changing the conditions for addition and subtraction of a constant value to the value stored in the first storage area, the charging time constant and the discharging time constant are changed as a result. In the above example of adding or subtracting a constant value to the value stored in the first storage area, the discharging time constant is 375 times the charging time constant.

Moreover, the above-mentioned addition/subtraction is not performed at each comparison timing because the above-mentioned signal level variable circuit 1
This is to prevent the gain from changing suddenly.

The above explanation is about a charging/discharging operation in which a constant value is added or subtracted from the value stored in the first storage area under the above conditions.
A charging/discharging circuit can also be equivalently formed by setting a condition for addition/subtraction of a constant value (for example, 0.75 dB) to the value stored in the storage area.

That is, by cumulatively adding and subtracting constant values to the values stored in the first and second storage areas formed in the RAM 23 by the CPU 21, two charge/discharge time constant circuits are provided. .

Here, the first time constant circuit formed using the first storage area works to follow the level change of a normal call signal, and the first time constant circuit formed using the second storage area The time constant circuit No. 2 is for following the transition of switching between receiving and transmitting.

To further explain the second time constant circuit using the second storage area, the time interval between listening to the other party's voice and conversely speaking to the other party is determined by the change in the normal conversation level. Therefore, it is necessary to make the time constant of the second time constant circuit larger than that of the first time constant circuit in order to perform the AGC operation.

The above first time constant circuit has an equivalent charging time constant.
Assuming that LA1 and the equivalent discharge time constant are LB1, the following relationships are obtained from the above-mentioned relationship: LA1=16 msec/6 dB...(1) LB1=6 sec/6 dB...(2).

Equation (1) means that it takes 16 msec for the input signal level to double its value during charging, and equation (2) means that it takes 6 seconds for the input signal level to reach half its value during discharging.

In addition, based on the comparison between the value stored in the RAM 23 and the value of the input signal information at a timing of every 0.25 msec, when the comparison result continues to be large 8 times during charging as described above, it becomes smaller 3000 times during discharging. Since 0.75dB is added or subtracted when the comparison results continue, 750msec/2msec=6sec/16msec=3000/8=37
5……(3) Obtain the following relationship.

Similarly, the equivalent charging time constant of the second time constant circuit is
If LA2 and the equivalent discharge time constant are LB2, then set to, for example, LA2=6sec/6dB...(4) LB2=20sec/6dB...(5).

In addition, the second time constant circuit compares the value stored in the RAM 23 and the value of the input information at every 0.25 msec, and when a large comparison result continues 3000 times (for 750 msec) during charging, ,
During discharge, when a small comparison result continues 10,000 times (2.5 seconds), 0.75 dB is added or subtracted, so 2.5 seconds/750 msec = 20 seconds/6 seconds = 10000/3000 = 3.
3……(6) Obtain the following relationship.

In other words, in the second time constant circuit for following the change of speakers, the discharging time constant is equal to the charging time constant.
It is 3.3 times.

As mentioned above, the signal obtained by rectifying the input signal V _A by the rectifier circuit 2 and converting it into a digital signal by the A/D converter 10 is converted into a digital signal by using the first and second storage areas of the RAM 23. A filter operation is performed by a first time constant circuit and a second time constant circuit by the CPU 21.

Then, the CPU 21 compares the value of the first storage area and the value of the second storage area stored in the RAM 23 during the filter operation, and samples the larger value as the filter value.

The above first sampled as this filter value
FIG. 4 shows the magnitude relationship between the filter voltage values stored in the second storage area and the second storage area.

In FIG. 4, ◯ indicates the rise characteristic when the power is turned on, M1 indicates a change in the content of the first storage area, and M2 indicates a change in the content of the second storage area.

In addition, in the above-mentioned steady state, if an instantaneous audio interruption occurs for some reason, the detection signal level will drop instantaneously, but in the CPU 21, the first discharge time constant is set in response to the change in the detection signal level.
Since LB1 is assigned, the contents of the first storage area
M1 decreases only slightly as shown in Figure 4.
Therefore, the gain of the signal level variable circuit 1, which is controlled by the content M1 of the first storage area, does not change significantly, and as a result, the signal level does not fluctuate when the audio returns.

On the other hand, when the audio is interrupted for a relatively long period of time due to an interruption in the conversation, etc., the detection signal level decreases and the content M1 of the first storage area is changed to a relatively short first storage area as shown in Figure 4. It decreases greatly according to the discharge time constant LB1 of 1. However, at this time, the content M2 of the second storage area does not decrease significantly due to the long second discharge time constant LB2, and thus becomes larger than the content M1 of the first storage area. Therefore,
During this period, the content M2 of the second storage area is subtracted from the reference value information instead of the content M1 of the first storage area, and as a result, the gain of the signal level variable circuit 1 is the same as that of the second storage area. It is controlled in accordance with the difference between the content M2 of the area and reference value information, which will be described later. Therefore, the signal level variable circuit 1 does not cause abnormal amplification when the voice returns.

As shown in FIG. 4, the filter value V A _′ obtained by sampling the filter voltage from the first storage area or the second storage area for the input signal V _A is as follows:
The operation of the CPU 21 is used to perform the following calculation with reference value information V _B for level setting: V _C =V _A '-V _B (7).

The calculation according to the above equation (7) is performed by the DC voltage variable circuit 4
It means the difference voltage between the signal gain based on the potential set in and the filter voltage, and the calculation is performed by the CPU 21. The calculation result for the above equation (7) in digital form obtained by the CPU 21 is converted into an analog signal by the D/A converter 40 and added as gain control information to the signal level variable circuit 1.

Here, the calculation result V _C by the above formula (7) is V _C > 0
If so, the above signal level variable circuit 1 according to the difference
Increase the amount of attenuation.

On the contrary, when the calculation result V _C is V _C ≦0, the attenuation amount is set to 0, and the level of the output signal V _O is set to a constant level.

Next, the above operation will be explained in more detail with reference to FIG.

() FIG. 3 is a flowchart showing an outline of the control procedure for the comparison operation in the automatic gain control circuit according to the present invention described above. First, the digitized input signal information V _A ' and the first storage area are Compare with stored value. The initial value of the first storage area is "0" as described above, but since the input signal information V _A ' is a value obtained by smoothing the input signal V _A , in the initial state, the input signal information
V _A ' is larger than the value of the first storage area (initial value "0"). Therefore, in the initial state, a constant value (0.75 dB) is added to the first storage area. This means that the value in the first storage area is rewritten to a value corresponding to 0.75 dB.

Due to the return, the value stored in the first storage area to be compared with the input signal information V _A ' next time is a value corresponding to the above-mentioned 0.75 dB. Such a comparison is performed each time the return operation is repeated, and the value stored in the first storage area is cyclically added or subtracted depending on the comparison result.

In other words, if the value of the input signal information V _A ' continues to be larger than the value cyclically added to the first storage area, the value stored in the first storage area will be accumulated. increase. In this case, as a result, the value of the first storage area increases until it becomes equal to the input information level V _A ′, as if it were a capacitor.
Performs an operation equivalent to charging operation.

On the contrary, if the value of the input signal information V _A ' continues to be smaller than the value stored in the first storage area, the value in the first storage area will gradually decrease and the discharge operation will occur. performs the equivalent operation.

In this way, the input signal information in Figure 3
By cyclically comparing V _A ' with the value stored in the first storage area, the first time constant circuit described above is equivalently formed.

() Next, the value in the first storage area forming the first time constant circuit is compared with the value in the second storage area. This comparison is performed cyclically by returning to the control procedure shown in Figure 3, and depending on the comparison result, the above-mentioned second
A fixed value is sequentially added or subtracted from the value of the storage area.

Therefore, the second storage area is provided to a second time constant circuit exhibiting the second time constant (charging and discharging time constants, both of which are larger than the first time constant).

() After this, the magnitude of the value in the first storage area and the value in the second storage area is determined.

This determination is used to control the control amount for the signal level variable circuit 1 using the larger value of either the first or second storage area, and to prevent sudden changes in the control amount.

() The equivalent filter voltage obtained in the first or second storage area determined in this way is calculated by the CPU 21 from the difference information from the reference voltage set by the aforementioned DC voltage variable circuit 4, and the difference information is calculated by the CPU 21. The above signal level variable circuit 1 according to the value corresponding to the voltage.
The amount of attenuation is controlled.

By repeating the control steps () to () described above, a filter voltage that follows the rectified voltage according to the input signal obtained by the rectifier circuit 2 can be obtained.

Now, during the above call operation, when the speaker operates the knob of the DC voltage variable circuit 4 in the direction of increasing the received voice signal level, the control circuit 20 changes.
New reference value information resulting from the above operation is stored in the RAM 23 in place of the previous reference value information. Then, this new reference value information is immediately subtracted from the input signal information (the larger value of the contents of the first and second storage areas) for which the time constant calculation has been completed by the CPU 21. The difference information obtained by this subtraction is then converted into gain control information and then supplied to the signal level variable circuit 1, and as a result, the gain of the signal level variable circuit 1 immediately changes to a value corresponding to the reference value. do. Therefore, from now on, the input audio signal remains constant at the level determined by the reference value.

As described above, according to the present embodiment, addition and subtraction of a constant value are performed according to the comparison result between the input signal information and the contents of the first storage area, and the addition is performed with respect to the contents of the first storage area. Addition and subtraction are performed when the input signal information is large for 8 consecutive timings, and subtraction is performed when the input signal information is small for 3000 consecutive timings with respect to the contents of the first storage area. Under different conditions,
By setting the discharging time constant of the first time constant circuit to be larger than the charging time constant, the gain changes slowly in response to level changes due to momentary audio interruptions, etc., and the signal level fluctuates when the audio returns. can be prevented,
In addition, when changing the reference level, level setting can be performed with great flexibility without performing a reset operation or the like. Since there is no need to perform a reset operation as described above, a complicated reset circuit using a rotary switch mechanism, an interlocking mechanism, etc. is not required, so there is an advantage that a highly reliable circuit can be provided with a simple configuration.

Further, in this embodiment, since the control system is a feed forward system, stable operation can be performed.

Further, according to this embodiment, in addition to the first time constant circuit, a second time constant circuit is provided which has a larger charging time constant and a larger discharging time constant than the first time constant circuit. Since the larger value of the outputs of the two time constant circuits is used for subtraction with the reference value information, even if a relatively long audio interruption occurs, such as when a speaker changes, It is possible to prevent abnormal amplification from occurring when the voice returns.

Note that the present invention is not limited to the above embodiments. For example, in the above embodiment, a case has been described in which level control is performed on a signal arriving via a line, but the present invention may also be applied to audio input from a microphone. However, in this case,
The control circuit 20 uses the attenuation amount of the pad as reference value information.
It should be supplied to Also, after performing the calculation V _C =V _A ′/V _B on the CPU 21, the result obtained by this calculation is
If V _C is logarithmically converted by the CPU 21, the number of arithmetic circuits can be reduced and the arithmetic precision can be increased, and the dynamic range can be widened. Furthermore, as the signal level variable circuit, in addition to the one that variably controls the amount of attenuation according to the gain control information, the one that variably controls the degree of amplification may be applied. In addition, the procedure of time constant calculation, the number of times of time constant calculation, etc. can be modified in various ways without departing from the gist of the present invention.

[Effects of the Invention] As detailed above, the present invention includes a signal level variable circuit provided in a signal transmission path, a signal detection circuit that detects a level value of an input signal to the signal level variable circuit, and a signal detection circuit that detects a level value of an input signal to the signal level variable circuit. a first analog-to-digital conversion circuit that digitizes the signal level detected by the signal detection circuit as input signal detection information; and digitizes a reference value setting signal for setting the output signal level of the signal level variable circuit. a second analog-to-digital conversion circuit that stores the input signal detection information once for each predetermined sample, and stores the input signal detection information as reference value signal information, and converts the input signal detection information into predetermined values according to the comparison result with the input signal detection information after a predetermined sample period. a first storage means having a storage area for storing cumulative results obtained by sequentially adding or subtracting a constant value; a second storage means having a storage area for storing cumulative results obtained by sequentially adding or subtracting predetermined constant values according to the comparison results with the information; and a cumulative value stored in the first storage means. a time constant circuit that selects a larger cumulative value from among the cumulative values stored in the second storage means over time at predetermined intervals, and the value of the time constant circuit and the reference signal information are difference information is calculated, a gain control signal corresponding to this difference information is generated, and this gain control signal is supplied as a control input to the signal level variable circuit to vary the gain.

Therefore, according to the present invention, it is possible to perform stable AGC operation without causing fluctuations in the signal level when the audio is restored due to a momentary audio interruption, etc., and to perform simple and highly reliable operation when changing the reference level. Therefore, it is possible to provide an automatic gain control circuit that can perform level setting with good responsiveness and a flexible configuration.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a conventional automatic gain control circuit, Fig. 2 is a block diagram of an automatic gain control circuit according to an embodiment of the present invention, and Fig. 3 is a flowchart showing the control procedure of the control circuit in the same circuit. The chart shown in FIG. 4 is used to explain the operation of the circuit shown in FIG. 2, and is a characteristic diagram showing the results of time constant calculation. 1... Signal level variable circuit, 2... Rectifier circuit,
4...DC voltage variable circuit, 10, 30...A/D
Converter, 20...Control circuit, 21...CPU, 2
2...ROM, 23...RAM, 40...D/A
converter.

Claims (1)

[Claims] 1. A signal level variable circuit provided in a signal transmission path, a signal detection circuit that detects a level value of an input signal to this signal level variable circuit, and a signal detected by this signal detection circuit. a first analog-to-digital conversion circuit that digitizes a level to provide input signal detection information; and a first analog-to-digital conversion circuit that digitizes a reference value setting signal for setting an output signal level of the signal level variable circuit to provide reference value signal information. The analog-to-digital conversion circuit No. 2 stores the input signal detection information once for each predetermined sample, and sequentially adds or subtracts a predetermined constant value depending on the comparison result with the input signal detection information after a predetermined sample period. a first storage means having a storage area for storing cumulative results obtained by the input signal detection; A second storage area having a storage area for storing cumulative results obtained by sequentially adding or subtracting predetermined constant values according to the comparison results with
a storage means, and a time for selecting a cumulative value with a larger value out of the cumulative value stored in the first storage means and the cumulative value stored in the second storage means over time at each predetermined period. a constant circuit; calculating difference information between the value of this time constant circuit and the reference value signal information, generating a gain control signal corresponding to this difference information, and using this gain control signal as a control input to the signal level variable circuit; 1. An automatic gain control circuit comprising: a control signal generation circuit that supplies a control signal to vary the gain.