JPH0427589B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for recognizing an empty wiring range in a system for automatically designing a wiring pattern on a printed board.

As electronic devices become smaller and more densely packaged, the wiring patterns provided on each layer of multilayer printed circuit boards also become more dense, and there is a strong demand for a rational automatic design method.

[Conventional technology]

FIG. 3 is a diagram showing an example of a wiring pattern on a specific layer of a printed board to which the present invention is applied.

In Fig. 3, the printed board surface has a predetermined pitch p.
Wiring patterns P ₁ to P ₇ are provided to horizontally connect the partial terminals arranged at the intersections of the respective dividing lines. Each range divided by a horizontal dividing line is referred to as rows A to F, each range divided by a vertical dividing line is referred to as columns a to h, and each row
A square defined by the intersection range of (X is A to F) and each column Y (Y is a to h) is called a lattice (X, Y). The upper limit number n ₀ of the number of wiring patterns provided in each pitch p (hereinafter referred to as the number of patterns n) is:
predetermined.

In the conventional wiring pattern design method,
When creating a new wiring pattern, search each wiring pattern existing in the target row X (X is A to F) and create a new wiring pattern in each grid (X, Y) to be routed. They were checking one by one to see if there was any room for it.

[Problem that the invention seeks to solve]

As is clear from the above explanation, in the conventional wiring pattern design method, each time a new wiring pattern is created, it is necessary to search for an existing wiring pattern in row X to be routed, which takes a lot of time. I was afraid.

[Means for solving problems]

The present invention solves the above problems by taking the following measures.

That is, in the present invention, a table is provided for storing the number of patterns existing in each grid formed by dividing the printed board at a predetermined pitch.

When creating a new wiring pattern, instead of searching for existing wiring patterns, refer to the table above and check the number of wiring patterns already placed in each grid to which the new wiring pattern will be routed and the number of wiring patterns in each grid. By comparing this with a predetermined maximum allowable number of wiring patterns, it is determined whether a new wiring pattern can be installed.

[Effect]

That is, according to the present invention, when providing a new wiring pattern, there is no need to search for existing wiring patterns in a target row one by one, and it is possible to shorten the time required to design the wiring pattern.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing an empty wiring range recognition method according to an embodiment of the present invention, and FIG. 2 is a diagram illustrating the process of the empty wiring range recognition method in FIG. 1. Note that the wiring pattern on the target printed board is as shown in FIG. 3, and the upper limit number n ₀ of the number of patterns n is 2.

In FIG. 1, a pattern number table 2 is provided in a storage device 1. As shown in FIG. In the pattern number table 2, the number n of wiring patterns existing in each grid (X, Y) on the printed board shown in FIG. 3 is stored.

1 and 2, the processing device 3 that considers the placement of a new wiring pattern P _i extracts a row X (for example, C) to be placed from the design data of the wiring pattern P _i (see FIG. Step S1), then a start column Y _s (for example b) and an end column Y _s (for example f) of the wiring pattern P _i are extracted from the design data (step S2). Next, the processing device 3 initializes the column Y to be considered as the start column Y _s (=b) (step S3), then refers to the pattern number table 2 in the storage device 1 and sets the grid (X, Y ) [=(c,b)]
The number of patterns n is extracted (step S4), and the upper limit number
Compare with n ₀ (step S5). In FIG. 1, the number n of patterns stored in the grid (c, b) in the pattern number table 2 is 0, so the condition n<n ₀ is satisfied (step S5), and furthermore, the column Y is the end column. After confirming that it is not Y _e , the column Y is updated to the next value (c in the previous example) (step S7), and the process from step S4 onwards is repeated again. In Figure 1, the lattice (X, Y) of pattern number table 3
Since the number n of patterns stored in =(C, c) to (C, f) is 1 in total, the condition n<n ₀ holds true until column Y=f is reached (step S5). Column Y=
f, the condition Y=Y _e =
Since f is established, the process ends with reference to the pattern number table 2, and it is determined that the new wiring pattern P _i can be routed.

Note that in step S5, for example, the grid (X,
If it is confirmed that the condition n<n ₀ does not hold, such as Y) = (B, d), a new wiring pattern is created.
It is determined that P _i cannot be wired.

As is clear from the above description, according to this embodiment, when determining whether or not a new wiring pattern P _i can be wired, the processing device 3 only refers to the pattern number table 2, and one by one the target row In the example, there is no need to search for the existing wiring pattern in C) (P ₃ in the example).

It should be noted that FIGS. 1 to 3 are only one embodiment of the present invention, and for example, the wiring pattern on the target printed board is not limited to that shown in the drawings, and may be modified in many other ways. However, the effects of the present invention remain the same in either case.

〔Effect of the invention〕

As described above, according to the present invention, when providing a new wiring pattern, there is no need to search for existing wiring patterns in a target row one by one, making it possible to shorten the design time of the wiring pattern.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an empty wiring range recognition method according to an embodiment of the present invention, FIG. 2 is a diagram illustrating the process of the empty wiring range recognition method in FIG. 1, and FIG. FIG. 2 is a diagram showing an example of a wiring pattern on a specific layer of a printed board. In the figure, 1 is a storage device, 2 is a pattern number table, 3 is a processing device, n is the number of patterns, n ₀ is the upper limit number, P ₁ to P ₇ are wiring patterns, X = A to F are rows, Y = a to h indicate columns, Y _s indicates a start column, and Y _e indicates an end column.

Claims (1)

[Claims] 1. In a system for automatically designing a unidirectional wiring pattern provided on a printed board, the printed board is divided into grids in the X and Y directions at a predetermined pitch, and the wiring patterns that have already been routed are A table is provided in which the number of patterns passing through each grid is stored for each grid, and when adding a new wiring pattern, the number of patterns in each grid through which this new wiring pattern passes is read from the table, and each read A method for recognizing an empty wiring range, characterized in that when the number of grid patterns is smaller than a predetermined maximum allowable pattern number, it is determined that the new wiring pattern can be added.