JPH0427619B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a video signal recording device, and more particularly to a video tape recorder suitable for use in recording video using a video camera, etc., and taking continuous shots by pausing for each scene.

Normally, with video signal recording devices, it is possible to perform so-called spliced recording, in which the pause operation is used to edit and record one track after another.In this case, if a simple pause operation is used, the next recording will start regardless of the track that has already been recorded. Therefore, the arrangement of tracks may become irregular in this part, or the control signal may become discontinuous, causing the tracking servo to disengage in this part during playback, resulting in a distorted image.

To prevent this image disturbance, it is necessary to ensure that the control signals are completely continuous on the tape, or even if they are not continuous, the phase of the control signals does not change before and after switching. Conventional countermeasures for this problem include the timing phase method and the tape rewinding method (also called the phase matching method or the back space editing method). Since the load is small,
Taking advantage of the short and stable start/stop time of the tape, the tape can be stopped in a short time after operating the pause button in conjunction with the vertical synchronization signal, and the start of the next recording can also be input. This is a method of adjusting the phase of the control signal in conjunction with the vertical synchronization signal of the signal. In the latter case, when a pause command is issued, the capstan motor rotates in reverse with the pinch roller pressed, rewinds the tape a certain amount and waits for the start of the next recording, and when a pause command is issued, the tape is driven first. This is a method in which the recording state does not occur immediately after the playback state is entered, and during this time the drive adjustment of the capstan is performed so that the phase of the control signal of the next recording signal and the playback control signal match, and then the recording state is entered.

By the way, in the case of the latter tape rewinding method,
There is an inconvenience that the motor servo does not heat up immediately when the pause is released. In other words, it is ideal for the motor's rise characteristic to change linearly with respect to tape running, as shown by the broken line a in Figure 1, and in this case, the servo also changes temporally to the first control pulse. CTL ₁ and 1st RF switching pulse P ₁
This happens when they match, which is extremely ideal, but motors generally have poor startup characteristics, as shown by the dashed line b in Figure 1, and the servo also has poor start-up characteristics, for example, This happens only when the control signal CTL ₄ and the sixth RF switching pulse P ₆ match. Therefore, in the case of the conventional tape rewinding method, it takes time for the servo to turn on after the pause release command, and it has the disadvantage that it is not possible to accurately repeat the video.

In view of this point, the present invention is designed to synchronize the control signal after the pause is released with the pulse signal synchronized with the rotation of the rotating magnetic head, that is, the RF switching pulse, in a short time based on the startup characteristics of the motor. To provide a video signal recording device capable of performing accurate continuous shooting without disrupting images at an early stage.

To explain the outline of the present invention, as shown in Fig. 2, when a pause command is issued at point A during recording in EE mode, recording is stopped and at the same time the capstan motor is reversed with the pinch roller being pressed. Then, the tape is rewound at a predetermined speed, for example, 1× speed, while the control signals are counted, by a certain amount, for example, 15 frames, and is stopped at point B to enter a recording pause (REC.P) state.
When this recording pause state continues for a predetermined period of time, for example, several minutes, the recording pause state is automatically stopped. Then, when a pause release command is issued at point C, the tape starts running while recording is stopped, plays back a certain amount of the control signal that has already been recorded, for example 12 frames, and then calculates the phase of the control signal to be recorded next. The phase is adjusted to the playback control signal between points C and D, and after the phases of the new and old control signals are completely matched, with the tape running, recording of a new signal is started from point D, and the recording of the new signal is started from point D. '' is overlapped with the previous recording part to prevent unrecorded parts of the video signal from occurring. In the present invention, at the pause release point C, the timing of the rise of the motor is substantially shifted by a time _t1 , as shown in FIG.
This shortens the synchronization time of the RF switching pulses to speed up the servo pull-in. For example, in Figure 1, the first control pulse CTL ₁ and the third RF switching pulse are synchronized when the pause is released.
This indicates that the servo is turned on when _P3 matches.

An embodiment of the present invention will be described in detail below with reference to FIG.

In Fig. 3, 1 is a drum motor, 2 is a capstan motor, and 3 is a drum motor (not shown).
A pulse generator 4 is disposed on the head drum that is interlocked with the head drum, and is used to magnetically generate pulses indicating the rotational phase of the head.
An input terminal to which a Hz vertical synchronizing signal is applied as a servo reference signal, 5 is a control (CTL) head, 6 is a recording/reproducing switch, 7 is a control signal recording amplifier, 8 is a control signal reproducing amplifier, 9 and 10 are carriers. Magnetic detectors 11 and 12 are used to detect the rotation of the capstan motor 2, and frequencies 11 and 12 are used to generate a frequency corresponding to the rotational speed of the capstan motor 2 in response to the outputs of the magnetic detectors 9 and 10, respectively. generator, 1
3 and 14 are a frequency servo circuit and a phase servo circuit for the drum servo system, 15 is a frequency divider that divides the 60Hz signal from input terminal 4 into 1/2 to obtain a 30Hz signal, and 16 is a differential amplifier. It is.

A signal corresponding to the speed error or phase error is obtained on the output side of the differential amplifier 16, and this signal is supplied to the drum motor 1 through the drive circuit 17.
Controls the rotation of the head drum which is linked to the head drum. Also, during recording, a 30Hz signal obtained at the output side of the frequency divider 15 is supplied as a control signal to the control head 5 through the recording amplifier 7 to the tape (not shown).
is recorded and used as a reference signal during playback.

18 and 19 are a phase servo circuit and a frequency servo circuit of a capstan motor servo system, respectively; 20
2 is a phase compensation circuit, 21 is a tracking control circuit, and 22 is a phase error detection circuit. During reproduction, a reproduction control signal supplied from the control head 5 through the reproduction amplifier 8 is sent to the phase servo circuit 1.
8 to the frequency servo circuit 19, where it is compared with the signal supplied from the frequency generators 11 and 12 via the phase error detection circuit 22, and the error signal is applied to the switch 23, which is closed during normal operation. The tape is supplied to the capstan motor 2 through the drive circuit 24, and the feeding of the tape is controlled and tracked by the capstan motor 2 in accordance with the rotational phase of the head.

25 is a timing circuit, this timing circuit 25 has a built-in counter, and the above-mentioned second
The operations shown in the figure are controlled. Along with that,
The input side of this timing circuit 25 receives an RF switching pulse RFSWP as shown in FIG. A control signal VD/CTL as shown in FIG. 4B leaks to the output side of the regenerative amplifier 8 via the PB side, and a pause command signal SLOW as shown in FIG. 4C from the microcomputer 26.
Various command signals are supplied, including the following. When the timing circuit 25 receives the pause command signal SLOW from the microcomputer 26, when the phases of the RF switching pulse RFSWP and the signal VD/CTL match, the timing circuit 25 synchronizes with the rising edge of the signal VD/CTL as shown in FIG. 4D. After that, the pause release command generates the signal C.CUT which falls in synchronization with the falling of the pulse RFSWP.

Signal C・CUT from this timing circuit 25
are respectively supplied to a tracking control circuit 27, a brake circuit 28, and a continuous shooting delay circuit 29 arranged on the output side thereof. The tracking control circuit 27 receives the supplied signal C.CUT.
As shown in FIG. 4E, the leading edge of CUT is delayed by a predetermined time τ ₁ to obtain a noiseless still image. is delayed by a predetermined time τ ₂ (that is, corresponding to time t ₁ shown in FIG. 1) as shown in FIG. 4E, so that the timing for the earliest servo operation is determined. As a result, the continuous shooting delay circuit 2
9, a signal C.CUT ₁ as shown in FIG. 4E is outputted, in which the leading and trailing edges of the signal C.CUT are delayed by a predetermined amount as described above. This signal C・
Frequency servo circuit 19 and drive circuit 2 by CUT ₁
4. Controls the opening and closing of a switch 23 arranged between 4 and 4. This switch 23 is closed during normal operation when the signal C.CUT ₁ is at a low level;
It is controlled to be open in continuous shooting mode when CUT ₁ is at a high level.

In addition, the brake circuit 28 responds to the output signal of the tracking control circuit 27, that is, substantially synchronizes with the rise of the signal C CUT ₁ shown in FIG. 4E, and outputs the signal shown in FIG. Predetermined width
Generate a brake signal BRAKE with T ₁ .
The predetermined width _T1 of the brake signal BRAKE is set so that the stop position of the capstan motor 2 is always a constant stop position.

The output signal C.CUT ₁ of the continuous shot delay circuit 29 is further supplied to a delay circuit 30, where the trailing edge is delayed by a predetermined time _T2 , for example, 1 second. A signal C·CUT ₂ as shown in Figure G is output. This predetermined time _T2 is provided to pull in the servo as quickly as possible during continuous shooting. In other words, this predetermined time _T2 is used to pull in the servo as quickly as possible during continuous shooting.
The signal C/CUT ₂ closes the switch 31, which is open during normal operation, and the switch 11a in the frequency generator 11 (not shown, but there is a similar switch in the frequency generator 12) to perform phase compensation. circuit 2
0 and the time constants of the frequency generators 11 and 12 are made smaller than during normal operation. This signal C・CUT ₂ is also supplied to the drive circuit 24, and the drive circuit 2 is pulse-driven at approximately 20% during normal operation.
The operation of step 4 is increased to approximately 90% during continuous shooting and pulse-driven, which also allows the servo to move faster.

Therefore, as shown in Fig. 4H, the brake signal
The drive signal CMD from the drive circuit 24 is cut off in synchronization with the fall of BRAKE, and the capstan motor 2 is stopped, and after the pause is released, the drive signal CMD is supplied with a substantial continuous shooting delay time τ ₂ . and the control signal VD/CTL and the RF switching pulse RFSWP during the time T ₂ immediately after that.
When synchronization is achieved, servo is rapidly applied to the capstan motor 2.

FIG. 5 shows the timing circuit 25 in FIG.
This shows a specific circuit example of a tracking control circuit 27, a brake circuit 28, a continuous shooting delay circuit 29, and a part of the drive section, and parts in FIG. 5 that correspond to those in FIG. 3 are given the same reference numerals. explain.

The timing circuit 25 has D-type flip-flop circuits 25a, 25b and a transistor 25c, and is a flip-flop circuit 2 to which a signal SLOW is supplied from a microcomputer 26 (FIG. 3).
The input terminals D of the flip-flop circuits 5a and 25b are commonly connected, the inverting output terminal of the flip-flop circuit 25a is connected to the clear terminal CL of the flip-flop circuit 25b, and the preset terminal PS of the flip-flop circuit 25a is connected to the inverting output terminal of the flip-flop circuit 25b. together with the brake circuit 28
is connected to the input side of the flip-flop circuit 25.
A clear terminal CL of the flip-flop circuit 25a is grounded, and an RF switching pulse RFSWP is supplied from the frequency servo circuit 13 (FIG. 3) to the clock terminal C of the flip-flop circuit 25a through an inverter 25d.

Further, a signal VD/CTL is supplied to the base of the transistor 25c from the regenerative amplifier 8 (Fig. 3).
The emitter of this transistor 25c is grounded,
The collector is connected to the clock terminal C of the flip-flop circuit 25b and to the positive power supply terminal + _Vcc via a resistor 25e.

The output terminal Q of the flip-flop circuit 25b is connected to its own preset terminal PS, and also to the diode 27 of the tracking control circuit 27.
The diodes 29a and 29 of the relay shot delay circuit 29 are connected to the anode sides of the diodes 29a and 27b.
connected to the cathode side of b. The cathode sides of the diodes 27a and 27b are connected to one end of a resistor 32 via a variable resistor 27c and a resistor 27d, respectively, and the anode sides of the diodes 29a and 29b are connected to one end of a resistor 32 via variable resistors 29c and 29d, respectively. 32, this resistor 3
The other end of 2 is grounded via a capacitor 33.
The resistor 32 and capacitor 33 are shared by the tracking control circuit 27 and the continuous shooting delay circuit 29, and the diode 27a, resistor 27c, diode 29a, and resistor 29c are used to charge the capacitor 33 during forward rotation (FWD). On the other hand, the diode 27b, the resistor 27d, the diode 29b, and the resistor 29d form a charging/discharging loop for the capacitor 33 during rotation in the reverse direction (REV), and these charging/discharging loops are not shown. Command signal from microcomputer 26
The opening/closing of the switch is controlled by the CFWD, and the switching is performed according to the direction of rotation. By adjusting the variable resistors 27c and 29c, the delay times τ ₁ and τ ₂ in FIG. 4E can be set to any appropriate values.

One end of the resistor 32 is connected to an AND circuit 34 whose two input ends are connected in common, and the output side of the AND circuit 34 is connected to the base of a transistor 36 for preventing malfunction via a resistor 35 and also connected to the brake circuit 28. It is connected to one input terminal of an AND circuit 28a arranged inside. The AND circuit 34 is also shared by the tracking control circuit 27 and the continuous shooting delay circuit 29, and the signal C.CUT ₁ is passed through the AND circuit 34.
works to set the level of

The other input terminal of the AND circuit 28a is a resistor 28b,
It is connected to the inverting output terminal of the flip-flop circuit 25b of the timing circuit 25 via a variable resistor 28c and a variable resistor 28d, and is grounded via a resistor 28b and a capacitor 28e. By adjusting the variable resistor 28d, the brake width (T ₁ in FIG. 4F) can be set to any appropriate value.
Further, a resistor 28f and a diode 28g are connected in series between the common connection point of the resistor 28b and the capacitor 28e and the output terminal of the AND circuit 28a, thereby making the fall of the brake signal BRAKE more steep. There is.

37 and 38 are AND circuits for determining forward and reverse directions, respectively;
7 is for continuous shooting, and AND circuit 38 is for normal operation. A signal CFWD for driving the capstan motor in the forward direction is supplied to one input terminal of these AND circuits 37 and 38 from the microcomputer 26, and the AND circuit 28a is supplied at the time of continuous shooting.
When the gate of AND circuit 37 is opened by the output of I am getting .

Also, the output signal of the AND circuit 28a, that is, the signal
BRAKE is supplied to the base of transistor 41 through diode 40, and drive control signal CHRR
It is output to the drive unit as

Next, to explain the circuit operation of FIG. 5, in the initial operating state, the output terminal Q of the flip-flop circuit 25a of the timing circuit 25 is at a high level (H), and the output terminal Q of the flip-flop circuit 25b is at a low level (L). , a signal as shown in FIG. 4C is generated by a pause command from the microcomputer 26.
When SLOW is input, the output terminal Q of the flip-flop circuit 25b is inverted from a low level to a high level in synchronization with the rising edge of the signal VD/CTL, and as a result, the output side of the timing circuit 25 is A signal C·CUT as shown in FIG. 4D is obtained. For example, in the forward direction, this signal C·CUT is charged to the capacitor 33 through the diode 27a side, and the fourth
As shown in FIG. E, a signal C·CUT ₁ is obtained which rises with a delay time τ ₁ substantially determined by the time constants of the capacitor 33 and the resistor 27c.

Also, in the initial operating state, the flip-flop circuit 2
The preset terminal PS of 5a is set to a high level by the output from the inverting output terminal of the flip-flop circuit 25b, and this high level signal charges the capacitor 28e through the resistor 28d etc. The other input terminal of the AND circuit 28a is held at a high level. Therefore, as mentioned above, when the signal C.CUT ₁ obtained at the output side of the AND circuit 34 becomes high level, the gate of the AND circuit 28a opens, and the fourth
Capacitor 28e and resistor 2 as shown in Figure F
A brake signal BRAKE having a brake width _T1 determined by time constants 8c and 28d is output. This signal BRAKE is supplied to AND circuits 37 and 38 and used to obtain a reverse signal, and is also supplied to transistor 41 as a drive control signal.

On the other hand, when a pause release command is issued and the signal SLOW falls as shown in FIG. , and the inverted output terminal changes to high level, so the flip-flop circuit 25b
The output terminal Q of the flip-flop circuit 25b becomes low level and the inverted output terminal becomes high level, and the flip-flop circuit 25a is preset by the high level of the inverted output terminal of the flip-flop circuit 25b, and its output terminal Q becomes high level and is in the initial operating state. Return to

Also, the output terminal Q of the flip-flop circuit 25b
As a result, the charge stored in the capacitor 33 is discharged through the diode 29a side in the forward direction, and the signal C·CUT obtained at the output side of the AND circuit 34 becomes as follows.
As shown in FIG. 4E, the voltage falls with a delay time τ ₂ substantially determined by the time constants of the capacitor 33 and the resistor 29c. In other words, the start-up timing of the capstan motor ₂ is shifted by the time t1 shown in FIG. ₁ , which corresponds to this delay time τ2. The capstan motor 2 is controlled to make the time constant of the servo system smaller than during normal operation for a predetermined time T ₂ (FIG. 4G) immediately after the start of driving, so that the servo pull-in is made faster.

As described above, according to the present invention, since the servo of the pause release capstan motor is made rapid, accurate continuous shooting is possible, and unnaturalness such as image disturbance at the joint of the video during playback can be avoided. is gone,
A reproduced image with excellent image quality can be obtained.

In the above-described embodiment, the present invention has been described with reference to the case of continuous shooting, but it goes without saying that the present invention is not limited to this and can be similarly applied to other cases where a servo motor is used.

[Brief explanation of drawings]

1 and 2 are diagrams for explaining the present invention, FIG. 3 is a configuration diagram showing an embodiment of the present invention, and FIG. 4 is a signal waveform diagram for explaining the operation of FIG. 3. , FIG. 5 is a circuit diagram showing an example of a specific circuit of the main part of the present invention. 2 is a capstan motor, 11 and 12 are frequency generators, 20 is a phase compensation circuit, 24 is a drive circuit,
25 is a timing circuit, 26 is a microcomputer, 27 is a tracking control circuit, 2
8 is a brake circuit, 29 is a continuous shooting delay circuit, 3
0 is a delay circuit.

Claims (1)

[Claims] 1 A rotating magnetic head is used to record a video signal on a magnetic tape on a track diagonal to the tape running direction, and when the recording state is changed to a pause state, the tape is rewound and recorded on the tape. Control of a capstan motor of a video signal recording device, wherein the tape is stopped by detecting that a predetermined number of control pulses have been counted, and a recording start position is determined by counting the control pulses when the pause is released. In the circuit, when the pause is released, the rise timing of the drive signal that drives the capstan motor that causes the tape to run in the forward direction is determined by a pulse signal synchronized with the rotation of the rotating magnetic head that is first generated after the pause is released. It comprises means for delaying the rise or fall by a predetermined amount, and means for driving the capstan motor using the drive signal, and the control pulse and the pulse signal are synchronized by the predetermined delay. A control circuit for a capstan motor of a video signal recording device, characterized in that: