JPH0429555B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a printing device, and more particularly to a raster scan printing device that is capable of printing across lines.

Background of the Technology, Prior Art, and Problems For example, raster scan type laser printers have conventionally been unable to print characters across lines. In other words, as shown in Figure 1, when creating a table, "items" are placed in the top row.
When printing ``Name'' on the bottom line, it was not possible to print ``Specifications'' across the line above and below. This line spacing printing is not limited to tables; as shown in Figure 2, A...C is printed on the top line and D is printed on the bottom line.
...When printing E, print B across these lines.
There are times when you want to print something, but conventional line printers cannot do this kind of printing.

OBJECTS OF THE INVENTION An object of the present invention is to provide a printing device for performing raster scan printing that can print across such lines.

Structure of the Invention In order to achieve this object, the printing apparatus of the present invention includes a character pattern storage section that stores character patterns, and a buffer that holds print information of characters to be printed. In a printing device that reads a character pattern storage section in response to a character pattern storage section and prints the character pattern obtained by this in a raster scan method, it counts row scan signals and outputs a signal when the row scan signals have been counted a predetermined number of times. A line scan counter to be output, a character pattern storage address holding means that holds lower-order information indicating the scan line of the character to be printed among the address information for accessing the character pattern storage, and a 1-line scan of the character to be printed. adding means for adding a predetermined value to the lower-order information of the character address for each time, and outputting the added value to the character pattern storage address holding means; address information in the print information of the buffer and the address of the character pattern storage section address holding means according to divided print information indicating the print position of the divided print character, print position information indicating the print position of the divided print character, and the output signal of the line scan counter. A reading means is provided for reading out an output of a character pattern corresponding to a scan line indicated by the lower order information read from the character pattern storage unit based on the lower order information of the information, and when characters to be printed are printed in line divisions, When printing an upper side of a character to be divided and printed, the selection means does not substantially perform the addition operation of the addition means until a signal is output from the line scan counter, and the line scan counter outputs a signal. After that, the adding means starts an addition operation to the lower-order information, reads out character patterns based on the added value of the lower-order information, prints them sequentially, and stores the added value in the character pattern storage address holding means. When printing the lower side of the character to be divided and printed on the next line, the added value held in the character pattern storage address holding means is output as lower information of the address information from the beginning, and the divided The present invention is characterized in that the adding operation of the adding means is substantially stopped when the reading of the character pattern to be printed is completed.

Embodiment of the Invention An embodiment of the present invention will be described based on FIGS. 3 to 6.

FIG. 3 is a block diagram of the line buffer used in the present invention, FIG. FIG. 5 is an explanatory diagram of printing information in one line, FIG. 5 is a configuration diagram of an embodiment of the present invention, and FIG. 6 is an explanatory diagram of the operation of the present invention.

In the figure, LB is a line buffer, 10 and 11 are AND gates, 12 is a NOR gate, 13 is an AND gate, 14 is an inverter, and 15 is a NAND gate.
16 is an AND gate, 17 is a J-K flip-flop (hereinafter referred to as FF), 18 is an AND gate, and 19 is a multiplexer (hereinafter referred to as MPX).
), 20 is an adder, 21 is a character generator address memory (hereinafter referred to as CG address memory), 22 is a row scan counter, 2
3 is a character number counter.

The line buffer LB is set with print information indicating the character code of the character to be printed and its printing mode.The character code is stored in the character pattern storage area (hereinafter referred to as CG) indicates the start address of the storage area. line battle
LB also contains a line division instruction bit a that indicates whether or not the printing will span two lines, and a line that indicates whether the printing will be printed on the upper line or the lower line when the printing spans between two lines. A division upper/lower instruction bit b and other print information such as character size and shift status are set. Each of these pieces of information is then set in sections 1-1 to 1-4 of the line buffer LB, as shown in FIG. In this case, the line division instruction bit a is ``1'' when printing spans two lines, and the line division up/down instruction bit b is ``1'' when printing on the top half, and when printing on the bottom half. is set to "0".

Therefore, when printing in the state shown in Figure 2,
As shown in Fig. 4A, in each stage of the first line buffer where information for printing A to C in the first stage is set, a and b are set as shown in LB-1, and the next stage is set as shown in LB-1. In each stage of the second line buffer, in which information for printing D to E in the rows is set, a and b are set corresponding to each character in the state shown in LB-2. As will be explained in detail with reference to FIG. 5, when the line division instruction bit a is "0", that is, during normal printing in which printing does not span two lines, the line division up/down instruction bit b may be "1". "0"
However, since control is performed regardless, in this case, b may be set to appropriate data, whether it is "1" or "0". By means of the line division instruction bit and the line division upper and lower instruction bits of FIG. 4A, printing control in the state shown in FIG. 4B is performed for upper row A to C and lower row D to E.

The MPX 19 selectively outputs either the initial CG address data or the data applied from the CG address memory 21 as the lower bit for CG access. This initial CG address data is normally all zeros.

The adder 20 performs a +1 operation when normal scan control is performed for a character to be printed.

The CG address memory 21 is used to set the number of scan signals scanned for each character, and has divisions for the number of characters that can be printed in one line by the line printer.

The line scan counter 22 counts the number of scans in one line, and is configured to generate an output when counting 1/2 of the number of scans required to print one line.

The character number counter 23 counts the number of characters (number of digits) to be printed in one line.

Next, the operation shown in FIG. 5 will be explained in connection with printing A to E in FIG. 2. At this time, first, the buffers in each stage of line buffer LB-1 are a and b.
The data as shown in Fig. 5 are set for categories 1-4, respectively.
The start address of the character pattern storage section in which C is stored is set, for example, by a printing main control section (not shown).

(1) First, the first stage of line buffer LB-1 is read out. At this time, since "0" is written in each of sections 1-1 and 1-2, inverter 14 outputs "1" and NAND gate 1
5 outputs "1". At this time, FF17's J
Since the row start signal is applied to the terminal, FF17
outputs "1". Due to the application of this row head signal and the output "1" of the NAND gate 15, the AND gate 18 outputs "1". This causes the multiplexer 19 to input the initial CG address.
The data side is output. At this time, since all zeros are applied as the initial CG address data, these all zeros are output as the lower bits for CG access. This will reduce the line buffer
The letter A set in section 1-4 of LB-1
CG start address (upper bit) + lower bit is
Applied to CG for CG access. As a result, the first scan of the character pattern is read out from the CG, and this is applied to the AND gate 13 as a video signal VID for printing. At this time, since "0" is written in both sections 1-1 and 1-2, AND gate 10 and AND gate 10 and
All gates 11 output "0", and AND gate 16 also outputs "0". Therefore, since NOR gate 12 outputs SPACE "1", this video signal is output from AND gate 13.
VID is output as a print pattern.

(2) SPACE "1" of the NAND gate 12 is applied to the adder 20, and all "0"s are applied to the other input of the adder 20. Therefore, the adder 20 calculates 1+0=1 and converts this into
Applied to the CG address memory 21. At this time, the character number counter 23 outputs "0" to indicate the first character A, so the character A area of the CG address memory 21 (upper address 0)
The output 1 of the adder 20 is written in . A character signal is applied to the character number counter 23 to control the second digit character B, and the character number counter 23 is incremented by one.

(3) When the first scan data of character A in the first row of line buffer LB-1 is read out in this way, the scan data reading control of character B in the second row of line buffer LB-1 is then performed. . This time, "1" is set in both sections 1-1 and 1-2, and FF17 outputs "1" as described above, so AND gates 10 and 11 output "1". Therefore, the output SPACE of Noah gate 12 is "0"
become. Thus, the AND gate 13 is turned off and the video signal VID is masked, so that blank printing is performed. At this time, the row head signal is "1", the AND gate 18 outputs "1", and the initial CG address data all zeros are selected and output. These all zeros and the output "0" of the NOR gate 12 are applied to the adder 20 to perform an addition operation, so the output of the adder 20 becomes 0, and therefore the CG indicated by the character number counter 23
Zero remains written in the area for the character B in the address memory. Then, a character signal is applied and the character number counter 23 is incremented by one.

(4) Next, scan data reading control for character C in the third row of line buffer LB-1 is performed. At this time, since "0" and "0" are set in sections 1-1 and 1-2, the same control operation as for the character A is performed as described above, and also for the character C in the CG address memory 21. 1 is written in the area.

(5) In this way, when the control operation for the first scan line is completed up to the last stage for characters A, B, C, . . . , a scan signal is applied to the row scan counter 22, and it counts +1. However, this does not count half of the number of scans required to complete printing one line, so the line scan counter 22 continues to output "0". Also, at this time, the character number counter 23 is reset.

(6) Next, each section of the first row of characters A is read out again from the line buffer LB-1. At this time, the first signal of the row falls and becomes "0", so the AND gate 1
8 outputs "0", and MPX19 then outputs CG
The data on the address memory 21 side will be output. Therefore, since the number 1 is written in the area for the character A in the CG address memory 21 as described in (2) above, the CG is accessed at the start address + 1 address this time, and the Letter A for 2 scan lines
data will be read. Then, the adder 20 adds the output 1 of the MPX 19 and the SPACE "1" of the NOR gate 12, that is, 1+1.
=2 is calculated, and this numerical value 2 is written in the area for the character A in the CG address memory 21.

(7) However, when the line buffer is read out again for character B, zero is written in the character B area of the CG address memory 21 as described in (3) above, and CG access to character B is disabled. This is done using only the first address, and the character pattern of character B is all zeros. At this time, the adder 20
Zero is applied from MPX19 and Noah gate 1
SPACE “0” is applied from 2, so 0+0
=0 is calculated, and zero is again written in the area of the character B in the CG address memory 21.

(8) Also, the same control processing as for character A is performed for character C, and the CG of character C is accessed at the address of the start address + 1, and
A numeric value 2 is written in the area for the character C in the CG address memory 21.

(9) When the above process is repeated and the row scan counter 22 counts 1/2 of the number of scans in one row, the row scan counter 22 outputs "1" and sends this to the K terminal of the FF17. Apply. In this way, FF17 will output "0".

(10) Even if this FF17 outputs "0", when each division of characters A and C is read from line buffer LB-1, the control similar to the above case is performed and the data is stored in CG. Character patterns are sequentially read out for one scan.

(11) When FF17 outputs "0" and each section of character B is read from line buffer LB-1, AND gate 11 outputs "0" and NOR gate 12 outputs "1". Output. As a result, the adder 20 performs an addition operation on the character B, and 1, 2, etc. are recorded in the CG address memory 21 in sequence, and thus
The character patterns stored in the CG are sequentially read out from 1/2 of this print line onwards. As a result, as shown in FIG. 4B, all of the characters A and C are printed, and only the upper part of the character B is printed. In this way 1
When printing for a line is completed, the line scan counter 22 and character number counter 23 are reset.
Next, line buffer LB-2 in which print information has been written during this time will be read out in the same way.

(12) In this line buffer LB-2, the letter D,
Regarding E, the same control as for letters A and C is performed.

(13) However, for the letter B, its category 1-
This time, "1" and "0" are written in 1' and 1-2'. Therefore, first row scan counter 2
Even if gate 2 outputs "1", AND gates 10 and 11 both output "0", and Noah
Gate 12 now outputs "1". Therefore, for the character B as well, addition control is performed in the adder 20 from the beginning. Moreover, at this time, the inverter 14 outputs "1", and the
Since gate 15 outputs "0", AND
Since gate 18 outputs "0", MPX1
9 outputs data on the CG address memory 21 side. This CG address memory 21 contains the character B.
1/2 of the number of scans for one line is entered, so for B, the lower half of the character pattern will be read from the beginning.

(14) Then, when scanning is performed sequentially in the same way as above and scanning is performed for 1/2 of the number of scans in one row, the row scan counter 22 outputs "1", and the FF 17 outputs "0". Output. This causes AND gate 16 to output "1", and since AND gate 11 is outputting "0" at this time, NOR gate 12 outputs "0". This turns off the AND gate 13, so the video signal VID is masked by the AND gate 13, and from now on, this character B will be printed blank.

Effects of the Invention As described above, according to the present invention, it is possible to print across lines, that is, in a direction perpendicular to the scan direction (in the vertical direction), which was impossible in conventional raster scan printing devices. Line division printing is possible with a simple configuration, so
Various types of printing can be performed.

[Brief explanation of drawings]

1 and 2 are explanatory diagrams for printing across rows, FIG. 3 is a configuration diagram of the line buffer used in the present invention, and FIG.
An explanatory diagram of the state of the line division instruction bit and the line division upper and lower indication bit when printing the characters in the figure, FIG. 4B is an explanatory diagram of printing information within one line, and FIG. FIG. 6 is an explanatory diagram of the operation of the present invention. In the figure, LB is a line buffer, 10 and 11 are AND gates, 12 is a NOR gate, 13 is an AND gate, 14 is an inverter, and 15 is a NAND gate.
16 is an AND gate, 17 is a J-K flip-flop, 18 is an AND gate, 19 is a multiplexer, 20 is an adder, 21 is a character generator address memory, 22 is a row scan counter, 23 is a character number counter It is.

Claims (1)

[Scope of Claims] 1. A character pattern storage unit that stores character patterns and a buffer that holds print information of characters to be printed, reads out the character pattern storage unit according to the print information of characters to be printed, A printing device that prints character patterns obtained by this in a raster scan method includes a line scan counter that counts line scan signals and outputs a signal when the line scan signals are counted a predetermined number of times, and a character pattern storage. a character pattern storage part address holding means that holds lower-order information indicating a scan line of a character to be printed out of the address information accessing the part; Add the given value and
an addition means for outputting the added value to the character pattern storage address holding means; division printing information indicating whether or not the character to be printed is printed in line divisions; and printing position information indicating the printing position of the division printing character. , in response to the output signal of the row scan counter, the lower order information read from the character pattern storage section based on the address information in the print information of the buffer and the lower order information of the address information in the character pattern storage section address holding means. A reading means is provided for reading out the output of a character pattern corresponding to the scan line indicated by the information, and when characters to be printed are printed in line divisions, when the upper side of the character to be printed in divisions is printed, the line scan counter is used. The selection means does not substantially perform the addition operation of the addition means until a signal is output from the row scan counter, and after the row scan counter outputs a signal, the addition operation of the addition means to the lower information is started. , the character pattern is read out based on the added value of this lower-order information, and printed sequentially, and the added value is held in the character pattern storage address holding means, and the lower side of the split printed character is printed on the next line. In this case, the addition value held in the character pattern storage address holding means is output from the beginning as lower information of the address information, and when the reading of the character pattern to be divided and printed is completed, the addition operation of the addition means is performed. A printing device characterized in that it is configured to substantially stop.